<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-toradex.git/drivers/clk/socfpga, branch v5.13-rc3</title>
<subtitle>Linux kernel for Apalis and Colibri modules</subtitle>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/'/>
<entry>
<title>Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux</title>
<updated>2021-04-29T00:13:56+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2021-04-29T00:13:56+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=35655ceb31b56cd1cb52635a725dfcdb9662d7b7'/>
<id>35655ceb31b56cd1cb52635a725dfcdb9662d7b7</id>
<content type='text'>
Pull clk updates from Stephen Boyd:
 "Here's a collection of largely clk driver updates. The usual suspects
  are here: i.MX, Qualcomm, Renesas, Allwinner, Samsung, and Rockchip,
  but it feels pretty light on commits.

  There's only one real commit to the framework core and that's to
  consolidate code. Otherwise the diffstat is dominated by many Qualcomm
  clk driver patches that modernize the driver for the proper way of
  speciying clk parents. That's shifting data around, which could subtly
  break things so I'll be on the lookout for fixes.

  New Drivers:
   - Proper clk driver for Mediatek MT7621 SoCs
   - Support for the clock controller on the new Rockchip rk3568

  Updates:
   - Simplify Zynq Kconfig dependencies
   - Use clk_hw pointers in socfpga driver
   - Cleanup parent data in qcom clk drivers
   - Some cleanups for rk3399 modularization
   - Fix reparenting of i.MX UART clocks by initializing only the ones
     associated to stdout
   - Correct the PCIE clocks for i.MX8MP and i.MX8MQ
   - Make i.MX LPCG and SCU clocks return on registering failure
   - Kernel doc fixes
   - Add DAB hardware accelerator clocks on Renesas R-Car E3 and M3-N
   - Add timer (TMU) clocks on Renesas R-Car H3 ES1.0
   - Add Timer (TMU &amp; CMT) and thermal sensor (TSC) clocks on
     Renesas R-Car V3U
   - Sigma-delta modulation on Allwinner V3s audio PLL"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (82 commits)
  MAINTAINERS: add MT7621 CLOCK maintainer
  staging: mt7621-dts: use valid vendor 'mediatek' instead of invalid 'mtk'
  staging: mt7621-dts: make use of new 'mt7621-clk'
  clk: ralink: add clock driver for mt7621 SoC
  clk: uniphier: Fix potential infinite loop
  clk: qcom: rpmh: add support for SDX55 rpmh IPA clock
  clk: qcom: gcc-sdm845: get rid of the test clock
  clk: qcom: convert SDM845 Global Clock Controller to parent_data
  dt-bindings: clock: separate SDM845 GCC clock bindings
  clk: qcom: apss-ipq-pll: Add missing MODULE_DEVICE_TABLE
  clk: qcom: a53-pll: Add missing MODULE_DEVICE_TABLE
  clk: qcom: a7-pll: Add missing MODULE_DEVICE_TABLE
  dt: bindings: add mt7621-sysc device tree binding documentation
  dt-bindings: clock: add dt binding header for mt7621 clocks
  clk: samsung: Remove redundant dev_err calls
  clk: zynqmp: pll: add set_pll_mode to check condition in zynqmp_pll_enable
  clk: zynqmp: move zynqmp_pll_set_mode out of round_rate callback
  clk: zynqmp: Drop dependency on ARCH_ZYNQMP
  clk: zynqmp: Enable the driver if ZYNQMP_FIRMWARE is selected
  clk: qcom: gcc-sm8350: use ARRAY_SIZE instead of specifying num_parents
  ...
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Pull clk updates from Stephen Boyd:
 "Here's a collection of largely clk driver updates. The usual suspects
  are here: i.MX, Qualcomm, Renesas, Allwinner, Samsung, and Rockchip,
  but it feels pretty light on commits.

  There's only one real commit to the framework core and that's to
  consolidate code. Otherwise the diffstat is dominated by many Qualcomm
  clk driver patches that modernize the driver for the proper way of
  speciying clk parents. That's shifting data around, which could subtly
  break things so I'll be on the lookout for fixes.

  New Drivers:
   - Proper clk driver for Mediatek MT7621 SoCs
   - Support for the clock controller on the new Rockchip rk3568

  Updates:
   - Simplify Zynq Kconfig dependencies
   - Use clk_hw pointers in socfpga driver
   - Cleanup parent data in qcom clk drivers
   - Some cleanups for rk3399 modularization
   - Fix reparenting of i.MX UART clocks by initializing only the ones
     associated to stdout
   - Correct the PCIE clocks for i.MX8MP and i.MX8MQ
   - Make i.MX LPCG and SCU clocks return on registering failure
   - Kernel doc fixes
   - Add DAB hardware accelerator clocks on Renesas R-Car E3 and M3-N
   - Add timer (TMU) clocks on Renesas R-Car H3 ES1.0
   - Add Timer (TMU &amp; CMT) and thermal sensor (TSC) clocks on
     Renesas R-Car V3U
   - Sigma-delta modulation on Allwinner V3s audio PLL"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (82 commits)
  MAINTAINERS: add MT7621 CLOCK maintainer
  staging: mt7621-dts: use valid vendor 'mediatek' instead of invalid 'mtk'
  staging: mt7621-dts: make use of new 'mt7621-clk'
  clk: ralink: add clock driver for mt7621 SoC
  clk: uniphier: Fix potential infinite loop
  clk: qcom: rpmh: add support for SDX55 rpmh IPA clock
  clk: qcom: gcc-sdm845: get rid of the test clock
  clk: qcom: convert SDM845 Global Clock Controller to parent_data
  dt-bindings: clock: separate SDM845 GCC clock bindings
  clk: qcom: apss-ipq-pll: Add missing MODULE_DEVICE_TABLE
  clk: qcom: a53-pll: Add missing MODULE_DEVICE_TABLE
  clk: qcom: a7-pll: Add missing MODULE_DEVICE_TABLE
  dt: bindings: add mt7621-sysc device tree binding documentation
  dt-bindings: clock: add dt binding header for mt7621 clocks
  clk: samsung: Remove redundant dev_err calls
  clk: zynqmp: pll: add set_pll_mode to check condition in zynqmp_pll_enable
  clk: zynqmp: move zynqmp_pll_set_mode out of round_rate callback
  clk: zynqmp: Drop dependency on ARCH_ZYNQMP
  clk: zynqmp: Enable the driver if ZYNQMP_FIRMWARE is selected
  clk: qcom: gcc-sm8350: use ARRAY_SIZE instead of specifying num_parents
  ...
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge branches 'clk-cleanup', 'clk-renesas', 'clk-socfpga', 'clk-allwinner' and 'clk-qcom' into clk-next</title>
<updated>2021-04-27T23:34:28+00:00</updated>
<author>
<name>Stephen Boyd</name>
<email>sboyd@kernel.org</email>
</author>
<published>2021-04-27T23:34:28+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=c3ad321932ed29b85ceed38a716a6e063e996ff5'/>
<id>c3ad321932ed29b85ceed38a716a6e063e996ff5</id>
<content type='text'>
 - Use clk_hw pointers in socfpga driver
 - Cleanup parent data in qcom clk drivers

* clk-cleanup:
  clk: Drop double "if" in clk_core_determine_round_nolock() comment
  clk: at91: Trivial typo fixes in the file sama7g5.c
  clk: use clk_core_enable_lock() a bit more

* clk-renesas:
  clk: renesas: Zero init clk_init_data
  clk: renesas: Couple of spelling fixes
  clk: renesas: r8a779a0: Add CMT clocks
  clk: renesas: r8a7795: Add TMU clocks
  clk: renesas: r8a779a0: Add TSC clock
  clk: renesas: r8a779a0: Add TMU clocks
  clk: renesas: r8a77965: Add DAB clock
  clk: renesas: r8a77990: Add DAB clock

* clk-socfpga:
  clk: socfpga: remove redundant initialization of variable div
  clk: socfpga: arria10: Fix memory leak of socfpga_clk on error return
  clk: socfpga: Fix code formatting
  clk: socfpga: Convert to s10/agilex/n5x to use clk_hw
  clk: socfpga: arria10: convert to use clk_hw
  clk: socfpga: use clk_hw_register for a5/c5

* clk-allwinner:
  clk: sunxi: Demote non-conformant kernel-doc headers
  clk: sunxi-ng: v3s: use sigma-delta modulation for audio-pll

* clk-qcom: (45 commits)
  clk: qcom: rpmh: add support for SDX55 rpmh IPA clock
  clk: qcom: gcc-sdm845: get rid of the test clock
  clk: qcom: convert SDM845 Global Clock Controller to parent_data
  dt-bindings: clock: separate SDM845 GCC clock bindings
  clk: qcom: apss-ipq-pll: Add missing MODULE_DEVICE_TABLE
  clk: qcom: a53-pll: Add missing MODULE_DEVICE_TABLE
  clk: qcom: a7-pll: Add missing MODULE_DEVICE_TABLE
  clk: qcom: gcc-sm8350: use ARRAY_SIZE instead of specifying num_parents
  clk: qcom: gcc-sm8250: use ARRAY_SIZE instead of specifying num_parents
  clk: qcom: gcc-sm8150: use ARRAY_SIZE instead of specifying num_parents
  clk: qcom: gcc-sc8180x: use ARRAY_SIZE instead of specifying num_parents
  clk: qcom: gcc-sc7180: use ARRAY_SIZE instead of specifying num_parents
  clk: qcom: videocc-sm8250: use parent_hws where possible
  clk: qcom: videocc-sm8150: use parent_hws where possible
  clk: qcom: gpucc-sm8250: use parent_hws where possible
  clk: qcom: gpucc-sm8150: use parent_hws where possible
  clk: qcom: gcc-sm8350: use parent_hws where possible
  clk: qcom: gcc-sm8250: use parent_hws where possible
  clk: qcom: gcc-sm8150: use parent_hws where possible
  clk: qcom: gcc-sdx55: use parent_hws where possible
  ...
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
 - Use clk_hw pointers in socfpga driver
 - Cleanup parent data in qcom clk drivers

* clk-cleanup:
  clk: Drop double "if" in clk_core_determine_round_nolock() comment
  clk: at91: Trivial typo fixes in the file sama7g5.c
  clk: use clk_core_enable_lock() a bit more

* clk-renesas:
  clk: renesas: Zero init clk_init_data
  clk: renesas: Couple of spelling fixes
  clk: renesas: r8a779a0: Add CMT clocks
  clk: renesas: r8a7795: Add TMU clocks
  clk: renesas: r8a779a0: Add TSC clock
  clk: renesas: r8a779a0: Add TMU clocks
  clk: renesas: r8a77965: Add DAB clock
  clk: renesas: r8a77990: Add DAB clock

* clk-socfpga:
  clk: socfpga: remove redundant initialization of variable div
  clk: socfpga: arria10: Fix memory leak of socfpga_clk on error return
  clk: socfpga: Fix code formatting
  clk: socfpga: Convert to s10/agilex/n5x to use clk_hw
  clk: socfpga: arria10: convert to use clk_hw
  clk: socfpga: use clk_hw_register for a5/c5

* clk-allwinner:
  clk: sunxi: Demote non-conformant kernel-doc headers
  clk: sunxi-ng: v3s: use sigma-delta modulation for audio-pll

* clk-qcom: (45 commits)
  clk: qcom: rpmh: add support for SDX55 rpmh IPA clock
  clk: qcom: gcc-sdm845: get rid of the test clock
  clk: qcom: convert SDM845 Global Clock Controller to parent_data
  dt-bindings: clock: separate SDM845 GCC clock bindings
  clk: qcom: apss-ipq-pll: Add missing MODULE_DEVICE_TABLE
  clk: qcom: a53-pll: Add missing MODULE_DEVICE_TABLE
  clk: qcom: a7-pll: Add missing MODULE_DEVICE_TABLE
  clk: qcom: gcc-sm8350: use ARRAY_SIZE instead of specifying num_parents
  clk: qcom: gcc-sm8250: use ARRAY_SIZE instead of specifying num_parents
  clk: qcom: gcc-sm8150: use ARRAY_SIZE instead of specifying num_parents
  clk: qcom: gcc-sc8180x: use ARRAY_SIZE instead of specifying num_parents
  clk: qcom: gcc-sc7180: use ARRAY_SIZE instead of specifying num_parents
  clk: qcom: videocc-sm8250: use parent_hws where possible
  clk: qcom: videocc-sm8150: use parent_hws where possible
  clk: qcom: gpucc-sm8250: use parent_hws where possible
  clk: qcom: gpucc-sm8150: use parent_hws where possible
  clk: qcom: gcc-sm8350: use parent_hws where possible
  clk: qcom: gcc-sm8250: use parent_hws where possible
  clk: qcom: gcc-sm8150: use parent_hws where possible
  clk: qcom: gcc-sdx55: use parent_hws where possible
  ...
</pre>
</div>
</content>
</entry>
<entry>
<title>clk: socfpga: fix iomem pointer cast on 64-bit</title>
<updated>2021-04-09T07:24:30+00:00</updated>
<author>
<name>Krzysztof Kozlowski</name>
<email>krzysztof.kozlowski@canonical.com</email>
</author>
<published>2021-03-14T11:07:09+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=36841008059caec9667459a7e126efac6379676b'/>
<id>36841008059caec9667459a7e126efac6379676b</id>
<content type='text'>
Pointers should be cast with uintptr_t instead of integer.  This fixes
warning when compile testing on ARM64:

  drivers/clk/socfpga/clk-gate.c: In function ‘socfpga_clk_recalc_rate’:
  drivers/clk/socfpga/clk-gate.c:102:7: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast]

Fixes: b7cec13f082f ("clk: socfpga: Look for the GPIO_DB_CLK by its offset")
Signed-off-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;
Acked-by: Dinh Nguyen &lt;dinguyen@kernel.org&gt;
Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Pointers should be cast with uintptr_t instead of integer.  This fixes
warning when compile testing on ARM64:

  drivers/clk/socfpga/clk-gate.c: In function ‘socfpga_clk_recalc_rate’:
  drivers/clk/socfpga/clk-gate.c:102:7: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast]

Fixes: b7cec13f082f ("clk: socfpga: Look for the GPIO_DB_CLK by its offset")
Signed-off-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;
Acked-by: Dinh Nguyen &lt;dinguyen@kernel.org&gt;
Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>clk: socfpga: remove redundant initialization of variable div</title>
<updated>2021-04-07T23:30:23+00:00</updated>
<author>
<name>Colin Ian King</name>
<email>colin.king@canonical.com</email>
</author>
<published>2021-04-06T18:27:46+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=52d1a8da40b3c3e165e7b89d1a21a48da196792f'/>
<id>52d1a8da40b3c3e165e7b89d1a21a48da196792f</id>
<content type='text'>
The variable div is being initialized with a value that is
never read and it is being updated later with a new value.  The
initialization is redundant and can be removed.

Addresses-Coverity: ("Unused value")
Signed-off-by: Colin Ian King &lt;colin.king@canonical.com&gt;
Link: https://lore.kernel.org/r/20210406182746.432861-1-colin.king@canonical.com
Acked-by: Dinh Nguyen &lt;dinguyen@kernel.org&gt;
Signed-off-by: Stephen Boyd &lt;sboyd@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The variable div is being initialized with a value that is
never read and it is being updated later with a new value.  The
initialization is redundant and can be removed.

Addresses-Coverity: ("Unused value")
Signed-off-by: Colin Ian King &lt;colin.king@canonical.com&gt;
Link: https://lore.kernel.org/r/20210406182746.432861-1-colin.king@canonical.com
Acked-by: Dinh Nguyen &lt;dinguyen@kernel.org&gt;
Signed-off-by: Stephen Boyd &lt;sboyd@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>clk: socfpga: arria10: Fix memory leak of socfpga_clk on error return</title>
<updated>2021-04-07T23:29:31+00:00</updated>
<author>
<name>Colin Ian King</name>
<email>colin.king@canonical.com</email>
</author>
<published>2021-04-06T17:01:15+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=657d4d1934f75a2d978c3cf2086495eaa542e7a9'/>
<id>657d4d1934f75a2d978c3cf2086495eaa542e7a9</id>
<content type='text'>
There is an error return path that is not kfree'ing socfpga_clk leading
to a memory leak. Fix this by adding in the missing kfree call.

Addresses-Coverity: ("Resource leak")
Signed-off-by: Colin Ian King &lt;colin.king@canonical.com&gt;
Link: https://lore.kernel.org/r/20210406170115.430990-1-colin.king@canonical.com
Acked-by: Dinh Nguyen &lt;dinguyen@kernel.org&gt;
Reviewed-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;
Signed-off-by: Stephen Boyd &lt;sboyd@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
There is an error return path that is not kfree'ing socfpga_clk leading
to a memory leak. Fix this by adding in the missing kfree call.

Addresses-Coverity: ("Resource leak")
Signed-off-by: Colin Ian King &lt;colin.king@canonical.com&gt;
Link: https://lore.kernel.org/r/20210406170115.430990-1-colin.king@canonical.com
Acked-by: Dinh Nguyen &lt;dinguyen@kernel.org&gt;
Reviewed-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;
Signed-off-by: Stephen Boyd &lt;sboyd@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>clk: socfpga: Fix code formatting</title>
<updated>2021-03-31T02:31:26+00:00</updated>
<author>
<name>Stephen Boyd</name>
<email>sboyd@kernel.org</email>
</author>
<published>2021-03-31T02:27:02+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=abbe1eff907f38d82de8a94000f15b56f6a0204b'/>
<id>abbe1eff907f38d82de8a94000f15b56f6a0204b</id>
<content type='text'>
This function's parameters are oddly formatted. Looks like a newline was
missed or something. Fix it.

Cc: Dinh Nguyen &lt;dinguyen@kernel.org&gt;
Link: https://lore.kernel.org/r/20210331023119.3294893-1-sboyd@kernel.org
Signed-off-by: Stephen Boyd &lt;sboyd@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This function's parameters are oddly formatted. Looks like a newline was
missed or something. Fix it.

Cc: Dinh Nguyen &lt;dinguyen@kernel.org&gt;
Link: https://lore.kernel.org/r/20210331023119.3294893-1-sboyd@kernel.org
Signed-off-by: Stephen Boyd &lt;sboyd@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>clk: socfpga: Convert to s10/agilex/n5x to use clk_hw</title>
<updated>2021-03-31T02:26:26+00:00</updated>
<author>
<name>Dinh Nguyen</name>
<email>dinguyen@kernel.org</email>
</author>
<published>2021-03-02T21:41:51+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=ba7e258425acd8587b62196e3f00f62c0f7625d0'/>
<id>ba7e258425acd8587b62196e3f00f62c0f7625d0</id>
<content type='text'>
As recommended by Stephen Boyd, convert the Agilex/Stratix10/n5x clock
driver to use the clk_hw registration method.

Suggested-by: Stephen Boyd &lt;sboyd@kernel.org&gt;
Signed-off-by: Dinh Nguyen &lt;dinguyen@kernel.org&gt;
Link: https://lore.kernel.org/r/20210302214151.1333447-3-dinguyen@kernel.org
Signed-off-by: Stephen Boyd &lt;sboyd@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
As recommended by Stephen Boyd, convert the Agilex/Stratix10/n5x clock
driver to use the clk_hw registration method.

Suggested-by: Stephen Boyd &lt;sboyd@kernel.org&gt;
Signed-off-by: Dinh Nguyen &lt;dinguyen@kernel.org&gt;
Link: https://lore.kernel.org/r/20210302214151.1333447-3-dinguyen@kernel.org
Signed-off-by: Stephen Boyd &lt;sboyd@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>clk: socfpga: arria10: convert to use clk_hw</title>
<updated>2021-03-31T02:26:26+00:00</updated>
<author>
<name>Dinh Nguyen</name>
<email>dinguyen@kernel.org</email>
</author>
<published>2021-03-02T21:41:50+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=8c489216c3e103a24856fd676fc5f51619c2e052'/>
<id>8c489216c3e103a24856fd676fc5f51619c2e052</id>
<content type='text'>
As recommended by Stephen Boyd, convert the Arria10 clock driver to use
the clk_hw registration method.

Suggested-by: Stephen Boyd &lt;sboyd@kernel.org&gt;
Signed-off-by: Dinh Nguyen &lt;dinguyen@kernel.org&gt;
Link: https://lore.kernel.org/r/20210302214151.1333447-2-dinguyen@kernel.org
Signed-off-by: Stephen Boyd &lt;sboyd@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
As recommended by Stephen Boyd, convert the Arria10 clock driver to use
the clk_hw registration method.

Suggested-by: Stephen Boyd &lt;sboyd@kernel.org&gt;
Signed-off-by: Dinh Nguyen &lt;dinguyen@kernel.org&gt;
Link: https://lore.kernel.org/r/20210302214151.1333447-2-dinguyen@kernel.org
Signed-off-by: Stephen Boyd &lt;sboyd@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>clk: socfpga: use clk_hw_register for a5/c5</title>
<updated>2021-03-31T02:26:26+00:00</updated>
<author>
<name>Dinh Nguyen</name>
<email>dinguyen@kernel.org</email>
</author>
<published>2021-03-02T21:41:49+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=2c2b9c6067170de2a63e7e3d9f5bb205b870de7c'/>
<id>2c2b9c6067170de2a63e7e3d9f5bb205b870de7c</id>
<content type='text'>
As recommended by Stephen Boyd, convert the cyclone5/arria5 clock driver
to use the clk_hw registration method.

Suggested-by: Stephen Boyd &lt;sboyd@kernel.org&gt;
Signed-off-by: Dinh Nguyen &lt;dinguyen@kernel.org&gt;
Link: https://lore.kernel.org/r/20210302214151.1333447-1-dinguyen@kernel.org
Signed-off-by: Stephen Boyd &lt;sboyd@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
As recommended by Stephen Boyd, convert the cyclone5/arria5 clock driver
to use the clk_hw registration method.

Suggested-by: Stephen Boyd &lt;sboyd@kernel.org&gt;
Signed-off-by: Dinh Nguyen &lt;dinguyen@kernel.org&gt;
Link: https://lore.kernel.org/r/20210302214151.1333447-1-dinguyen@kernel.org
Signed-off-by: Stephen Boyd &lt;sboyd@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>clk: socfpga: fix iomem pointer cast on 64-bit</title>
<updated>2021-03-29T19:04:38+00:00</updated>
<author>
<name>Krzysztof Kozlowski</name>
<email>krzysztof.kozlowski@canonical.com</email>
</author>
<published>2021-03-14T11:07:09+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=2867b9746cef78745c594894aece6f8ef826e0b4'/>
<id>2867b9746cef78745c594894aece6f8ef826e0b4</id>
<content type='text'>
Pointers should be cast with uintptr_t instead of integer.  This fixes
warning when compile testing on ARM64:

  drivers/clk/socfpga/clk-gate.c: In function ‘socfpga_clk_recalc_rate’:
  drivers/clk/socfpga/clk-gate.c:102:7: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast]

Fixes: b7cec13f082f ("clk: socfpga: Look for the GPIO_DB_CLK by its offset")
Signed-off-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;
Acked-by: Dinh Nguyen &lt;dinguyen@kernel.org&gt;
Link: https://lore.kernel.org/r/20210314110709.32599-1-krzysztof.kozlowski@canonical.com
Signed-off-by: Stephen Boyd &lt;sboyd@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Pointers should be cast with uintptr_t instead of integer.  This fixes
warning when compile testing on ARM64:

  drivers/clk/socfpga/clk-gate.c: In function ‘socfpga_clk_recalc_rate’:
  drivers/clk/socfpga/clk-gate.c:102:7: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast]

Fixes: b7cec13f082f ("clk: socfpga: Look for the GPIO_DB_CLK by its offset")
Signed-off-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;
Acked-by: Dinh Nguyen &lt;dinguyen@kernel.org&gt;
Link: https://lore.kernel.org/r/20210314110709.32599-1-krzysztof.kozlowski@canonical.com
Signed-off-by: Stephen Boyd &lt;sboyd@kernel.org&gt;
</pre>
</div>
</content>
</entry>
</feed>
