linux-toradex.git/drivers/clk, branch v3.10.78

clk: sunxi: Support factor clocks with N factor starting not from 0

2015-03-18T12:22:34+00:00

commit 9a5e6c7eb5ccbb5f0d3a1dffce135f0a727f40e1 upstream.

The PLLs on newer Allwinner SoC's, such as the A31 and A23, have a
N multiplier factor that starts from 1, not 0.

This patch adds an option to the factor clk driver's config data
structures to specify the base value of N.

Signed-off-by: Chen-Yu Tsai 
Acked-by: Maxime Ripard 
Signed-off-by: Maxime Ripard 
Signed-off-by: Greg Kroah-Hartman

clk: spear3xx: Use proper control register offset

2014-07-17T22:58:02+00:00

commit 15ebb05248d025534773c9ef64915bd888f04e4b upstream.

The control register is at offset 0x10, not 0x0. This is wreckaged
since commit 5df33a62c (SPEAr: Switch to common clock framework).

Signed-off-by: Thomas Gleixner 
Acked-by: Viresh Kumar 
Signed-off-by: Mike Turquette 
Signed-off-by: Greg Kroah-Hartman

clk: vexpress: NULL dereference on error path

2014-06-07T20:25:35+00:00

commit 6b4ed8b00e93bd31f24a25f59ed8d1b808d0cc00 upstream.

If the allocation fails then we dereference the NULL in the error path.
Just return directly.

Fixes: ed27ff1db869 ('clk: Versatile Express clock generators ("osc") driver')
Signed-off-by: Dan Carpenter 
Signed-off-by: Pawel Moll 
Signed-off-by: Greg Kroah-Hartman

clk: exynos5250: fix sysmmu_mfc{l,r} gate clocks

2014-01-15T23:28:52+00:00

commit 97c3557c3e0413efb1f021f582d1459760e22727 upstream.

The gate clocks for the MFC sysmmus appear to be flipped, i.e.
GATE_IP_MFC[2] gates sysmmu_mfcl and GATE_IP_MFC[1] gates sysmmu_mfcr.
Fix this so that the MFC will start up.

Signed-off-by: Andrew Bresticker 
Signed-off-by: Sachin Kamat 
Acked-by: Mike Turquette 
Signed-off-by: Tomasz Figa 
Signed-off-by: Greg Kroah-Hartman

clk: samsung: exynos5250: Add CLK_IGNORE_UNUSED flag for the sysreg clock

2014-01-15T23:28:52+00:00

commit 2feed5aecf5f367b92bd6b6e92afe9e3de466907 upstream.

The sysreg (system register) generates control signals for various blocks
like disp1blk, i2c, mipi, usb etc. However, it gets disabled as an unused
clock at boot-up. This can lead to failures in operation of above blocks,
because they can not be configured properly if this clock is disabled.

Signed-off-by: Abhilash Kesavan 
Acked-by: Mike Turquette 
[t.figa: Updated patch description.]
Signed-off-by: Tomasz Figa 
Signed-off-by: Greg Kroah-Hartman

clk: samsung: exynos4: Correct SRC_MFC register

2014-01-15T23:28:52+00:00

commit 5fdd1b56be51b1ec4dbde5b213d649ac717442da upstream.

The SRC_MFC register offset was incorrect, which could cause have caused
wrong calculation of rate of sclk_mfc clock, that could in turn lead to
incorrect operation of MFC. This patch corrects it.

Signed-off-by: Seung-Woo Kim 
Acked-by: Mike Turquette 
[t.figa: Updated patch description]
Signed-off-by: Tomasz Figa 
Signed-off-by: Greg Kroah-Hartman

clk: clk-divider: fix divisor > 255 bug

2014-01-15T23:28:52+00:00

commit 778037e1ccb75609846deca9e419449c1dc137fa upstream.

Commit 6d9252bd9a4bb (clk: Add support for power of two type dividers)
merged in v3.6 added the _get_val function to convert a divisor value to
a register field value depending on the flags. However it used the type
u8 for the div field, causing divisors larger than 255 to be masked
and the resultant clock rate to be too high.

E.g. in my case an 11bit divider was supposed to divide 24.576 MHz down
to 32.768KHz. The divisor was correctly calculated as 750 (0x2ee). This
was masked to 238 (0xee) resulting in a frequency of 103.26KHz.

Signed-off-by: James Hogan 
Cc: Rajendra Nayak 
Cc: linux-arm-kernel@lists.infradead.org
Signed-off-by: Mike Turquette 
Signed-off-by: Greg Kroah-Hartman

clk: armada-370: fix tclk frequencies

2013-12-04T18:57:19+00:00

commit 1022c75f5abd3a3b25e679bc8793d21bedd009b4 upstream.

This patch fixes the tclk frequency array for the Armada-370 SoC.
This bug has been introduced by commit 6b72333d
("clk: mvebu: add Armada 370 SoC-centric clock init").

A wrong tclk frequency affects the following drivers: mvsdio, mvneta,
i2c-mv64xxx and mvebu-devbus. This list may be incomplete.

About the mvneta Ethernet driver, note that the tclk frequency is used
to compute the Rx time coalescence. Then, this bug harms the coalescence
configuration and also degrades the networking performances with the
default values.

Signed-off-by: Simon Guinot 
Cc: Andrew Lunn 
Cc: Gregory CLEMENT 
Cc: Sebastian Hesselbarth 
Acked-by: Jason Cooper 
Signed-off-by: Michael Turquette 
Signed-off-by: Greg Kroah-Hartman

clk: fixup argument order when setting VCO parameters

2013-11-13T03:05:33+00:00

commit 2f9f64bc5aa31836810cd25301aa4772ad73ebab upstream.

The order of arguments in the call to vco_set() for the ICST clocks appears to
have been switched in error, which results in the VCO not being initialised
correctly. This in turn stops the integrated LCD on things like Integrator/CP
from working correctly.

This patch fixes the order and restores the expected functionality.

Reviewed-by: Linus Walleij 
Signed-off-by: Jonathan Austin 
Signed-off-by: Mike Turquette 
Signed-off-by: Greg Kroah-Hartman

clk: wm831x: Initialise wm831x pointer on init

2013-09-27T00:18:30+00:00

commit 08442ce993deeb15a070c14cc3f3459e87d111e0 upstream.

Otherwise any attempt to interact with the hardware will crash. This is
what happens when drivers get written blind.

Signed-off-by: Mark Brown 
Signed-off-by: Mike Turquette 
Signed-off-by: Greg Kroah-Hartman