linux-toradex.git/drivers/clk, branch v6.6-rc3 Linux kernel for Apalis and Colibri modules Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux 2023-08-31T02:53:39+00:00 Linus Torvalds torvalds@linux-foundation.org 2023-08-31T02:53:39+00:00 f8fd5c24830fbc259ba7d5e72817c9867c01b8e8 Pull clk subsystem updates from Stephen Boyd: "This pull request is full of clk driver changes. In fact, there aren't any changes to the clk framework this time around. That's probably because everyone was on vacation (yours truly included). We did lose a couple clk drivers this time around because nobody was using those devices. That skews the diffstat a bit, but either way, nothing looks out of the ordinary here. The usual suspects are chugging along adding support for more SoCs and fixing bugs. If I had to choose, I'd say the theme for the past few months has been "polish". There's quite a few patches that migrate to devm_platform_ioremap_resource() in here. And there's more than a handful of patches that move the NR_CLKS define from the DT binding header to the driver. There's even patches that migrate drivers to use clk_parent_data and clk_hw to describe clk tree topology. It seems that the spring (summer?) cleaning bug got some folks, or the semiconductor shortage finally hit the software side. New Drivers: - StarFive JH7110 SoC clock drivers - Qualcomm IPQ5018 Global Clock Controller driver - Versa3 clk generator to support 48KHz playback/record with audio codec on RZ/G2L SMARC EVK Removed Drivers: - Remove non-OF mmp clk drivers - Remove OXNAS clk driver Updates: - Add __counted_by to struct clk_hw_onecell_data and struct spmi_pmic_div_clk_cc - Move defines for numbers of clks (NR_CLKS) from DT headers to drivers - Introduce kstrdup_and_replace() and use it - Add PLL rates for Rockchip rk3568 - Add the display clock tree for Rockchip rv1126 - Add Audio Clock Generator (ADG) clocks on Renesas R-Car Gen3 and RZ/G2 SoCs - Convert sun9i-mmc clock to use devm_platform_get_and_ioremap_resource() - Fix function name in a comment in ccu_mmc_timing.c - Parameter name correction for ccu_nkm_round_rate() - Implement CLK_SET_RATE_PARENT for Allwinner NKM clocks, i.e. consider alternative parent rates when determining clock rates - Set CLK_SET_RATE_PARENT for Allwinner A64 pll-mipi - Support finding closest (as opposed to closest but not higher) clock rate for NM, NKM, mux and div type clocks, as use it for Allwinner A64 pll-video0 - Prefer current parent rate if able to generate ideal clock rate for Allwinner NKM clocks - Clean up Qualcomm SMD RPM driver, with interconnect bus clocks moved out to the interconnect drivers - Fix various PM runtime bugs across many Qualcomm clk drivers - Migrate Qualcomm MDM9615 is to parent_hw and parent_data - Add network related resets on Qualcomm IPQ4019 - Add a couple missing USB related clocks to Qualcomm IPQ9574 - Add missing gpll0_sleep_clk_src to Qualcomm MSM8917 global clock controller - In the Qualcomm QDU1000 global clock controller, GDSCs, clkrefs, and GPLL1 are added, while PCIe pipe clock, SDCC rcg ops are corrected - Add missing GDSCs to and correct GDSCs for the SC8280XP global clock controller driver - Support retention for the Qualcomm SC8280XP display clock controller GDSCs. - Qualcommm's SDCC apps_clk_src is marked with CLK_OPS_PARENT_ENABLE to fix issues with missing parent clocks across sc7180, sm7150, sm6350 and sm8250, while sm8450 is corrected to use floor ops - Correct Qualcomm SM6350 GPU clock controller's clock supplies - Drop unwanted clocks from the Qualcomm IPQ5332 GCC driver - Add missing OXILICX GDSC to Qualcomm MSM8226 GCC - Change the delay in the Qualcomm reset controller to fsleep() for correctness - Extend the Qualcomm SM83550 Video clock controller to support SC8280XP - Add graphics clock support on Renesas RZ/G2M, RZ/G2N, RZ/G2E, and R-Car H3, M3-W, and M3-N SoCs - Add Clocked Serial Interface (CSI) clocks on Renesas RZ/V2M - Add PWM (MTU3) clock and reset on Renesas RZ/G2UL and RZ/Five - Add the PDM IPC clock for i.MX93 - Add 519.75MHz frequency support for i.MX9 PLL - Simplify the .determine_rate() implementation for i.MX GPR mux - Make the i.MX8QXP LPCG clock use devm_platform_ioremap_resource() - Add the audio mux clock to i.MX8 - Fix the SPLL2 MULT range for PLLv4 - Update the SPLL2 type in i.MX8ULP - Fix the SAI4 clock on i.MX8MP - Add silicon revision print for i.MX25 on clocks init - Drop the return value from __mx25_clocks_init() - Fix the clock pauses on no-op set_rate for i.MX8M composite clock - Drop restrictions for i.MX PLL14xx and fix its max prediv value - Drop the 393216000 and 361267200 from i.MX PLL14xx rate table to allow glitch free switching" * tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (207 commits) clk: qcom: Fix SM_GPUCC_8450 dependencies clk: lmk04832: Support using PLL1_LD as SPI readback pin clk: lmk04832: Don't disable vco clock on probe fail clk: lmk04832: Set missing parent_names for output clocks clk: mvebu: Convert to devm_platform_ioremap_resource() clk: nuvoton: Convert to devm_platform_ioremap_resource() clk: socfpga: agilex: Convert to devm_platform_ioremap_resource() clk: ti: Use devm_platform_get_and_ioremap_resource() clk: mediatek: Convert to devm_platform_ioremap_resource() clk: hsdk-pll: Convert to devm_platform_ioremap_resource() clk: gemini: Convert to devm_platform_ioremap_resource() clk: fsl-sai: Convert to devm_platform_ioremap_resource() clk: bm1880: Convert to devm_platform_ioremap_resource() clk: axm5516: Convert to devm_platform_ioremap_resource() clk: actions: Convert to devm_platform_ioremap_resource() clk: cdce925: Remove redundant of_match_ptr() clk: pxa910: Move number of clocks to driver source clk: pxa1928: Move number of clocks to driver source clk: pxa168: Move number of clocks to driver source clk: mmp2: Move number of clocks to driver source ... 
Pull clk subsystem updates from Stephen Boyd:
 "This pull request is full of clk driver changes. In fact, there aren't
  any changes to the clk framework this time around. That's probably
  because everyone was on vacation (yours truly included). We did lose a
  couple clk drivers this time around because nobody was using those
  devices. That skews the diffstat a bit, but either way, nothing looks
  out of the ordinary here. The usual suspects are chugging along adding
  support for more SoCs and fixing bugs.

  If I had to choose, I'd say the theme for the past few months has been
  "polish". There's quite a few patches that migrate to
  devm_platform_ioremap_resource() in here. And there's more than a
  handful of patches that move the NR_CLKS define from the DT binding
  header to the driver. There's even patches that migrate drivers to use
  clk_parent_data and clk_hw to describe clk tree topology. It seems
  that the spring (summer?) cleaning bug got some folks, or the
  semiconductor shortage finally hit the software side.

  New Drivers:
   - StarFive JH7110 SoC clock drivers
   - Qualcomm IPQ5018 Global Clock Controller driver
   - Versa3 clk generator to support 48KHz playback/record with audio
     codec on RZ/G2L SMARC EVK

  Removed Drivers:
   - Remove non-OF mmp clk drivers
   - Remove OXNAS clk driver

  Updates:
   - Add __counted_by to struct clk_hw_onecell_data and struct
     spmi_pmic_div_clk_cc
   - Move defines for numbers of clks (NR_CLKS) from DT headers to
     drivers
   - Introduce kstrdup_and_replace() and use it
   - Add PLL rates for Rockchip rk3568
   - Add the display clock tree for Rockchip rv1126
   - Add Audio Clock Generator (ADG) clocks on Renesas R-Car Gen3 and
     RZ/G2 SoCs
   - Convert sun9i-mmc clock to use
     devm_platform_get_and_ioremap_resource()
   - Fix function name in a comment in ccu_mmc_timing.c
   - Parameter name correction for ccu_nkm_round_rate()
   - Implement CLK_SET_RATE_PARENT for Allwinner NKM clocks, i.e.
     consider alternative parent rates when determining clock rates
   - Set CLK_SET_RATE_PARENT for Allwinner A64 pll-mipi
   - Support finding closest (as opposed to closest but not higher)
     clock rate for NM, NKM, mux and div type clocks, as use it for
     Allwinner A64 pll-video0
   - Prefer current parent rate if able to generate ideal clock rate for
     Allwinner NKM clocks
   - Clean up Qualcomm SMD RPM driver, with interconnect bus clocks
     moved out to the interconnect drivers
   - Fix various PM runtime bugs across many Qualcomm clk drivers
   - Migrate Qualcomm MDM9615 is to parent_hw and parent_data
   - Add network related resets on Qualcomm IPQ4019
   - Add a couple missing USB related clocks to Qualcomm IPQ9574
   - Add missing gpll0_sleep_clk_src to Qualcomm MSM8917 global clock
     controller
   - In the Qualcomm QDU1000 global clock controller, GDSCs, clkrefs,
     and GPLL1 are added, while PCIe pipe clock, SDCC rcg ops are
     corrected
   - Add missing GDSCs to and correct GDSCs for the SC8280XP global
     clock controller driver
   - Support retention for the Qualcomm SC8280XP display clock
     controller GDSCs.
   - Qualcommm's SDCC apps_clk_src is marked with CLK_OPS_PARENT_ENABLE
     to fix issues with missing parent clocks across sc7180, sm7150,
     sm6350 and sm8250, while sm8450 is corrected to use floor ops
   - Correct Qualcomm SM6350 GPU clock controller's clock supplies
   - Drop unwanted clocks from the Qualcomm IPQ5332 GCC driver
   - Add missing OXILICX GDSC to Qualcomm MSM8226 GCC
   - Change the delay in the Qualcomm reset controller to fsleep() for
     correctness
   - Extend the Qualcomm SM83550 Video clock controller to support
     SC8280XP
   - Add graphics clock support on Renesas RZ/G2M, RZ/G2N, RZ/G2E, and
     R-Car H3, M3-W, and M3-N SoCs
   - Add Clocked Serial Interface (CSI) clocks on Renesas RZ/V2M
   - Add PWM (MTU3) clock and reset on Renesas RZ/G2UL and RZ/Five
   - Add the PDM IPC clock for i.MX93
   - Add 519.75MHz frequency support for i.MX9 PLL
   - Simplify the .determine_rate() implementation for i.MX GPR mux
   - Make the i.MX8QXP LPCG clock use devm_platform_ioremap_resource()
   - Add the audio mux clock to i.MX8
   - Fix the SPLL2 MULT range for PLLv4
   - Update the SPLL2 type in i.MX8ULP
   - Fix the SAI4 clock on i.MX8MP
   - Add silicon revision print for i.MX25 on clocks init
   - Drop the return value from __mx25_clocks_init()
   - Fix the clock pauses on no-op set_rate for i.MX8M composite clock
   - Drop restrictions for i.MX PLL14xx and fix its max prediv value
   - Drop the 393216000 and 361267200 from i.MX PLL14xx rate table to
     allow glitch free switching"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (207 commits)
  clk: qcom: Fix SM_GPUCC_8450 dependencies
  clk: lmk04832: Support using PLL1_LD as SPI readback pin
  clk: lmk04832: Don't disable vco clock on probe fail
  clk: lmk04832: Set missing parent_names for output clocks
  clk: mvebu: Convert to devm_platform_ioremap_resource()
  clk: nuvoton: Convert to devm_platform_ioremap_resource()
  clk: socfpga: agilex: Convert to devm_platform_ioremap_resource()
  clk: ti: Use devm_platform_get_and_ioremap_resource()
  clk: mediatek: Convert to devm_platform_ioremap_resource()
  clk: hsdk-pll: Convert to devm_platform_ioremap_resource()
  clk: gemini: Convert to devm_platform_ioremap_resource()
  clk: fsl-sai: Convert to devm_platform_ioremap_resource()
  clk: bm1880: Convert to devm_platform_ioremap_resource()
  clk: axm5516: Convert to devm_platform_ioremap_resource()
  clk: actions: Convert to devm_platform_ioremap_resource()
  clk: cdce925: Remove redundant of_match_ptr()
  clk: pxa910: Move number of clocks to driver source
  clk: pxa1928: Move number of clocks to driver source
  clk: pxa168: Move number of clocks to driver source
  clk: mmp2: Move number of clocks to driver source
  ...
Merge branch 'clk-qcom' into clk-next 2023-08-30T21:39:58+00:00 Stephen Boyd sboyd@kernel.org 2023-08-30T21:39:58+00:00 41680df0975e04b959a28bf6ab85fd6a307ae0ea * clk-qcom: (87 commits) clk: qcom: Fix SM_GPUCC_8450 dependencies clk: qcom: smd-rpm: Set XO rate and CLK_IS_CRITICAL on PCNoC clk: qcom: smd-rpm: Add a way to define bus clocks with rate and flags clk: qcom: gcc-ipq5018: change some variable static clk: qcom: gcc-ipq4019: add missing networking resets dt-bindings: clock: qcom: ipq4019: add missing networking resets clk: qcom: gcc-msm8917: Enable GPLL0_SLEEP_CLK_SRC dt-bindings: clock: gcc-msm8917: Add definition for GPLL0_SLEEP_CLK_SRC clk: qcom: gcc-qdu1000: Update the RCGs ops clk: qcom: gcc-qdu1000: Update the SDCC clock RCG ops clk: qcom: gcc-qdu1000: Add support for GDSCs clk: qcom: gcc-qdu1000: Add gcc_ddrss_ecpri_gsi_clk support clk: qcom: gcc-qdu1000: Register gcc_gpll1_out_even clock clk: qcom: gcc-qdu1000: Fix clkref clocks handling clk: qcom: gcc-qdu1000: Fix gcc_pcie_0_pipe_clk_src clock handling dt-bindings: clock: Update GCC clocks for QDU1000 and QRU1000 SoCs clk: qcom: gcc-sm8450: Use floor ops for SDCC RCGs clk: qcom: ipq5332: drop the gcc_apss_axi_clk_src clock clk: qcom: ipq5332: drop the mem noc clocks clk: qcom: gcc-msm8998: Don't check halt bit on some branch clks ... 
* clk-qcom: (87 commits)
  clk: qcom: Fix SM_GPUCC_8450 dependencies
  clk: qcom: smd-rpm: Set XO rate and CLK_IS_CRITICAL on PCNoC
  clk: qcom: smd-rpm: Add a way to define bus clocks with rate and flags
  clk: qcom: gcc-ipq5018: change some variable static
  clk: qcom: gcc-ipq4019: add missing networking resets
  dt-bindings: clock: qcom: ipq4019: add missing networking resets
  clk: qcom: gcc-msm8917: Enable GPLL0_SLEEP_CLK_SRC
  dt-bindings: clock: gcc-msm8917: Add definition for GPLL0_SLEEP_CLK_SRC
  clk: qcom: gcc-qdu1000: Update the RCGs ops
  clk: qcom: gcc-qdu1000: Update the SDCC clock RCG ops
  clk: qcom: gcc-qdu1000: Add support for GDSCs
  clk: qcom: gcc-qdu1000: Add gcc_ddrss_ecpri_gsi_clk support
  clk: qcom: gcc-qdu1000: Register gcc_gpll1_out_even clock
  clk: qcom: gcc-qdu1000: Fix clkref clocks handling
  clk: qcom: gcc-qdu1000: Fix gcc_pcie_0_pipe_clk_src clock handling
  dt-bindings: clock: Update GCC clocks for QDU1000 and QRU1000 SoCs
  clk: qcom: gcc-sm8450: Use floor ops for SDCC RCGs
  clk: qcom: ipq5332: drop the gcc_apss_axi_clk_src clock
  clk: qcom: ipq5332: drop the mem noc clocks
  clk: qcom: gcc-msm8998: Don't check halt bit on some branch clks
  ...
Merge branches 'clk-imx', 'clk-samsung', 'clk-annotate', 'clk-marvell' and 'clk-lmk' into clk-next 2023-08-30T21:39:19+00:00 Stephen Boyd sboyd@kernel.org 2023-08-30T21:39:19+00:00 3462100cf38b192e7ef1b3a11c4f6d64c5e8066d - Add __counted_by to struct clk_hw_onecell_data and struct spmi_pmic_div_clk_cc - Remove non-OF mmp clk drivers - Move number of clks from DT headers to drivers * clk-imx: clk: imx: pll14xx: dynamically configure PLL for 393216000/361267200Hz clk: imx: pll14xx: align pdiv with reference manual clk: imx: composite-8m: fix clock pauses when set_rate would be a no-op clk: imx25: make __mx25_clocks_init return void clk: imx25: print silicon revision during init dt-bindings: clocks: imx8mp: make sai4 a dummy clock clk: imx8mp: fix sai4 clock clk: imx: imx8ulp: update SPLL2 type clk: imx: pllv4: Fix SPLL2 MULT range clk: imx: imx8: add audio clock mux driver dt-bindings: clock: fsl,imx8-acm: Add audio clock mux support clk: imx: clk-imx8qxp-lpcg: Convert to devm_platform_ioremap_resource() clk: imx: clk-gpr-mux: Simplify .determine_rate() clk: imx: Add 519.75MHz frequency support for imx9 pll clk: imx93: Add PDM IPG clk dt-bindings: clock: imx93: Add PDM IPG clk * clk-samsung: dt-bindings: clock: samsung: remove define with number of clocks clk: samsung: exynoautov9: do not define number of clocks in bindings clk: samsung: exynos850: do not define number of clocks in bindings clk: samsung: exynos7885: do not define number of clocks in bindings clk: samsung: exynos5433: do not define number of clocks in bindings clk: samsung: exynos5420: do not define number of clocks in bindings clk: samsung: exynos5410: do not define number of clocks in bindings clk: samsung: exynos5260: do not define number of clocks in bindings clk: samsung: exynos5250: do not define number of clocks in bindings clk: samsung: exynos4: do not define number of clocks in bindings clk: samsung: exynos3250: do not define number of clocks in bindings * clk-annotate: clk: qcom: clk-spmi-pmic-div: Annotate struct spmi_pmic_div_clk_cc with __counted_by clk: Annotate struct clk_hw_onecell_data with __counted_by * clk-marvell: clk: pxa910: Move number of clocks to driver source clk: pxa1928: Move number of clocks to driver source clk: pxa168: Move number of clocks to driver source clk: mmp2: Move number of clocks to driver source clk: mmp: Remove old non-OF clock drivers * clk-lmk: clk: lmk04832: Support using PLL1_LD as SPI readback pin clk: lmk04832: Don't disable vco clock on probe fail clk: lmk04832: Set missing parent_names for output clocks 
 - Add __counted_by to struct clk_hw_onecell_data and struct spmi_pmic_div_clk_cc
 - Remove non-OF mmp clk drivers
 - Move number of clks from DT headers to drivers

* clk-imx:
  clk: imx: pll14xx: dynamically configure PLL for 393216000/361267200Hz
  clk: imx: pll14xx: align pdiv with reference manual
  clk: imx: composite-8m: fix clock pauses when set_rate would be a no-op
  clk: imx25: make __mx25_clocks_init return void
  clk: imx25: print silicon revision during init
  dt-bindings: clocks: imx8mp: make sai4 a dummy clock
  clk: imx8mp: fix sai4 clock
  clk: imx: imx8ulp: update SPLL2 type
  clk: imx: pllv4: Fix SPLL2 MULT range
  clk: imx: imx8: add audio clock mux driver
  dt-bindings: clock: fsl,imx8-acm: Add audio clock mux support
  clk: imx: clk-imx8qxp-lpcg: Convert to devm_platform_ioremap_resource()
  clk: imx: clk-gpr-mux: Simplify .determine_rate()
  clk: imx: Add 519.75MHz frequency support for imx9 pll
  clk: imx93: Add PDM IPG clk
  dt-bindings: clock: imx93: Add PDM IPG clk

* clk-samsung:
  dt-bindings: clock: samsung: remove define with number of clocks
  clk: samsung: exynoautov9: do not define number of clocks in bindings
  clk: samsung: exynos850: do not define number of clocks in bindings
  clk: samsung: exynos7885: do not define number of clocks in bindings
  clk: samsung: exynos5433: do not define number of clocks in bindings
  clk: samsung: exynos5420: do not define number of clocks in bindings
  clk: samsung: exynos5410: do not define number of clocks in bindings
  clk: samsung: exynos5260: do not define number of clocks in bindings
  clk: samsung: exynos5250: do not define number of clocks in bindings
  clk: samsung: exynos4: do not define number of clocks in bindings
  clk: samsung: exynos3250: do not define number of clocks in bindings

* clk-annotate:
  clk: qcom: clk-spmi-pmic-div: Annotate struct spmi_pmic_div_clk_cc with __counted_by
  clk: Annotate struct clk_hw_onecell_data with __counted_by

* clk-marvell:
  clk: pxa910: Move number of clocks to driver source
  clk: pxa1928: Move number of clocks to driver source
  clk: pxa168: Move number of clocks to driver source
  clk: mmp2: Move number of clocks to driver source
  clk: mmp: Remove old non-OF clock drivers

* clk-lmk:
  clk: lmk04832: Support using PLL1_LD as SPI readback pin
  clk: lmk04832: Don't disable vco clock on probe fail
  clk: lmk04832: Set missing parent_names for output clocks
Merge branches 'clk-versa', 'clk-strdup', 'clk-amlogic', 'clk-allwinner' and 'clk-rockchip' into clk-next 2023-08-30T21:38:19+00:00 Stephen Boyd sboyd@kernel.org 2023-08-30T21:38:19+00:00 032bcf783ec227ff7a8d8aab863d6610ff7a1aef - Add Versa3 clk generator to support 48KHz playback/record with audio codec on RZ/G2L SMARC EVK - Introduce kstrdup_and_replace() and use it * clk-versa: clk: vc7: Use i2c_get_match_data() instead of device_get_match_data() clk: vc5: Use i2c_get_match_data() instead of device_get_match_data() clk: versaclock3: Switch to use i2c_driver's probe callback clk: Add support for versa3 clock driver dt-bindings: clock: Add Renesas versa3 clock generator bindings * clk-strdup: clk: ti: Replace kstrdup() + strreplace() with kstrdup_and_replace() clk: tegra: Replace kstrdup() + strreplace() with kstrdup_and_replace() driver core: Replace kstrdup() + strreplace() with kstrdup_and_replace() lib/string_helpers: Add kstrdup_and_replace() helper * clk-amlogic: (22 commits) dt-bindings: soc: amlogic: document System Control registers dt-bindings: clock: amlogic: convert amlogic,gxbb-aoclkc.txt to dt-schema dt-bindings: clock: amlogic: convert amlogic,gxbb-clkc.txt to dt-schema clk: meson: axg-audio: move bindings include to main driver clk: meson: meson8b: move bindings include to main driver clk: meson: a1: move bindings include to main driver clk: meson: eeclk: move bindings include to main driver clk: meson: aoclk: move bindings include to main driver dt-bindings: clk: axg-audio-clkc: expose all clock ids dt-bindings: clk: amlogic,a1-pll-clkc: expose all clock ids dt-bindings: clk: amlogic,a1-peripherals-clkc: expose all clock ids dt-bindings: clk: meson8b-clkc: expose all clock ids dt-bindings: clk: g12a-aoclkc: expose all clock ids dt-bindings: clk: g12a-clks: expose all clock ids dt-bindings: clk: axg-clkc: expose all clock ids dt-bindings: clk: gxbb-clkc: expose all clock ids clk: meson: migrate axg-audio out of hw_onecell_data to drop NR_CLKS clk: meson: migrate meson8b out of hw_onecell_data to drop NR_CLKS clk: meson: migrate a1 clock drivers out of hw_onecell_data to drop NR_CLKS clk: meson: migrate meson-aoclk out of hw_onecell_data to drop NR_CLKS ... * clk-allwinner: clk: sunxi-ng: nkm: Prefer current parent rate clk: sunxi-ng: a64: select closest rate for pll-video0 clk: sunxi-ng: div: Support finding closest rate clk: sunxi-ng: mux: Support finding closest rate clk: sunxi-ng: nkm: Support finding closest rate clk: sunxi-ng: nm: Support finding closest rate clk: sunxi-ng: Add helper function to find closest rate clk: sunxi-ng: Add feature to find closest rate clk: sunxi-ng: a64: allow pll-mipi to set parent's rate clk: sunxi-ng: nkm: consider alternative parent rates when determining rate clk: sunxi-ng: nkm: Use correct parameter name for parent HW clk: sunxi-ng: Modify mismatched function name clk: sunxi: sun9i-mmc: Use devm_platform_get_and_ioremap_resource() * clk-rockchip: clk: rockchip: rv1126: Add PD_VO clock tree clk: rockchip: rk3568: Fix PLL rate setting for 78.75MHz clk: rockchip: rk3568: Add PLL rate for 101MHz 
 - Add Versa3 clk generator to support 48KHz playback/record with audio
   codec on RZ/G2L SMARC EVK
 - Introduce kstrdup_and_replace() and use it

* clk-versa:
  clk: vc7: Use i2c_get_match_data() instead of device_get_match_data()
  clk: vc5: Use i2c_get_match_data() instead of device_get_match_data()
  clk: versaclock3: Switch to use i2c_driver's probe callback
  clk: Add support for versa3 clock driver
  dt-bindings: clock: Add Renesas versa3 clock generator bindings

* clk-strdup:
  clk: ti: Replace kstrdup() + strreplace() with kstrdup_and_replace()
  clk: tegra: Replace kstrdup() + strreplace() with kstrdup_and_replace()
  driver core: Replace kstrdup() + strreplace() with kstrdup_and_replace()
  lib/string_helpers: Add kstrdup_and_replace() helper

* clk-amlogic: (22 commits)
  dt-bindings: soc: amlogic: document System Control registers
  dt-bindings: clock: amlogic: convert amlogic,gxbb-aoclkc.txt to dt-schema
  dt-bindings: clock: amlogic: convert amlogic,gxbb-clkc.txt to dt-schema
  clk: meson: axg-audio: move bindings include to main driver
  clk: meson: meson8b: move bindings include to main driver
  clk: meson: a1: move bindings include to main driver
  clk: meson: eeclk: move bindings include to main driver
  clk: meson: aoclk: move bindings include to main driver
  dt-bindings: clk: axg-audio-clkc: expose all clock ids
  dt-bindings: clk: amlogic,a1-pll-clkc: expose all clock ids
  dt-bindings: clk: amlogic,a1-peripherals-clkc: expose all clock ids
  dt-bindings: clk: meson8b-clkc: expose all clock ids
  dt-bindings: clk: g12a-aoclkc: expose all clock ids
  dt-bindings: clk: g12a-clks: expose all clock ids
  dt-bindings: clk: axg-clkc: expose all clock ids
  dt-bindings: clk: gxbb-clkc: expose all clock ids
  clk: meson: migrate axg-audio out of hw_onecell_data to drop NR_CLKS
  clk: meson: migrate meson8b out of hw_onecell_data to drop NR_CLKS
  clk: meson: migrate a1 clock drivers out of hw_onecell_data to drop NR_CLKS
  clk: meson: migrate meson-aoclk out of hw_onecell_data to drop NR_CLKS
  ...

* clk-allwinner:
  clk: sunxi-ng: nkm: Prefer current parent rate
  clk: sunxi-ng: a64: select closest rate for pll-video0
  clk: sunxi-ng: div: Support finding closest rate
  clk: sunxi-ng: mux: Support finding closest rate
  clk: sunxi-ng: nkm: Support finding closest rate
  clk: sunxi-ng: nm: Support finding closest rate
  clk: sunxi-ng: Add helper function to find closest rate
  clk: sunxi-ng: Add feature to find closest rate
  clk: sunxi-ng: a64: allow pll-mipi to set parent's rate
  clk: sunxi-ng: nkm: consider alternative parent rates when determining rate
  clk: sunxi-ng: nkm: Use correct parameter name for parent HW
  clk: sunxi-ng: Modify mismatched function name
  clk: sunxi: sun9i-mmc: Use devm_platform_get_and_ioremap_resource()

* clk-rockchip:
  clk: rockchip: rv1126: Add PD_VO clock tree
  clk: rockchip: rk3568: Fix PLL rate setting for 78.75MHz
  clk: rockchip: rk3568: Add PLL rate for 101MHz
Merge branches 'clk-bindings', 'clk-starfive', 'clk-rm', 'clk-renesas' and 'clk-cleanup' into clk-next 2023-08-30T21:37:45+00:00 Stephen Boyd sboyd@kernel.org 2023-08-30T21:37:45+00:00 d10ebc7c646a46ba7de68470a0ae385a7eb7b7e3 - Remove OXNAS clk driver * clk-bindings: dt-bindings: clock: versal: Convert the xlnx,zynqmp-clk.txt to yaml dt-bindings: clock: xlnx,versal-clk: drop select:false dt-bindings: clock: versal: Add versal-net compatible string dt-bindings: clock: ast2600: Add I3C and MAC reset definitions dt-bindings: arm: hisilicon,cpuctrl: Merge "hisilicon,hix5hd2-clock" into parent binding * clk-starfive: reset: starfive: jh7110: Add StarFive STG/ISP/VOUT resets support clk: starfive: Simplify .determine_rate() clk: starfive: Add StarFive JH7110 Video-Output clock driver clk: starfive: Add StarFive JH7110 Image-Signal-Process clock driver clk: starfive: Add StarFive JH7110 System-Top-Group clock driver clk: starfive: jh7110-sys: Add PLL clocks source from DTS clk: starfive: Add StarFive JH7110 PLL clock driver dt-bindings: clock: Add StarFive JH7110 Video-Output clock and reset generator dt-bindings: clock: Add StarFive JH7110 Image-Signal-Process clock and reset generator dt-bindings: clock: Add StarFive JH7110 System-Top-Group clock and reset generator dt-bindings: clock: jh7110-syscrg: Add PLL clock inputs dt-bindings: soc: starfive: Add StarFive syscon module dt-bindings: clock: Add StarFive JH7110 PLL clock generator * clk-rm: dt-bindings: clk: oxnas: remove obsolete bindings clk: oxnas: remove obsolete clock driver * clk-renesas: clk: renesas: rcar-gen3: Add ADG clocks clk: renesas: r8a77965: Add 3DGE and ZG support clk: renesas: r8a7796: Add 3DGE and ZG support clk: renesas: r8a7795: Add 3DGE and ZG support clk: renesas: emev2: Remove obsolete clkdev registration clk: renesas: r9a07g043: Add MTU3a clock and reset entry clk: renesas: rzg2l: Simplify .determine_rate() clk: renesas: r9a09g011: Add CSI related clocks clk: renesas: r8a774b1: Add 3DGE and ZG support clk: renesas: r8a774e1: Add 3DGE and ZG support clk: renesas: r8a774a1: Add 3DGE and ZG support clk: renesas: rcar-gen3: Add support for ZG clock * clk-cleanup: clk: mvebu: Convert to devm_platform_ioremap_resource() clk: nuvoton: Convert to devm_platform_ioremap_resource() clk: socfpga: agilex: Convert to devm_platform_ioremap_resource() clk: ti: Use devm_platform_get_and_ioremap_resource() clk: mediatek: Convert to devm_platform_ioremap_resource() clk: hsdk-pll: Convert to devm_platform_ioremap_resource() clk: gemini: Convert to devm_platform_ioremap_resource() clk: fsl-sai: Convert to devm_platform_ioremap_resource() clk: bm1880: Convert to devm_platform_ioremap_resource() clk: axm5516: Convert to devm_platform_ioremap_resource() clk: actions: Convert to devm_platform_ioremap_resource() clk: cdce925: Remove redundant of_match_ptr() drivers: clk: keystone: Fix parameter judgment in _of_pll_clk_init() clk: Explicitly include correct DT includes 
 - Remove OXNAS clk driver

* clk-bindings:
  dt-bindings: clock: versal: Convert the xlnx,zynqmp-clk.txt to yaml
  dt-bindings: clock: xlnx,versal-clk: drop select:false
  dt-bindings: clock: versal: Add versal-net compatible string
  dt-bindings: clock: ast2600: Add I3C and MAC reset definitions
  dt-bindings: arm: hisilicon,cpuctrl: Merge "hisilicon,hix5hd2-clock" into parent binding

* clk-starfive:
  reset: starfive: jh7110: Add StarFive STG/ISP/VOUT resets support
  clk: starfive: Simplify .determine_rate()
  clk: starfive: Add StarFive JH7110 Video-Output clock driver
  clk: starfive: Add StarFive JH7110 Image-Signal-Process clock driver
  clk: starfive: Add StarFive JH7110 System-Top-Group clock driver
  clk: starfive: jh7110-sys: Add PLL clocks source from DTS
  clk: starfive: Add StarFive JH7110 PLL clock driver
  dt-bindings: clock: Add StarFive JH7110 Video-Output clock and reset generator
  dt-bindings: clock: Add StarFive JH7110 Image-Signal-Process clock and reset generator
  dt-bindings: clock: Add StarFive JH7110 System-Top-Group clock and reset generator
  dt-bindings: clock: jh7110-syscrg: Add PLL clock inputs
  dt-bindings: soc: starfive: Add StarFive syscon module
  dt-bindings: clock: Add StarFive JH7110 PLL clock generator

* clk-rm:
  dt-bindings: clk: oxnas: remove obsolete bindings
  clk: oxnas: remove obsolete clock driver

* clk-renesas:
  clk: renesas: rcar-gen3: Add ADG clocks
  clk: renesas: r8a77965: Add 3DGE and ZG support
  clk: renesas: r8a7796: Add 3DGE and ZG support
  clk: renesas: r8a7795: Add 3DGE and ZG support
  clk: renesas: emev2: Remove obsolete clkdev registration
  clk: renesas: r9a07g043: Add MTU3a clock and reset entry
  clk: renesas: rzg2l: Simplify .determine_rate()
  clk: renesas: r9a09g011: Add CSI related clocks
  clk: renesas: r8a774b1: Add 3DGE and ZG support
  clk: renesas: r8a774e1: Add 3DGE and ZG support
  clk: renesas: r8a774a1: Add 3DGE and ZG support
  clk: renesas: rcar-gen3: Add support for ZG clock

* clk-cleanup:
  clk: mvebu: Convert to devm_platform_ioremap_resource()
  clk: nuvoton: Convert to devm_platform_ioremap_resource()
  clk: socfpga: agilex: Convert to devm_platform_ioremap_resource()
  clk: ti: Use devm_platform_get_and_ioremap_resource()
  clk: mediatek: Convert to devm_platform_ioremap_resource()
  clk: hsdk-pll: Convert to devm_platform_ioremap_resource()
  clk: gemini: Convert to devm_platform_ioremap_resource()
  clk: fsl-sai: Convert to devm_platform_ioremap_resource()
  clk: bm1880: Convert to devm_platform_ioremap_resource()
  clk: axm5516: Convert to devm_platform_ioremap_resource()
  clk: actions: Convert to devm_platform_ioremap_resource()
  clk: cdce925: Remove redundant of_match_ptr()
  drivers: clk: keystone: Fix parameter judgment in _of_pll_clk_init()
  clk: Explicitly include correct DT includes
clk: qcom: Fix SM_GPUCC_8450 dependencies 2023-08-29T22:29:39+00:00 Nathan Chancellor nathan@kernel.org 2023-08-29T14:08:47+00:00 75d1d3a433f0a0748a89eb074830e9b635a19fd2 CONFIG_SM_GCC_8450 depends on ARM64 but it is selected by CONFIG_SM_GPUCC_8450, which can be selected on ARM, resulting in a Kconfig warning. WARNING: unmet direct dependencies detected for SM_GCC_8450 Depends on [n]: COMMON_CLK [=y] && COMMON_CLK_QCOM [=y] && (ARM64 || COMPILE_TEST [=n]) Selected by [y]: - SM_GPUCC_8450 [=y] && COMMON_CLK [=y] && COMMON_CLK_QCOM [=y] Add the same dependencies to CONFIG_SM_GPUCC_8450 to resolve the warning. Fixes: 728692d49edc ("clk: qcom: Add support for SM8450 GPUCC") Signed-off-by: Nathan Chancellor <nathan@kernel.org> Link: https://lore.kernel.org/r/20230829-fix-sm_gpucc_8550-deps-v1-1-d751f6cd35b2@kernel.org Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org> 
CONFIG_SM_GCC_8450 depends on ARM64 but it is selected by
CONFIG_SM_GPUCC_8450, which can be selected on ARM, resulting in a
Kconfig warning.

WARNING: unmet direct dependencies detected for SM_GCC_8450
  Depends on [n]: COMMON_CLK [=y] && COMMON_CLK_QCOM [=y] && (ARM64 || COMPILE_TEST [=n])
  Selected by [y]:
  - SM_GPUCC_8450 [=y] && COMMON_CLK [=y] && COMMON_CLK_QCOM [=y]

Add the same dependencies to CONFIG_SM_GPUCC_8450 to resolve the
warning.

Fixes: 728692d49edc ("clk: qcom: Add support for SM8450 GPUCC")
Signed-off-by: Nathan Chancellor <nathan@kernel.org>
Link: https://lore.kernel.org/r/20230829-fix-sm_gpucc_8550-deps-v1-1-d751f6cd35b2@kernel.org
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
clk: lmk04832: Support using PLL1_LD as SPI readback pin 2023-08-23T22:47:35+00:00 Mike Looijmans mike.looijmans@topic.nl 2023-08-02T06:41:00+00:00 6aa8dc690d99f7aa7fc41f5606c7ee9ad481ad0b The PLL1_PD pin (a.k.a. STATUS_LD1) can be used as SPI readback pin. Make this possible. Signed-off-by: Mike Looijmans <mike.looijmans@topic.nl> Link: https://lore.kernel.org/r/20230802064100.15793-3-mike.looijmans@topic.nl Reviewed-by: Liam Beguin <liambeguin@gmail.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org> 
The PLL1_PD pin (a.k.a. STATUS_LD1) can be used as SPI readback pin. Make
this possible.

Signed-off-by: Mike Looijmans <mike.looijmans@topic.nl>
Link: https://lore.kernel.org/r/20230802064100.15793-3-mike.looijmans@topic.nl
Reviewed-by: Liam Beguin <liambeguin@gmail.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
clk: lmk04832: Don't disable vco clock on probe fail 2023-08-23T22:47:35+00:00 Mike Looijmans mike.looijmans@topic.nl 2023-08-02T06:40:59+00:00 e63227c83cff755c4d3b326d317d2e88451a637f The probe() method never calls clk_prepare_enable(), so it should not call clk_disable_unprepare() for the vco.clk in the error path. Fixes a "lmk-vco already disabled" BUG when probe fails. Signed-off-by: Mike Looijmans <mike.looijmans@topic.nl> Link: https://lore.kernel.org/r/20230802064100.15793-2-mike.looijmans@topic.nl Reviewed-by: Liam Beguin <liambeguin@gmail.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org> 
The probe() method never calls clk_prepare_enable(), so it should not
call clk_disable_unprepare() for the vco.clk in the error path. Fixes
a "lmk-vco already disabled" BUG when probe fails.

Signed-off-by: Mike Looijmans <mike.looijmans@topic.nl>
Link: https://lore.kernel.org/r/20230802064100.15793-2-mike.looijmans@topic.nl
Reviewed-by: Liam Beguin <liambeguin@gmail.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
clk: lmk04832: Set missing parent_names for output clocks 2023-08-23T22:47:27+00:00 Mike Looijmans mike.looijmans@topic.nl 2023-08-02T06:40:58+00:00 f6d6c11f417a50caca9d30d63f0f85c311c09869 lmk04832_register_clkout forgot to fill in the parent_names, resulting in the error message "Must specify parents if num_parents > 0". Signed-off-by: Mike Looijmans <mike.looijmans@topic.nl> Link: https://lore.kernel.org/r/20230802064100.15793-1-mike.looijmans@topic.nl Reviewed-by: Liam Beguin <liambeguin@gmail.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org> 
lmk04832_register_clkout forgot to fill in the parent_names, resulting
in the error message "Must specify parents if num_parents > 0".

Signed-off-by: Mike Looijmans <mike.looijmans@topic.nl>
Link: https://lore.kernel.org/r/20230802064100.15793-1-mike.looijmans@topic.nl
Reviewed-by: Liam Beguin <liambeguin@gmail.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
clk: Fix slab-out-of-bounds error in devm_clk_release() 2023-08-22T22:25:18+00:00 Andrey Skvortsov andrej.skvortzov@gmail.com 2023-08-05T08:48:47+00:00 66fbfb35da47f391bdadf9fa7ceb88af4faa9022 Problem can be reproduced by unloading snd_soc_simple_card, because in devm_get_clk_from_child() devres data is allocated as `struct clk`, but devm_clk_release() expects devres data to be `struct devm_clk_state`. KASAN report: ================================================================== BUG: KASAN: slab-out-of-bounds in devm_clk_release+0x20/0x54 Read of size 8 at addr ffffff800ee09688 by task (udev-worker)/287 Call trace: dump_backtrace+0xe8/0x11c show_stack+0x1c/0x30 dump_stack_lvl+0x60/0x78 print_report+0x150/0x450 kasan_report+0xa8/0xf0 __asan_load8+0x78/0xa0 devm_clk_release+0x20/0x54 release_nodes+0x84/0x120 devres_release_all+0x144/0x210 device_unbind_cleanup+0x1c/0xac really_probe+0x2f0/0x5b0 __driver_probe_device+0xc0/0x1f0 driver_probe_device+0x68/0x120 __driver_attach+0x140/0x294 bus_for_each_dev+0xec/0x160 driver_attach+0x38/0x44 bus_add_driver+0x24c/0x300 driver_register+0xf0/0x210 __platform_driver_register+0x48/0x54 asoc_simple_card_init+0x24/0x1000 [snd_soc_simple_card] do_one_initcall+0xac/0x340 do_init_module+0xd0/0x300 load_module+0x2ba4/0x3100 __do_sys_init_module+0x2c8/0x300 __arm64_sys_init_module+0x48/0x5c invoke_syscall+0x64/0x190 el0_svc_common.constprop.0+0x124/0x154 do_el0_svc+0x44/0xdc el0_svc+0x14/0x50 el0t_64_sync_handler+0xec/0x11c el0t_64_sync+0x14c/0x150 Allocated by task 287: kasan_save_stack+0x38/0x60 kasan_set_track+0x28/0x40 kasan_save_alloc_info+0x20/0x30 __kasan_kmalloc+0xac/0xb0 __kmalloc_node_track_caller+0x6c/0x1c4 __devres_alloc_node+0x44/0xb4 devm_get_clk_from_child+0x44/0xa0 asoc_simple_parse_clk+0x1b8/0x1dc [snd_soc_simple_card_utils] simple_parse_node.isra.0+0x1ec/0x230 [snd_soc_simple_card] simple_dai_link_of+0x1bc/0x334 [snd_soc_simple_card] __simple_for_each_link+0x2ec/0x320 [snd_soc_simple_card] asoc_simple_probe+0x468/0x4dc [snd_soc_simple_card] platform_probe+0x90/0xf0 really_probe+0x118/0x5b0 __driver_probe_device+0xc0/0x1f0 driver_probe_device+0x68/0x120 __driver_attach+0x140/0x294 bus_for_each_dev+0xec/0x160 driver_attach+0x38/0x44 bus_add_driver+0x24c/0x300 driver_register+0xf0/0x210 __platform_driver_register+0x48/0x54 asoc_simple_card_init+0x24/0x1000 [snd_soc_simple_card] do_one_initcall+0xac/0x340 do_init_module+0xd0/0x300 load_module+0x2ba4/0x3100 __do_sys_init_module+0x2c8/0x300 __arm64_sys_init_module+0x48/0x5c invoke_syscall+0x64/0x190 el0_svc_common.constprop.0+0x124/0x154 do_el0_svc+0x44/0xdc el0_svc+0x14/0x50 el0t_64_sync_handler+0xec/0x11c el0t_64_sync+0x14c/0x150 The buggy address belongs to the object at ffffff800ee09600 which belongs to the cache kmalloc-256 of size 256 The buggy address is located 136 bytes inside of 256-byte region [ffffff800ee09600, ffffff800ee09700) The buggy address belongs to the physical page: page:000000002d97303b refcount:1 mapcount:0 mapping:0000000000000000 index:0x0 pfn:0x4ee08 head:000000002d97303b order:1 compound_mapcount:0 compound_pincount:0 flags: 0x10200(slab|head|zone=0) raw: 0000000000010200 0000000000000000 dead000000000122 ffffff8002c02480 raw: 0000000000000000 0000000080100010 00000001ffffffff 0000000000000000 page dumped because: kasan: bad access detected Memory state around the buggy address: ffffff800ee09580: fc fc fc fc fc fc fc fc fc fc fc fc fc fc fc fc ffffff800ee09600: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 >ffffff800ee09680: 00 fc fc fc fc fc fc fc fc fc fc fc fc fc fc fc ^ ffffff800ee09700: fc fc fc fc fc fc fc fc fc fc fc fc fc fc fc fc ffffff800ee09780: fc fc fc fc fc fc fc fc fc fc fc fc fc fc fc fc ================================================================== Fixes: abae8e57e49a ("clk: generalize devm_clk_get() a bit") Signed-off-by: Andrey Skvortsov <andrej.skvortzov@gmail.com> Link: https://lore.kernel.org/r/20230805084847.3110586-1-andrej.skvortzov@gmail.com Signed-off-by: Stephen Boyd <sboyd@kernel.org> 
Problem can be reproduced by unloading snd_soc_simple_card, because in
devm_get_clk_from_child() devres data is allocated as `struct clk`, but
devm_clk_release() expects devres data to be `struct devm_clk_state`.

KASAN report:
 ==================================================================
 BUG: KASAN: slab-out-of-bounds in devm_clk_release+0x20/0x54
 Read of size 8 at addr ffffff800ee09688 by task (udev-worker)/287

 Call trace:
  dump_backtrace+0xe8/0x11c
  show_stack+0x1c/0x30
  dump_stack_lvl+0x60/0x78
  print_report+0x150/0x450
  kasan_report+0xa8/0xf0
  __asan_load8+0x78/0xa0
  devm_clk_release+0x20/0x54
  release_nodes+0x84/0x120
  devres_release_all+0x144/0x210
  device_unbind_cleanup+0x1c/0xac
  really_probe+0x2f0/0x5b0
  __driver_probe_device+0xc0/0x1f0
  driver_probe_device+0x68/0x120
  __driver_attach+0x140/0x294
  bus_for_each_dev+0xec/0x160
  driver_attach+0x38/0x44
  bus_add_driver+0x24c/0x300
  driver_register+0xf0/0x210
  __platform_driver_register+0x48/0x54
  asoc_simple_card_init+0x24/0x1000 [snd_soc_simple_card]
  do_one_initcall+0xac/0x340
  do_init_module+0xd0/0x300
  load_module+0x2ba4/0x3100
  __do_sys_init_module+0x2c8/0x300
  __arm64_sys_init_module+0x48/0x5c
  invoke_syscall+0x64/0x190
  el0_svc_common.constprop.0+0x124/0x154
  do_el0_svc+0x44/0xdc
  el0_svc+0x14/0x50
  el0t_64_sync_handler+0xec/0x11c
  el0t_64_sync+0x14c/0x150

 Allocated by task 287:
  kasan_save_stack+0x38/0x60
  kasan_set_track+0x28/0x40
  kasan_save_alloc_info+0x20/0x30
  __kasan_kmalloc+0xac/0xb0
  __kmalloc_node_track_caller+0x6c/0x1c4
  __devres_alloc_node+0x44/0xb4
  devm_get_clk_from_child+0x44/0xa0
  asoc_simple_parse_clk+0x1b8/0x1dc [snd_soc_simple_card_utils]
  simple_parse_node.isra.0+0x1ec/0x230 [snd_soc_simple_card]
  simple_dai_link_of+0x1bc/0x334 [snd_soc_simple_card]
  __simple_for_each_link+0x2ec/0x320 [snd_soc_simple_card]
  asoc_simple_probe+0x468/0x4dc [snd_soc_simple_card]
  platform_probe+0x90/0xf0
  really_probe+0x118/0x5b0
  __driver_probe_device+0xc0/0x1f0
  driver_probe_device+0x68/0x120
  __driver_attach+0x140/0x294
  bus_for_each_dev+0xec/0x160
  driver_attach+0x38/0x44
  bus_add_driver+0x24c/0x300
  driver_register+0xf0/0x210
  __platform_driver_register+0x48/0x54
  asoc_simple_card_init+0x24/0x1000 [snd_soc_simple_card]
  do_one_initcall+0xac/0x340
  do_init_module+0xd0/0x300
  load_module+0x2ba4/0x3100
  __do_sys_init_module+0x2c8/0x300
  __arm64_sys_init_module+0x48/0x5c
  invoke_syscall+0x64/0x190
  el0_svc_common.constprop.0+0x124/0x154
  do_el0_svc+0x44/0xdc
  el0_svc+0x14/0x50
  el0t_64_sync_handler+0xec/0x11c
  el0t_64_sync+0x14c/0x150

 The buggy address belongs to the object at ffffff800ee09600
  which belongs to the cache kmalloc-256 of size 256
 The buggy address is located 136 bytes inside of
  256-byte region [ffffff800ee09600, ffffff800ee09700)

 The buggy address belongs to the physical page:
 page:000000002d97303b refcount:1 mapcount:0 mapping:0000000000000000 index:0x0 pfn:0x4ee08
 head:000000002d97303b order:1 compound_mapcount:0 compound_pincount:0
 flags: 0x10200(slab|head|zone=0)
 raw: 0000000000010200 0000000000000000 dead000000000122 ffffff8002c02480
 raw: 0000000000000000 0000000080100010 00000001ffffffff 0000000000000000
 page dumped because: kasan: bad access detected

 Memory state around the buggy address:
  ffffff800ee09580: fc fc fc fc fc fc fc fc fc fc fc fc fc fc fc fc
  ffffff800ee09600: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
 >ffffff800ee09680: 00 fc fc fc fc fc fc fc fc fc fc fc fc fc fc fc
                       ^
  ffffff800ee09700: fc fc fc fc fc fc fc fc fc fc fc fc fc fc fc fc
  ffffff800ee09780: fc fc fc fc fc fc fc fc fc fc fc fc fc fc fc fc
 ==================================================================

Fixes: abae8e57e49a ("clk: generalize devm_clk_get() a bit")
Signed-off-by: Andrey Skvortsov <andrej.skvortzov@gmail.com>
Link: https://lore.kernel.org/r/20230805084847.3110586-1-andrej.skvortzov@gmail.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>