<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-toradex.git/drivers/clocksource/Kconfig, branch master</title>
<subtitle>Linux kernel for Apalis and Colibri modules</subtitle>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/'/>
<entry>
<title>clocksource/drivers: Add support for the Renesas RZ/N1 timers</title>
<updated>2026-10-02T09:42:40+00:00</updated>
<author>
<name>Herve Codina (Schneider Electric)</name>
<email>herve.codina@bootlin.com</email>
</author>
<published>2026-10-01T08:22:22+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=435167b4f30191aa7368de68870117bc7218ee8f'/>
<id>435167b4f30191aa7368de68870117bc7218ee8f</id>
<content type='text'>
The Renesas RZ/N1 timer block controller is the controller in charge of
timers available in the Renesas RZ/N1 SoCs family.

This controller handles 8 timers:
  - 6 16-bit timers
  - 2 32-bit timers

Each timer has its own interrupt, its own prescaler that can be used to
divide the clock by 25 and all of them can work in either one-shot or
periodic mode.

Signed-off-by: Herve Codina (Schneider Electric) &lt;herve.codina@bootlin.com&gt;
Signed-off-by: Daniel Lezcano &lt;daniel.lezcano@kernel.org&gt;
Tested-by: Wolfram Sang &lt;wsa+renesas@sang-engineering.com&gt;
Link: https://patch.msgid.link/20261001082225.125956-3-herve.codina@bootlin.com
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The Renesas RZ/N1 timer block controller is the controller in charge of
timers available in the Renesas RZ/N1 SoCs family.

This controller handles 8 timers:
  - 6 16-bit timers
  - 2 32-bit timers

Each timer has its own interrupt, its own prescaler that can be used to
divide the clock by 25 and all of them can work in either one-shot or
periodic mode.

Signed-off-by: Herve Codina (Schneider Electric) &lt;herve.codina@bootlin.com&gt;
Signed-off-by: Daniel Lezcano &lt;daniel.lezcano@kernel.org&gt;
Tested-by: Wolfram Sang &lt;wsa+renesas@sang-engineering.com&gt;
Link: https://patch.msgid.link/20261001082225.125956-3-herve.codina@bootlin.com
</pre>
</div>
</content>
</entry>
<entry>
<title>clocksource: move NXP timer selection to drivers/clocksource</title>
<updated>2026-06-10T05:26:07+00:00</updated>
<author>
<name>Enric Balletbo i Serra</name>
<email>eballetb@redhat.com</email>
</author>
<published>2026-05-14T11:14:17+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=a9ac745bc320cbdc2ed3c851eb78f91f22ff975b'/>
<id>a9ac745bc320cbdc2ed3c851eb78f91f22ff975b</id>
<content type='text'>
The Kconfig logic for selecting the scheduler clocksource on
NXP Vybrid (VF610) uses a `choice` block restricted to 32-bit ARM. This
prevents 64-bit architectures, such as the NXP S32 family, from enabling
the NXP Periodic Interrupt Timer (PIT) driver (CONFIG_NXP_PIT_TIMER).

Relocate the NXP clocksource selection from arch/arm/mach-imx/Kconfig to
drivers/clocksource/Kconfig. This allows the configuration to be shared
across different architectures.

Update the selection to include support for ARCH_S32 and add a "None"
option restricted to ARCH_S32, since Vybrid lacks the ARM Architected
Timer. The Vybrid Global Timer option is restricted to ARCH_MULTI_V7
SOC_VF610 platforms to prevent it from being visible on Cortex-M4 builds,
which lack the ARM Global Timer hardware.

Fixes: bee33f22d7c3 ("clocksource/drivers/nxp-pit: Add NXP Automotive s32g2 / s32g3 support")
Signed-off-by: Enric Balletbo i Serra &lt;eballetb@redhat.com&gt;
Signed-off-by: Daniel Lezcano &lt;daniel.lezcano@kernel.org&gt;
Reviewed-by: Frank Li &lt;Frank.Li@nxp.com&gt;
Link: https://patch.msgid.link/20260514-fix-nxp-timer-v3-1-a3e68fdb505e@redhat.com
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The Kconfig logic for selecting the scheduler clocksource on
NXP Vybrid (VF610) uses a `choice` block restricted to 32-bit ARM. This
prevents 64-bit architectures, such as the NXP S32 family, from enabling
the NXP Periodic Interrupt Timer (PIT) driver (CONFIG_NXP_PIT_TIMER).

Relocate the NXP clocksource selection from arch/arm/mach-imx/Kconfig to
drivers/clocksource/Kconfig. This allows the configuration to be shared
across different architectures.

Update the selection to include support for ARCH_S32 and add a "None"
option restricted to ARCH_S32, since Vybrid lacks the ARM Architected
Timer. The Vybrid Global Timer option is restricted to ARCH_MULTI_V7
SOC_VF610 platforms to prevent it from being visible on Cortex-M4 builds,
which lack the ARM Global Timer hardware.

Fixes: bee33f22d7c3 ("clocksource/drivers/nxp-pit: Add NXP Automotive s32g2 / s32g3 support")
Signed-off-by: Enric Balletbo i Serra &lt;eballetb@redhat.com&gt;
Signed-off-by: Daniel Lezcano &lt;daniel.lezcano@kernel.org&gt;
Reviewed-by: Frank Li &lt;Frank.Li@nxp.com&gt;
Link: https://patch.msgid.link/20260514-fix-nxp-timer-v3-1-a3e68fdb505e@redhat.com
</pre>
</div>
</content>
</entry>
<entry>
<title>MIPS: Don't select CLOCKSOURCE_WATCHDOG</title>
<updated>2026-03-12T11:23:26+00:00</updated>
<author>
<name>Thomas Gleixner</name>
<email>tglx@kernel.org</email>
</author>
<published>2026-01-23T23:17:52+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=ced7072a3ad65698f0ad378c8f8566379fe50723'/>
<id>ced7072a3ad65698f0ad378c8f8566379fe50723</id>
<content type='text'>
MIPS selects CLOCKSOURCE_WATCHDOG, but none of the clocksources actually
sets the MUST_VERIFY flag. So compiling the watchdog in is a pointless
exercise. Remove the selects.

Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Signed-off-by: Thomas Gleixner &lt;tglx@kernel.org&gt;
Link: https://patch.msgid.link/20260123231521.723433371@kernel.org
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
MIPS selects CLOCKSOURCE_WATCHDOG, but none of the clocksources actually
sets the MUST_VERIFY flag. So compiling the watchdog in is a pointless
exercise. Remove the selects.

Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Signed-off-by: Thomas Gleixner &lt;tglx@kernel.org&gt;
Link: https://patch.msgid.link/20260123231521.723433371@kernel.org
</pre>
</div>
</content>
</entry>
<entry>
<title>clocksource/drivers/timer-integrator-ap: Add missing Kconfig dependency on OF</title>
<updated>2026-01-20T17:06:27+00:00</updated>
<author>
<name>Bartosz Golaszewski</name>
<email>bartosz.golaszewski@oss.qualcomm.com</email>
</author>
<published>2026-01-16T11:17:23+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=2246464821e2820572e6feefca2029f17629cc50'/>
<id>2246464821e2820572e6feefca2029f17629cc50</id>
<content type='text'>
This driver accesses the of_aliases global variable declared in
linux/of.h and defined in drivers/base/of.c. It requires OF support or
will cause a link failure. Add the missing Kconfig dependency.

Closes: https://lore.kernel.org/oe-kbuild-all/202601152233.og6LdeUo-lkp@intel.com/
Signed-off-by: Bartosz Golaszewski &lt;bartosz.golaszewski@oss.qualcomm.com&gt;
Signed-off-by: Daniel Lezcano &lt;daniel.lezcano@linaro.org&gt;
Link: https://patch.msgid.link/20260116111723.10585-1-bartosz.golaszewski@oss.qualcomm.com
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This driver accesses the of_aliases global variable declared in
linux/of.h and defined in drivers/base/of.c. It requires OF support or
will cause a link failure. Add the missing Kconfig dependency.

Closes: https://lore.kernel.org/oe-kbuild-all/202601152233.og6LdeUo-lkp@intel.com/
Signed-off-by: Bartosz Golaszewski &lt;bartosz.golaszewski@oss.qualcomm.com&gt;
Signed-off-by: Daniel Lezcano &lt;daniel.lezcano@linaro.org&gt;
Link: https://patch.msgid.link/20260116111723.10585-1-bartosz.golaszewski@oss.qualcomm.com
</pre>
</div>
</content>
</entry>
<entry>
<title>clocksource/drivers: Add Realtek system timer driver</title>
<updated>2025-11-26T10:25:15+00:00</updated>
<author>
<name>Hao-Wen Ting</name>
<email>haowen.ting@realtek.com</email>
</author>
<published>2025-11-26T06:01:10+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=d1780dce9575072303b9c574614b72b5c8c5c44c'/>
<id>d1780dce9575072303b9c574614b72b5c8c5c44c</id>
<content type='text'>
Add a system timer driver for Realtek SoCs.

This driver registers the 1 MHz global hardware counter on Realtek
platforms as a clock event device. Since this hardware counter starts
counting automatically after SoC power-on, no clock initialization is
required. Because the counter does not stop or get affected by CPU power
down, and it supports oneshot mode, it is typically used as a tick
broadcast timer.

Signed-off-by: Hao-Wen Ting &lt;haowen.ting@realtek.com&gt;
Signed-off-by: Daniel Lezcano &lt;daniel.lezcano@linaro.org&gt;
Acked-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Link: https://patch.msgid.link/20251126060110.198330-3-haowen.ting@realtek.com
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add a system timer driver for Realtek SoCs.

This driver registers the 1 MHz global hardware counter on Realtek
platforms as a clock event device. Since this hardware counter starts
counting automatically after SoC power-on, no clock initialization is
required. Because the counter does not stop or get affected by CPU power
down, and it supports oneshot mode, it is typically used as a tick
broadcast timer.

Signed-off-by: Hao-Wen Ting &lt;haowen.ting@realtek.com&gt;
Signed-off-by: Daniel Lezcano &lt;daniel.lezcano@linaro.org&gt;
Acked-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Link: https://patch.msgid.link/20251126060110.198330-3-haowen.ting@realtek.com
</pre>
</div>
</content>
</entry>
<entry>
<title>clocksource/drivers/arm_global_timer: Add auto-detection for initial prescaler values</title>
<updated>2025-09-23T10:41:58+00:00</updated>
<author>
<name>Markus Schneider-Pargmann</name>
<email>msp@baylibre.com</email>
</author>
<published>2025-08-19T07:52:41+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=1c4b87c921fb158d853adcb8fd48c2dc07fc6f91'/>
<id>1c4b87c921fb158d853adcb8fd48c2dc07fc6f91</id>
<content type='text'>
am43xx has a clock tree where the global timer clock is an indirect child
of the CPU clock used for frequency scaling:

  dpll_mpu_ck -- CPU/cpufreq
        |
        v
  dpll_mpu_m2_ck -- divider
        |
        v
  mpu_periphclk -- fixed divider by 2 used for global timer

When CPU frequency changes, the global timer's clock notifier rejects
the change because the hardcoded prescaler (1 or 2) cannot accommodate
the frequency range across all CPU OPPs (300, 600, 720, 800, 1000 MHz).

Add platform-specific prescaler auto-detection to solve this issue:

- am43xx: prescaler = 50 (calculated as initial_freq/GCD of all OPP
  freqs) This allows the timer to work across all CPU frequencies after
  the fixed divider by 2. Tested on am4372-idk-evm.

- zynq-7000: prescaler = 2 (preserves previous Kconfig default)

- Other platforms: prescaler = 1 (previous default)

The Kconfig option now defaults to 0 (auto-detection) but can still
override the auto-detected value when set to a non-zero value,
preserving existing customization workflows.

Signed-off-by: Markus Schneider-Pargmann &lt;msp@baylibre.com&gt;
Signed-off-by: Daniel Lezcano &lt;daniel.lezcano@linaro.org&gt;
Tested-by: Kevin Hilman &lt;khilman@baylibre.com&gt;
Tested-by: Patrice Chotard &lt;patrice.chotard@foss.st.com&gt;
Tested-by: Judith Mendez &lt;jm@ti.com&gt;
Reviewed-by: Kevin Hilman &lt;khilman@baylibre.com&gt;
Link: https://lore.kernel.org/r/20250819-topic-am43-arm-global-timer-v6-16-v2-1-6d082e2a5161@baylibre.com
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
am43xx has a clock tree where the global timer clock is an indirect child
of the CPU clock used for frequency scaling:

  dpll_mpu_ck -- CPU/cpufreq
        |
        v
  dpll_mpu_m2_ck -- divider
        |
        v
  mpu_periphclk -- fixed divider by 2 used for global timer

When CPU frequency changes, the global timer's clock notifier rejects
the change because the hardcoded prescaler (1 or 2) cannot accommodate
the frequency range across all CPU OPPs (300, 600, 720, 800, 1000 MHz).

Add platform-specific prescaler auto-detection to solve this issue:

- am43xx: prescaler = 50 (calculated as initial_freq/GCD of all OPP
  freqs) This allows the timer to work across all CPU frequencies after
  the fixed divider by 2. Tested on am4372-idk-evm.

- zynq-7000: prescaler = 2 (preserves previous Kconfig default)

- Other platforms: prescaler = 1 (previous default)

The Kconfig option now defaults to 0 (auto-detection) but can still
override the auto-detected value when set to a non-zero value,
preserving existing customization workflows.

Signed-off-by: Markus Schneider-Pargmann &lt;msp@baylibre.com&gt;
Signed-off-by: Daniel Lezcano &lt;daniel.lezcano@linaro.org&gt;
Tested-by: Kevin Hilman &lt;khilman@baylibre.com&gt;
Tested-by: Patrice Chotard &lt;patrice.chotard@foss.st.com&gt;
Tested-by: Judith Mendez &lt;jm@ti.com&gt;
Reviewed-by: Kevin Hilman &lt;khilman@baylibre.com&gt;
Link: https://lore.kernel.org/r/20250819-topic-am43-arm-global-timer-v6-16-v2-1-6d082e2a5161@baylibre.com
</pre>
</div>
</content>
</entry>
<entry>
<title>clocksource/drivers/vf-pit: Rename the VF PIT to NXP PIT</title>
<updated>2025-09-23T10:30:05+00:00</updated>
<author>
<name>Daniel Lezcano</name>
<email>daniel.lezcano@linaro.org</email>
</author>
<published>2025-08-04T15:23:36+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=fc346a155fe910a1cf4639b00b131f9a10284bdd'/>
<id>fc346a155fe910a1cf4639b00b131f9a10284bdd</id>
<content type='text'>
The PIT acronym stands for Periodic Interrupt Timer which is found on
different NXP platforms not only on the Vybrid Family. Change the name
to be more generic for the NXP platforms in general. That will be
consistent with the NXP STM driver naming convention.

Signed-off-by: Daniel Lezcano &lt;daniel.lezcano@linaro.org&gt;
Link: https://lore.kernel.org/r/20250804152344.1109310-19-daniel.lezcano@linaro.org
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The PIT acronym stands for Periodic Interrupt Timer which is found on
different NXP platforms not only on the Vybrid Family. Change the name
to be more generic for the NXP platforms in general. That will be
consistent with the NXP STM driver naming convention.

Signed-off-by: Daniel Lezcano &lt;daniel.lezcano@linaro.org&gt;
Link: https://lore.kernel.org/r/20250804152344.1109310-19-daniel.lezcano@linaro.org
</pre>
</div>
</content>
</entry>
<entry>
<title>clocksource/drivers/vf-pit: Add COMPILE_TEST option</title>
<updated>2025-09-23T10:28:25+00:00</updated>
<author>
<name>Daniel Lezcano</name>
<email>daniel.lezcano@linaro.org</email>
</author>
<published>2025-08-04T15:23:20+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=2decd0b63eb0a6773e9a5541300cd92e469f541b'/>
<id>2decd0b63eb0a6773e9a5541300cd92e469f541b</id>
<content type='text'>
The VF PIT driver is a silent koption. In order to allow a better
compilation test coverage, let's add the COMPILE_TEST option so it can
be selected on other platforms than the Vybrid Family.

Signed-off-by: Daniel Lezcano &lt;daniel.lezcano@linaro.org&gt;
Link: https://lore.kernel.org/r/20250804152344.1109310-3-daniel.lezcano@linaro.org
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The VF PIT driver is a silent koption. In order to allow a better
compilation test coverage, let's add the COMPILE_TEST option so it can
be selected on other platforms than the Vybrid Family.

Signed-off-by: Daniel Lezcano &lt;daniel.lezcano@linaro.org&gt;
Link: https://lore.kernel.org/r/20250804152344.1109310-3-daniel.lezcano@linaro.org
</pre>
</div>
</content>
</entry>
<entry>
<title>clocksource/drivers: Add EcoNet Timer HPT driver</title>
<updated>2025-05-16T09:10:33+00:00</updated>
<author>
<name>Caleb James DeLisle</name>
<email>cjd@cjdns.fr</email>
</author>
<published>2025-05-07T13:44:55+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=3b4c33ac87d0d11308f4445ecec2a124e2e77724'/>
<id>3b4c33ac87d0d11308f4445ecec2a124e2e77724</id>
<content type='text'>
Introduce a clocksource driver for the so-called high-precision timer (HPT)
in the EcoNet EN751221 and EN751627 MIPS SoCs.

It's a 32 bit upward-counting one-shot timer which relies on the crystal so it
is unaffected by CPU power mode. On MIPS 34K devices (single core) there is
one timer, and on 1004K devices (dual core) there are two.

Each timer has two sets of count/compare registers so that there is one for
each of the VPEs on the core. Because each core has 2 VPEs, register selection
takes the CPU number / 2 for the timer corrisponding to the core, then CPU
number % 2 for the register corrisponding to the VPE.

These timers use a percpu-devid IRQ to route interrupts to the VPE which set
the event.

Signed-off-by: Caleb James DeLisle &lt;cjd@cjdns.fr&gt;
Link: https://lore.kernel.org/r/20250507134500.390547-3-cjd@cjdns.fr
Signed-off-by: Daniel Lezcano &lt;daniel.lezcano@linaro.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Introduce a clocksource driver for the so-called high-precision timer (HPT)
in the EcoNet EN751221 and EN751627 MIPS SoCs.

It's a 32 bit upward-counting one-shot timer which relies on the crystal so it
is unaffected by CPU power mode. On MIPS 34K devices (single core) there is
one timer, and on 1004K devices (dual core) there are two.

Each timer has two sets of count/compare registers so that there is one for
each of the VPEs on the core. Because each core has 2 VPEs, register selection
takes the CPU number / 2 for the timer corrisponding to the core, then CPU
number % 2 for the register corrisponding to the VPE.

These timers use a percpu-devid IRQ to route interrupts to the VPE which set
the event.

Signed-off-by: Caleb James DeLisle &lt;cjd@cjdns.fr&gt;
Link: https://lore.kernel.org/r/20250507134500.390547-3-cjd@cjdns.fr
Signed-off-by: Daniel Lezcano &lt;daniel.lezcano@linaro.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>clocksource/drivers/atmel_tcb: Fix kconfig dependency</title>
<updated>2025-05-16T09:10:32+00:00</updated>
<author>
<name>Arnd Bergmann</name>
<email>arnd@arndb.de</email>
</author>
<published>2025-04-09T15:53:08+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=b8239054194ad67aff7d244185ef46890c5ae71a'/>
<id>b8239054194ad67aff7d244185ef46890c5ae71a</id>
<content type='text'>
Build-testing this driver on arm without CONFIG_OF produces a warning:

drivers/clocksource/timer-atmel-tcb.c:368:34: error: 'atmel_tcb_of_match' defined but not used [-Werror=unused-const-variable=]
  368 | static const struct of_device_id atmel_tcb_of_match[] = {
      |                                  ^~~~~~~~~~~~~~~~~~

Change the dependency to require CONFIG_OF for build testing to
avoid the warning. Testing remains possible on all architectures
as CONFIG_OF is user-selectable.

Cc: Nicolas Ferre &lt;nicolas.ferre@microchip.com&gt;
Cc: Claudiu Beznea &lt;claudiu.beznea@tuxon.dev&gt;
Reviewed-by: Alexandre Belloni &lt;alexandre.belloni@bootlin.com&gt;
Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
Link: https://lore.kernel.org/r/20250409155313.1096915-1-arnd@kernel.org
Signed-off-by: Daniel Lezcano &lt;daniel.lezcano@linaro.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Build-testing this driver on arm without CONFIG_OF produces a warning:

drivers/clocksource/timer-atmel-tcb.c:368:34: error: 'atmel_tcb_of_match' defined but not used [-Werror=unused-const-variable=]
  368 | static const struct of_device_id atmel_tcb_of_match[] = {
      |                                  ^~~~~~~~~~~~~~~~~~

Change the dependency to require CONFIG_OF for build testing to
avoid the warning. Testing remains possible on all architectures
as CONFIG_OF is user-selectable.

Cc: Nicolas Ferre &lt;nicolas.ferre@microchip.com&gt;
Cc: Claudiu Beznea &lt;claudiu.beznea@tuxon.dev&gt;
Reviewed-by: Alexandre Belloni &lt;alexandre.belloni@bootlin.com&gt;
Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
Link: https://lore.kernel.org/r/20250409155313.1096915-1-arnd@kernel.org
Signed-off-by: Daniel Lezcano &lt;daniel.lezcano@linaro.org&gt;
</pre>
</div>
</content>
</entry>
</feed>
