linux-toradex.git/drivers/clocksource/timer-sp804.c, branch v5.16-rc3

clocksource/drivers/sp804: Use pr_fmt

2020-12-03T18:16:18+00:00

Add pr_fmt to prefix pr_ output.

Signed-off-by: Kefeng Wang 
Signed-off-by: Daniel Lezcano 
Link: https://lore.kernel.org/r/20201029123317.90286-5-wangkefeng.wang@huawei.com

clocksource/drivers/sp804: Correct clk_get_rate handle

2020-12-03T18:16:17+00:00

clk_get_rate won't return negative value, correct clk_get_rate handle.

Signed-off-by: Kefeng Wang 
Signed-off-by: Daniel Lezcano 
Link: https://lore.kernel.org/r/20201029123317.90286-4-wangkefeng.wang@huawei.com

clocksource/drivers/sp804: Use clk_prepare_enable and clk_disable_unprepare

2020-12-03T18:16:17+00:00

Directly use clk_prepare_enable and clk_disable_unprepare.

Signed-off-by: Kefeng Wang 
Signed-off-by: Daniel Lezcano 
Link: https://lore.kernel.org/r/20201029123317.90286-3-wangkefeng.wang@huawei.com

clocksource/drivers/sp804: Make some symbol static

2020-12-03T18:16:17+00:00

drivers/clocksource/timer-sp804.c:38:31: warning: symbol 'arm_sp804_timer' was not declared. Should it be static?
drivers/clocksource/timer-sp804.c:47:31: warning: symbol 'hisi_sp804_timer' was not declared. Should it be static?
drivers/clocksource/timer-sp804.c:120:12: warning: symbol 'sp804_clocksource_and_sched_clock_init' was not declared. Should it be static?
drivers/clocksource/timer-sp804.c:219:12: warning: symbol 'sp804_clockevents_init' was not declared. Should it be static?

And move __initdata after the variables.

Signed-off-by: Kefeng Wang 
Signed-off-by: Daniel Lezcano 
Link: https://lore.kernel.org/r/20201029123317.90286-2-wangkefeng.wang@huawei.com

clocksource/drivers/sp804: Add static for functions such as sp804_clockevents_init()

2020-12-03T18:16:09+00:00

Add static for sp804_clocksource_and_sched_clock_init() and
sp804_clockevents_init(), they are only used in timer-sp804.c now.
Otherwise, the following warning will be reported:

drivers/clocksource/timer-sp804.c:68:12: warning: no previous prototype \
for 'sp804_clocksource_and_sched_clock_init' [-Wmissing-prototypes]
drivers/clocksource/timer-sp804.c:162:12: warning: no previous prototype \
for 'sp804_clockevents_init' [-Wmissing-prototypes]

Fixes: 975434f8b24a ("clocksource/drivers/sp804: Delete the leading "__" of some functions")
Fixes: 65f4d7ddc7b6 ("clocksource/drivers/sp804: Remove unused sp804_timer_disable() and timer-sp804.h")
Reported-by: kernel test robot 
Signed-off-by: Zhen Lei 
Signed-off-by: Daniel Lezcano 
Link: https://lore.kernel.org/r/20201021012259.2067-2-thunder.leizhen@huawei.com

clocksource/drivers/sp804: Enable Hisilicon sp804 timer 64bit mode

2020-09-24T08:51:04+00:00

A 100MHZ 32-bit timer will be wrapped up less than 43s. Although the
kernel maintains a software high 32-bit count in the tick IRQ. But it's
not applicable to the user mode APPs.

Note: The kernel still uses the lower 32 bits of the timer.

Signed-off-by: Zhen Lei 
Signed-off-by: Daniel Lezcano 
Link: https://lore.kernel.org/r/20200918132237.3552-9-thunder.leizhen@huawei.com

clocksource/drivers/sp804: Add support for Hisilicon sp804 timer

2020-09-24T08:51:04+00:00

The ARM SP804 supports a maximum of 32-bit counter, but Hisilicon extends
it to 64-bit. That means, the registers: TimerXload, TimerXValue and
TimerXBGLoad are 64bits, all other registers are the same as those in the
SP804. The driver code can be completely reused except that the register
offset is different.

Use compatible = "hisilicon,sp804" mark as Hisilicon sp804 timer.

Signed-off-by: Zhen Lei 
Signed-off-by: Daniel Lezcano 
Link: https://lore.kernel.org/r/20200918132237.3552-8-thunder.leizhen@huawei.com

clocksource/drivers/sp804: Support non-standard register offset

2020-09-24T08:51:04+00:00

The ARM SP804 supports a maximum of 32-bit counter, but Hisilicon extends
it to 64-bit. That means, the registers: TimerXload, TimerXValue and
TimerXBGLoad are 64bits, all other registers are the same as those in the
SP804. The driver code can be completely reused except that the register
offset is different.

Currently, we get a timer register address by: add the constant register
offset to the timer base address. e.g. "base + TIMER_CTRL". It can not be
dynamically adjusted at run time.

So create a new structure "sp804_timer" to record the original registers
offset, and create a new structure "sp804_clkevt" to record the
calculated registers address. So the "base + TIMER_CTRL" is changed to
"clkevt->ctrl", this will faster than "base + timer->ctrl".

For example:
	struct sp804_timer arm_sp804_timer = {
		.ctrl	= TIMER_CTRL,
	};

	struct sp804_clkevt clkevt;

	clkevt.ctrl = base + arm_sp804_timer.ctrl.

-	writel(0, base + TIMER_CTRL);
+	writel(0, clkevt->ctrl);

Signed-off-by: Zhen Lei 
Signed-off-by: Daniel Lezcano 
Link: https://lore.kernel.org/r/20200918132237.3552-7-thunder.leizhen@huawei.com

clocksource/drivers/sp804: Prepare for support non-standard register offset

2020-09-24T08:51:04+00:00

Add two local variables: timer1_base and timer2_base in sp804_of_init(),
to avoid repeatedly calculate the base address of timer2, and make it
easier to recognize timer1. Hope to make the next patch looks more clear.

No functional change.

Signed-off-by: Zhen Lei 
Signed-off-by: Daniel Lezcano 
Link: https://lore.kernel.org/r/20200918132237.3552-6-thunder.leizhen@huawei.com

clocksource/drivers/sp804: Remove a mismatched comment

2020-09-24T08:51:04+00:00

writel(0, base + TIMER_CTRL);
... ...
writel(xxx | TIMER_CTRL_PERIODIC, base + TIMER_CTRL);

The timer is just temporarily disabled, and it will be set to periodic
mode later.

The description of the field TimerMode of the register TimerXControl
as shown below:
0 = Timer module is in free-running mode (default)
1 = Timer module is in periodic mode.

Signed-off-by: Zhen Lei 
Signed-off-by: Daniel Lezcano 
Link: https://lore.kernel.org/r/20200918132237.3552-5-thunder.leizhen@huawei.com