<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-toradex.git/drivers/cpufreq/amd-pstate.h, branch v7.0-rc2</title>
<subtitle>Linux kernel for Apalis and Colibri modules</subtitle>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/'/>
<entry>
<title>amd-pstate-ut: Reset amd-pstate driver mode after running selftests</title>
<updated>2025-05-05T17:07:42+00:00</updated>
<author>
<name>Swapnil Sapkal</name>
<email>swapnil.sapkal@amd.com</email>
</author>
<published>2025-04-30T06:42:06+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=d26d16438bc5fd5524121244cc133f9872a63210'/>
<id>d26d16438bc5fd5524121244cc133f9872a63210</id>
<content type='text'>
In amd-pstate-ut, one of the basic test is to switch between all
possible mode combinations. After running this test the mode of the
amd-pstate driver is active mode. Store and reset the mode to its original
state.

Reviewed-by: Gautham R. Shenoy &lt;gautham.shenoy@amd.com&gt;
Signed-off-by: Swapnil Sapkal &lt;swapnil.sapkal@amd.com&gt;
Reviewed-by: Mario Limonciello &lt;mario.limonciello@amd.com&gt;
Link: https://lore.kernel.org/r/20250430064206.7402-1-swapnil.sapkal@amd.com
Signed-off-by: Mario Limonciello &lt;mario.limonciello@amd.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
In amd-pstate-ut, one of the basic test is to switch between all
possible mode combinations. After running this test the mode of the
amd-pstate driver is active mode. Store and reset the mode to its original
state.

Reviewed-by: Gautham R. Shenoy &lt;gautham.shenoy@amd.com&gt;
Signed-off-by: Swapnil Sapkal &lt;swapnil.sapkal@amd.com&gt;
Reviewed-by: Mario Limonciello &lt;mario.limonciello@amd.com&gt;
Link: https://lore.kernel.org/r/20250430064206.7402-1-swapnil.sapkal@amd.com
Signed-off-by: Mario Limonciello &lt;mario.limonciello@amd.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>cpufreq/amd-pstate: Add support for the "Requested CPU Min frequency" BIOS option</title>
<updated>2025-04-28T21:09:35+00:00</updated>
<author>
<name>Dhananjay Ugwekar</name>
<email>dhananjay.ugwekar@amd.com</email>
</author>
<published>2025-04-28T07:16:24+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=608a76b65288698677843d2f22418e03391ef95f'/>
<id>608a76b65288698677843d2f22418e03391ef95f</id>
<content type='text'>
Initialize lower frequency limit to the "Requested CPU Min frequency"
BIOS option (if it is set) value as part of the driver-&gt;init()
callback. The BIOS specified value is passed by the PMFW as min_perf in
CPPC_REQ MSR. To ensure that we don't mistake a stale min_perf value in
CPPC_REQ value as the "Requested CPU Min frequency" during a kexec wakeup,
reset the CPPC_REQ.min_perf value back to the BIOS specified one in the
offline, exit and suspend callbacks.

amd_pstate_target() and amd_pstate_epp_update_limit() which are invoked
as part of the resume() and online() callbacks will take care of restoring
the CPPC_REQ back to the correct values.

Signed-off-by: Dhananjay Ugwekar &lt;dhananjay.ugwekar@amd.com&gt;
Reviewed-by: Mario Limonciello &lt;mario.limonciello@amd.com&gt;
Link: https://lore.kernel.org/r/20250428071623.4309-1-dhananjay.ugwekar@amd.com
Signed-off-by: Mario Limonciello &lt;mario.limonciello@amd.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Initialize lower frequency limit to the "Requested CPU Min frequency"
BIOS option (if it is set) value as part of the driver-&gt;init()
callback. The BIOS specified value is passed by the PMFW as min_perf in
CPPC_REQ MSR. To ensure that we don't mistake a stale min_perf value in
CPPC_REQ value as the "Requested CPU Min frequency" during a kexec wakeup,
reset the CPPC_REQ.min_perf value back to the BIOS specified one in the
offline, exit and suspend callbacks.

amd_pstate_target() and amd_pstate_epp_update_limit() which are invoked
as part of the resume() and online() callbacks will take care of restoring
the CPPC_REQ back to the correct values.

Signed-off-by: Dhananjay Ugwekar &lt;dhananjay.ugwekar@amd.com&gt;
Reviewed-by: Mario Limonciello &lt;mario.limonciello@amd.com&gt;
Link: https://lore.kernel.org/r/20250428071623.4309-1-dhananjay.ugwekar@amd.com
Signed-off-by: Mario Limonciello &lt;mario.limonciello@amd.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>cpufreq/amd-pstate: Stop caching EPP</title>
<updated>2025-03-06T19:01:26+00:00</updated>
<author>
<name>Mario Limonciello</name>
<email>mario.limonciello@amd.com</email>
</author>
<published>2025-01-19T13:05:43+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=4e16c1175238f2b9d86199b427c5db1a24c9a85f'/>
<id>4e16c1175238f2b9d86199b427c5db1a24c9a85f</id>
<content type='text'>
EPP values are cached in the cpudata structure per CPU. This is needless
though because they are also cached in the CPPC request variable.

Drop the separate cache for EPP values and always reference the CPPC
request variable when needed.

Reviewed-by: Dhananjay Ugwekar &lt;dhananjay.ugwekar@amd.com&gt;
Reviewed-by: Gautham R. Shenoy &lt;gautham.shenoy@amd.com&gt;
Signed-off-by: Mario Limonciello &lt;mario.limonciello@amd.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
EPP values are cached in the cpudata structure per CPU. This is needless
though because they are also cached in the CPPC request variable.

Drop the separate cache for EPP values and always reference the CPPC
request variable when needed.

Reviewed-by: Dhananjay Ugwekar &lt;dhananjay.ugwekar@amd.com&gt;
Reviewed-by: Gautham R. Shenoy &lt;gautham.shenoy@amd.com&gt;
Signed-off-by: Mario Limonciello &lt;mario.limonciello@amd.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>cpufreq/amd-pstate: Drop `cppc_cap1_cached`</title>
<updated>2025-03-06T19:01:25+00:00</updated>
<author>
<name>Mario Limonciello</name>
<email>mario.limonciello@amd.com</email>
</author>
<published>2024-12-07T06:28:41+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=f458cf79d73b144d900e0c274b9eb8a2f3641a0e'/>
<id>f458cf79d73b144d900e0c274b9eb8a2f3641a0e</id>
<content type='text'>
The `cppc_cap1_cached` variable isn't used at all, there is no
need to read it at initialization for each CPU.

Reviewed-by: Gautham R. Shenoy &lt;gautham.shenoy@amd.com&gt;
Reviewed-by: Dhananjay Ugwekar &lt;dhananjay.ugwekar@amd.com&gt;
Signed-off-by: Mario Limonciello &lt;mario.limonciello@amd.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The `cppc_cap1_cached` variable isn't used at all, there is no
need to read it at initialization for each CPU.

Reviewed-by: Gautham R. Shenoy &lt;gautham.shenoy@amd.com&gt;
Reviewed-by: Dhananjay Ugwekar &lt;dhananjay.ugwekar@amd.com&gt;
Signed-off-by: Mario Limonciello &lt;mario.limonciello@amd.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>cpufreq/amd-pstate: Move perf values into a union</title>
<updated>2025-03-06T19:01:24+00:00</updated>
<author>
<name>Mario Limonciello</name>
<email>mario.limonciello@amd.com</email>
</author>
<published>2025-01-18T00:34:38+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=009d1c29a45194212e9310ccd91a19a673908a5c'/>
<id>009d1c29a45194212e9310ccd91a19a673908a5c</id>
<content type='text'>
By storing perf values in a union all the writes and reads can
be done atomically, removing the need for some concurrency protections.

While making this change, also drop the cached frequency values,
using inline helpers to calculate them on demand from perf value.

Reviewed-by: Gautham R. Shenoy &lt;gautham.shenoy@amd.com&gt;
Reviewed-by: Dhananjay Ugwekar &lt;dhananjay.ugwekar@amd.com&gt;
Signed-off-by: Mario Limonciello &lt;mario.limonciello@amd.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
By storing perf values in a union all the writes and reads can
be done atomically, removing the need for some concurrency protections.

While making this change, also drop the cached frequency values,
using inline helpers to calculate them on demand from perf value.

Reviewed-by: Gautham R. Shenoy &lt;gautham.shenoy@amd.com&gt;
Reviewed-by: Dhananjay Ugwekar &lt;dhananjay.ugwekar@amd.com&gt;
Signed-off-by: Mario Limonciello &lt;mario.limonciello@amd.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>cpufreq/amd-pstate: Drop min and max cached frequencies</title>
<updated>2025-03-06T19:01:24+00:00</updated>
<author>
<name>Mario Limonciello</name>
<email>mario.limonciello@amd.com</email>
</author>
<published>2025-01-23T22:16:01+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=a9b9b4c2a4cdd00428d14914e3c18be3856aba71'/>
<id>a9b9b4c2a4cdd00428d14914e3c18be3856aba71</id>
<content type='text'>
Use the perf_to_freq helpers to calculate this on the fly.
As the members are no longer cached add an extra check into
amd_pstate_epp_update_limit() to avoid unnecessary calls in
amd_pstate_update_min_max_limit().

Reviewed-by: Gautham R. Shenoy &lt;gautham.shenoy@amd.com&gt;
Reviewed-by: Dhananjay Ugwekar &lt;dhananjay.ugwekar@amd.com&gt;
Signed-off-by: Mario Limonciello &lt;mario.limonciello@amd.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Use the perf_to_freq helpers to calculate this on the fly.
As the members are no longer cached add an extra check into
amd_pstate_epp_update_limit() to avoid unnecessary calls in
amd_pstate_update_min_max_limit().

Reviewed-by: Gautham R. Shenoy &lt;gautham.shenoy@amd.com&gt;
Reviewed-by: Dhananjay Ugwekar &lt;dhananjay.ugwekar@amd.com&gt;
Signed-off-by: Mario Limonciello &lt;mario.limonciello@amd.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>cpufreq/amd-pstate: Convert all perf values to u8</title>
<updated>2025-02-24T00:54:56+00:00</updated>
<author>
<name>Dhananjay Ugwekar</name>
<email>dhananjay.ugwekar@amd.com</email>
</author>
<published>2025-02-05T11:25:17+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=555bbe67a622b297405e246d1868dbda3284bde8'/>
<id>555bbe67a622b297405e246d1868dbda3284bde8</id>
<content type='text'>
All perf values are always within 0-255 range, hence convert their
datatype to u8 everywhere.

Signed-off-by: Dhananjay Ugwekar &lt;dhananjay.ugwekar@amd.com&gt;
Reviewed-by: Mario Limonciello &lt;mario.limonciello@amd.com&gt;
Reviewed-by: Gautham R. Shenoy &lt;gautham.shenoy@amd.com&gt;
Link: https://lore.kernel.org/r/20250205112523.201101-7-dhananjay.ugwekar@amd.com
Signed-off-by: Mario Limonciello &lt;mario.limonciello@amd.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
All perf values are always within 0-255 range, hence convert their
datatype to u8 everywhere.

Signed-off-by: Dhananjay Ugwekar &lt;dhananjay.ugwekar@amd.com&gt;
Reviewed-by: Mario Limonciello &lt;mario.limonciello@amd.com&gt;
Reviewed-by: Gautham R. Shenoy &lt;gautham.shenoy@amd.com&gt;
Link: https://lore.kernel.org/r/20250205112523.201101-7-dhananjay.ugwekar@amd.com
Signed-off-by: Mario Limonciello &lt;mario.limonciello@amd.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>cpufreq/amd-pstate: Drop boost_state variable</title>
<updated>2024-12-11T16:44:53+00:00</updated>
<author>
<name>Mario Limonciello</name>
<email>mario.limonciello@amd.com</email>
</author>
<published>2024-12-09T18:52:48+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=95fad7fb58cfaa2a295aa54a1f001a16b9324963'/>
<id>95fad7fb58cfaa2a295aa54a1f001a16b9324963</id>
<content type='text'>
Currently boost_state is cached for every processor in cpudata structure
and driver boost state is set for every processor.

Both of these aren't necessary as the driver only needs to set once and
the policy stores whether boost is enabled.

Move the driver boost setting to registration and adjust all references
to cached value to pull from the policy instead.

Reviewed-by: Gautham R. Shenoy &lt;gautham.shenoy@amd.com&gt;
Link: https://lore.kernel.org/r/20241209185248.16301-16-mario.limonciello@amd.com
Signed-off-by: Mario Limonciello &lt;mario.limonciello@amd.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Currently boost_state is cached for every processor in cpudata structure
and driver boost state is set for every processor.

Both of these aren't necessary as the driver only needs to set once and
the policy stores whether boost is enabled.

Move the driver boost setting to registration and adjust all references
to cached value to pull from the policy instead.

Reviewed-by: Gautham R. Shenoy &lt;gautham.shenoy@amd.com&gt;
Link: https://lore.kernel.org/r/20241209185248.16301-16-mario.limonciello@amd.com
Signed-off-by: Mario Limonciello &lt;mario.limonciello@amd.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>cpufreq/amd-pstate: Drop cached epp_policy variable</title>
<updated>2024-12-11T16:44:52+00:00</updated>
<author>
<name>Mario Limonciello</name>
<email>mario.limonciello@amd.com</email>
</author>
<published>2024-12-09T18:52:38+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=3b43739824a6b617d8213dd2bce6fb1b2747c377'/>
<id>3b43739824a6b617d8213dd2bce6fb1b2747c377</id>
<content type='text'>
epp_policy is not used by any of the current code and there
is no need to cache it.

Reviewed-by: Gautham R. Shenoy &lt;gautham.shenoy@amd.com&gt;
Link: https://lore.kernel.org/r/20241209185248.16301-6-mario.limonciello@amd.com
Signed-off-by: Mario Limonciello &lt;mario.limonciello@amd.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
epp_policy is not used by any of the current code and there
is no need to cache it.

Reviewed-by: Gautham R. Shenoy &lt;gautham.shenoy@amd.com&gt;
Link: https://lore.kernel.org/r/20241209185248.16301-6-mario.limonciello@amd.com
Signed-off-by: Mario Limonciello &lt;mario.limonciello@amd.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>cpufreq/amd-pstate: Export symbols for changing modes</title>
<updated>2024-09-11T15:23:23+00:00</updated>
<author>
<name>Mario Limonciello</name>
<email>mario.limonciello@amd.com</email>
</author>
<published>2024-09-01T02:49:11+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=8d916815b0afad2a12a9f1b945c79fffc144dba8'/>
<id>8d916815b0afad2a12a9f1b945c79fffc144dba8</id>
<content type='text'>
In order to effectively test all mode switch combinations export
everything necessarily for amd-pstate-ut to trigger a mode switch.

Reviewed-by: Perry Yuan &lt;Perry.Yuan@amd.com&gt;
Signed-off-by: Mario Limonciello &lt;mario.limonciello@amd.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
In order to effectively test all mode switch combinations export
everything necessarily for amd-pstate-ut to trigger a mode switch.

Reviewed-by: Perry Yuan &lt;Perry.Yuan@amd.com&gt;
Signed-off-by: Mario Limonciello &lt;mario.limonciello@amd.com&gt;
</pre>
</div>
</content>
</entry>
</feed>
