linux-toradex.git/drivers/crypto/Makefile, branch tegra Linux kernel for Apalis and Colibri modules crypto: tegra: treat compilation warning as error 2012-08-02T16:36:13+00:00 schowdary schowdary@nvidia.com 2012-07-24T15:42:04+00:00 2f32ad7958d5adaa1eda4c23541b50efd57708c2 - Add compilation flag to treat warning as error bug 949219 Change-Id: Ie5b8eb8ebb3ca37ac111fb0acc64cd8667e2c8e1 Signed-off-by: schowdary <schowdary@nvidia.com> Reviewed-on: http://git-master/r/118079 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Sanjay Singh Rawat <srawat@nvidia.com> Reviewed-by: Sachin Nikam <snikam@nvidia.com> 
- Add compilation flag to treat warning as error

bug 949219

Change-Id: Ie5b8eb8ebb3ca37ac111fb0acc64cd8667e2c8e1
Signed-off-by: schowdary <schowdary@nvidia.com>
Reviewed-on: http://git-master/r/118079
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sanjay Singh Rawat <srawat@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
gcov-kernel: Add GCOV_KERNEL := y to Makefiles 2011-12-01T05:49:58+00:00 Juha Tukkinen jtukkinen@nvidia.com 2011-11-08T13:48:34+00:00 9fac242eb449b68905fd1c4b74fd94dd8ddcbc79 These changes have no effect if CONFIG_GCOV_KERNEL is not set in defconfig. It is easier to trigger GCOV for kernel if this patch is in by only setting the before mentioned flag. Change-Id: I8aade309da2da62c4b3889bd84e4123ba8f182da Signed-off-by: Juha Tukkinen <jtukkinen@nvidia.com> Reviewed-on: http://git-master/r/62999 Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com> Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com> Rebase-Id: R4c238f707f1db600f188ae83426336753992b7be 
These changes have no effect if CONFIG_GCOV_KERNEL is not set in
defconfig. It is easier to trigger GCOV for kernel if this patch
is in by only setting the before mentioned flag.

Change-Id: I8aade309da2da62c4b3889bd84e4123ba8f182da
Signed-off-by: Juha Tukkinen <jtukkinen@nvidia.com>
Reviewed-on: http://git-master/r/62999
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

Rebase-Id: R4c238f707f1db600f188ae83426336753992b7be
crypto: se: tegra: Support for Security Engine 2011-12-01T05:41:47+00:00 Kasoju Mallikarjun mkasoju@nvidia.com 2011-05-03T16:29:05+00:00 d7b1af98d7f53a54abebeea6f9aa81304514f0f5 Added support for Security Engine. Following HW features are supported: CBC,ECB,CTR,OFB,SHA1,SHA224,SHA384,SHA512 and AES-CMAC Original-Change-Id: Ic45c29add689f55be68966d333d1cb7cdb378353 Reviewed-on: http://git-master/r/29950 Tested-by: Mallikarjun Kasoju <mkasoju@nvidia.com> Reviewed-by: Varun Wadekar <vwadekar@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com> Rebase-Id: R57f92020a7a713f624afe3b1d42da489bf89daba 
Added support for Security Engine.

Following HW features are supported:
CBC,ECB,CTR,OFB,SHA1,SHA224,SHA384,SHA512 and AES-CMAC

Original-Change-Id: Ic45c29add689f55be68966d333d1cb7cdb378353
Reviewed-on: http://git-master/r/29950
Tested-by: Mallikarjun Kasoju <mkasoju@nvidia.com>
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

Rebase-Id: R57f92020a7a713f624afe3b1d42da489bf89daba
crypto: driver for tegra AES hardware 2011-12-01T05:36:49+00:00 Varun Wadekar vwadekar@nvidia.com 2010-10-18T11:29:31+00:00 f4753e434d92a2b4d958190b75c17a0215a74bf3 driver supports ecb/cbc/ansi_x9.31rng modes, 128, 192 and 256-bit key sizes and encrypt/decrypt using ssk. Change-Id: I63e03ead5b53adc5e44cf5b60f9f700dea2a2e61 Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> 
driver supports ecb/cbc/ansi_x9.31rng modes, 128, 192 and 256-bit key sizes
and encrypt/decrypt using ssk.

Change-Id: I63e03ead5b53adc5e44cf5b60f9f700dea2a2e61
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
crypto: s5p-sss - add S5PV210 advanced crypto engine support 2011-04-08T12:40:51+00:00 Vladimir Zapolskiy vzapolskiy@gmail.com 2011-04-08T12:40:51+00:00 a49e490c7a8a5c6c9474b1936ad8048f3e4440fc This change adds support for AES encrypting and decrypting using advanced crypto engine found on Samsung S5PV210 and S5PC110 SoCs. Signed-off-by: Vladimir Zapolskiy <vzapolskiy@gmail.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> 
This change adds support for AES encrypting and decrypting using
advanced crypto engine found on Samsung S5PV210 and S5PC110 SoCs.

Signed-off-by: Vladimir Zapolskiy <vzapolskiy@gmail.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
crypto: caam - Add support for the Freescale SEC4/CAAM 2011-03-27T02:45:16+00:00 Kim Phillips kim.phillips@freescale.com 2011-03-13T08:54:26+00:00 8e8ec596e6c0144e2dd500a57ee23dde9684df46 The SEC4 supercedes the SEC2.x/3.x as Freescale's Integrated Security Engine. Its programming model is incompatible with all prior versions of the SEC (talitos). The SEC4 is also known as the Cryptographic Accelerator and Assurance Module (CAAM); this driver is named caam. This initial submission does not include support for Data Path mode operation - AEAD descriptors are submitted via the job ring interface, while the Queue Interface (QI) is enabled for use by others. Only AEAD algorithms are implemented at this time, for use with IPsec. Many thanks to the Freescale STC team for their contributions to this driver. Signed-off-by: Steve Cornelius <sec@pobox.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> 
The SEC4 supercedes the SEC2.x/3.x as Freescale's
Integrated Security Engine.  Its programming model is
incompatible with all prior versions of the SEC (talitos).

The SEC4 is also known as the Cryptographic Accelerator
and Assurance Module (CAAM); this driver is named caam.

This initial submission does not include support for Data Path
mode operation - AEAD descriptors are submitted via the job
ring interface, while the Queue Interface (QI) is enabled
for use by others.  Only AEAD algorithms are implemented
at this time, for use with IPsec.

Many thanks to the Freescale STC team for their contributions
to this driver.

Signed-off-by: Steve Cornelius <sec@pobox.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
crypto: picoxcell - add support for the picoxcell crypto engines 2011-02-21T11:42:40+00:00 Jamie Iles jamie@jamieiles.com 2011-02-21T05:43:21+00:00 ce92136843cb6e14aba5fd7bc4e88dbe71e70c5a Picochip picoXcell devices have two crypto engines, one targeted at IPSEC offload and the other at WCDMA layer 2 ciphering. Signed-off-by: Jamie Iles <jamie@jamieiles.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> 
Picochip picoXcell devices have two crypto engines, one targeted
at IPSEC offload and the other at WCDMA layer 2 ciphering.

Signed-off-by: Jamie Iles <jamie@jamieiles.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
crypto: Makefile - replace the use of <module>-objs with <module>-y 2010-10-19T12:52:26+00:00 Tracey Dent tdent48227@gmail.com 2010-10-19T12:52:26+00:00 6d388b43d2c4ef6f0806c9bb9a5edebf00a23c6a Changed <module>-objs to <module>-y in Makefile. Signed-off-by: Tracey Dent <tdent48227@gmail.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> 
Changed <module>-objs to <module>-y in Makefile.

Signed-off-by: Tracey Dent <tdent48227@gmail.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
crypto: omap-aes - OMAP2/3 AES hw accelerator driver 2010-09-03T11:16:02+00:00 Dmitry Kasatkin dmitry.kasatkin@nokia.com 2010-09-03T11:16:02+00:00 537559a5b3ef854772bd89fbb43aa77d0bbfb721 Signed-off-by: Dmitry Kasatkin <dmitry.kasatkin@nokia.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> 
Signed-off-by: Dmitry Kasatkin <dmitry.kasatkin@nokia.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
crypto: n2 - Add Niagara2 crypto driver 2010-05-19T04:14:04+00:00 David S. Miller davem@davemloft.net 2010-05-19T04:14:04+00:00 0a625fd2abaa0aa0a6852b153d429dbc784748cc Current deficiencies: 1) No HMAC hash support yet. 2) Although the algs are registered as ASYNC they always run synchronously. Signed-off-by: David S. Miller <davem@davemloft.net> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> 
Current deficiencies:

1) No HMAC hash support yet.

2) Although the algs are registered as ASYNC they always run
   synchronously.

Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>