linux-toradex.git/drivers/crypto/Makefile, branch v3.0.79 Linux kernel for Apalis and Colibri modules crypto: s5p-sss - add S5PV210 advanced crypto engine support 2011-04-08T12:40:51+00:00 Vladimir Zapolskiy vzapolskiy@gmail.com 2011-04-08T12:40:51+00:00 a49e490c7a8a5c6c9474b1936ad8048f3e4440fc This change adds support for AES encrypting and decrypting using advanced crypto engine found on Samsung S5PV210 and S5PC110 SoCs. Signed-off-by: Vladimir Zapolskiy <vzapolskiy@gmail.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> 
This change adds support for AES encrypting and decrypting using
advanced crypto engine found on Samsung S5PV210 and S5PC110 SoCs.

Signed-off-by: Vladimir Zapolskiy <vzapolskiy@gmail.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
crypto: caam - Add support for the Freescale SEC4/CAAM 2011-03-27T02:45:16+00:00 Kim Phillips kim.phillips@freescale.com 2011-03-13T08:54:26+00:00 8e8ec596e6c0144e2dd500a57ee23dde9684df46 The SEC4 supercedes the SEC2.x/3.x as Freescale's Integrated Security Engine. Its programming model is incompatible with all prior versions of the SEC (talitos). The SEC4 is also known as the Cryptographic Accelerator and Assurance Module (CAAM); this driver is named caam. This initial submission does not include support for Data Path mode operation - AEAD descriptors are submitted via the job ring interface, while the Queue Interface (QI) is enabled for use by others. Only AEAD algorithms are implemented at this time, for use with IPsec. Many thanks to the Freescale STC team for their contributions to this driver. Signed-off-by: Steve Cornelius <sec@pobox.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> 
The SEC4 supercedes the SEC2.x/3.x as Freescale's
Integrated Security Engine.  Its programming model is
incompatible with all prior versions of the SEC (talitos).

The SEC4 is also known as the Cryptographic Accelerator
and Assurance Module (CAAM); this driver is named caam.

This initial submission does not include support for Data Path
mode operation - AEAD descriptors are submitted via the job
ring interface, while the Queue Interface (QI) is enabled
for use by others.  Only AEAD algorithms are implemented
at this time, for use with IPsec.

Many thanks to the Freescale STC team for their contributions
to this driver.

Signed-off-by: Steve Cornelius <sec@pobox.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
crypto: picoxcell - add support for the picoxcell crypto engines 2011-02-21T11:42:40+00:00 Jamie Iles jamie@jamieiles.com 2011-02-21T05:43:21+00:00 ce92136843cb6e14aba5fd7bc4e88dbe71e70c5a Picochip picoXcell devices have two crypto engines, one targeted at IPSEC offload and the other at WCDMA layer 2 ciphering. Signed-off-by: Jamie Iles <jamie@jamieiles.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> 
Picochip picoXcell devices have two crypto engines, one targeted
at IPSEC offload and the other at WCDMA layer 2 ciphering.

Signed-off-by: Jamie Iles <jamie@jamieiles.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
crypto: Makefile - replace the use of <module>-objs with <module>-y 2010-10-19T12:52:26+00:00 Tracey Dent tdent48227@gmail.com 2010-10-19T12:52:26+00:00 6d388b43d2c4ef6f0806c9bb9a5edebf00a23c6a Changed <module>-objs to <module>-y in Makefile. Signed-off-by: Tracey Dent <tdent48227@gmail.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> 
Changed <module>-objs to <module>-y in Makefile.

Signed-off-by: Tracey Dent <tdent48227@gmail.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
crypto: omap-aes - OMAP2/3 AES hw accelerator driver 2010-09-03T11:16:02+00:00 Dmitry Kasatkin dmitry.kasatkin@nokia.com 2010-09-03T11:16:02+00:00 537559a5b3ef854772bd89fbb43aa77d0bbfb721 Signed-off-by: Dmitry Kasatkin <dmitry.kasatkin@nokia.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> 
Signed-off-by: Dmitry Kasatkin <dmitry.kasatkin@nokia.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
crypto: n2 - Add Niagara2 crypto driver 2010-05-19T04:14:04+00:00 David S. Miller davem@davemloft.net 2010-05-19T04:14:04+00:00 0a625fd2abaa0aa0a6852b153d429dbc784748cc Current deficiencies: 1) No HMAC hash support yet. 2) Although the algs are registered as ASYNC they always run synchronously. Signed-off-by: David S. Miller <davem@davemloft.net> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> 
Current deficiencies:

1) No HMAC hash support yet.

2) Although the algs are registered as ASYNC they always run
   synchronously.

Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
crypto: omap - sha1 & md5 driver 2010-05-03T03:10:59+00:00 Dmitry Kasatkin dmitry.kasatkin@nokia.com 2010-05-03T03:10:59+00:00 8628e7c89075834fc7b44629d09ff4f9043af114 Earlier kernel contained omap sha1 and md5 driver, which was not maintained, was not ported to new crypto APIs and removed from the source tree. - implements async crypto API using dma and cpu. - supports multiple sham instances if available - hmac - concurrent requests Signed-off-by: Dmitry Kasatkin <dmitry.kasatkin@nokia.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> 
Earlier kernel contained omap sha1 and md5 driver, which was not maintained,
was not ported to new crypto APIs and removed from the source tree.

- implements async  crypto API using dma and cpu.
- supports multiple sham instances if available
- hmac
- concurrent requests

Signed-off-by: Dmitry Kasatkin <dmitry.kasatkin@nokia.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
crypto: mv_cesa - Add support for Orion5X crypto engine 2009-08-10T02:50:03+00:00 Sebastian Andrzej Siewior sebastian@breakpoint.cc 2009-08-10T02:50:03+00:00 85a7f0ac5370901916a21935e1fafbe397b70f80 This adds support for Marvell's Cryptographic Engines and Security Accelerator (CESA) which can be found on a few SoC. Tested with dm-crypt. Acked-by: Nicolas Pitre <nico@marvell.com> Signed-off-by: Sebastian Andrzej Siewior <sebastian@breakpoint.cc> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> 
This adds support for Marvell's Cryptographic Engines and Security
Accelerator (CESA) which can be found on a few SoC.
Tested with dm-crypt.

Acked-by: Nicolas Pitre <nico@marvell.com>
Signed-off-by: Sebastian Andrzej Siewior <sebastian@breakpoint.cc>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
crypto: amcc - Add crypt4xx driver 2009-02-18T08:49:43+00:00 James Hsiao jhsiao@amcc.com 2009-02-05T05:18:13+00:00 049359d655277c382683a6030ae0bac485568ffc This patch adds support for AMCC ppc4xx security device driver. This is the initial release that includes the driver framework with AES and SHA1 algorithms support. The remaining algorithms will be released in the near future. Signed-off-by: James Hsiao <jhsiao@amcc.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> 
This patch adds support for AMCC ppc4xx security device driver. This is the
initial release that includes the driver framework with AES and SHA1 algorithms
support.

The remaining algorithms will be released in the near future.

Signed-off-by: James Hsiao <jhsiao@amcc.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
crypto: ixp4xx - Hardware crypto support for IXP4xx CPUs 2008-07-10T12:35:16+00:00 Christian Hohnstaedt chohnstaedt@innominate.com 2008-06-25T06:38:47+00:00 81bef0150074d677d8cbd4e971a8ce6c9746a1fc Add support for the hardware crypto engine provided by the NPE C of the Intel IXP4xx networking processor series. Supported ciphers: des, des3, aes and a combination of them with md5 and sha1 hmac Signed-off-by: Christian Hohnstaedt <chohnstaedt@innominate.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> 
Add support for the hardware crypto engine provided by the NPE C
of the Intel IXP4xx networking processor series.

Supported ciphers: des, des3, aes
and a combination of them with md5 and sha1 hmac

Signed-off-by: Christian Hohnstaedt <chohnstaedt@innominate.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>