linux-toradex.git/drivers/crypto/caam/regs.h, branch v3.12

crypto: caam - RNG instantiation by directly programming DECO

2013-08-01T00:50:21+00:00

Remove the dependency of RNG instantiation on Job Ring. Now
RNG instantiation for devices with RNG version > 4 is done
by directly programming DECO 0.

Signed-off-by: Ruchika Gupta 
Signed-off-by: Herbert Xu

crypto: caam - FIX RNG init for RNG greater than equal to 4

2013-05-14T02:14:51+00:00

For SEC including a RNG block version >= 4, special initialization
must occur before any descriptor that uses RNG block can be
submitted. This initialization is required not only for SEC
with version greater than 5.0, but for SEC with RNG version >=4.
There may be a case where RNG has already been instantiated by
u-boot or boot ROM code.In such SoCs, if RNG is initialized again
SEC would returns "Instantiation error". Hence, the initialization
status of RNG4 should be also checked before doing RNG init.

Signed-off-by: Ruchika Gupta 
Signed-off-by: Alex Porosanu 
Signed-off-by: Andy Fleming 
Reviewed-by: Vakul Garg 
Signed-off-by: Herbert Xu

crypto: caam - set RDB bit in security configuration register

2013-03-22T10:13:54+00:00

This change is required for post SEC-5.0 devices which have RNG4.
Setting RDB in security configuration register allows CAAM to use the
"Random Data Buffer" to be filled by a single request. The Random Data
Buffer is large enough for ten packets to get their IVs from a single
request. If the Random Data Buffer is not enabled, then each IV causes a
separate request, and RNG4 hardware cannot keep up resulting in lower
IPSEC throughput if random IVs are used.

Signed-off-by: Vakul Garg 
Signed-off-by: Herbert Xu

crypto: caam - ERA retrieval and printing for SEC device

2012-07-11T03:06:11+00:00

This patch adds support for retrieving and printing of
SEC ERA information. It is useful for knowing beforehand
what features exist from the SEC point of view on a
certain SoC. Only era-s 1 to 4 are currently supported;
other eras will appear as unknown.

Signed-off-by: Alex Porosanu 

- rebased onto current cryptodev master
- made caam_eras static

Signed-off-by: Kim Phillips 
Signed-off-by: Herbert Xu

crypto: caam - add support for SEC v5.x RNG4

2012-06-27T06:42:06+00:00

The SEC v4.x' RNGB h/w block self-initialized.  RNG4, available
on SEC versions 5 and beyond, is based on a different standard
that requires manual initialization.

Also update any new errors From the SEC v5.2 reference manual:
The SEC v5.2's RNG4 unit reuses some error IDs, thus the addition
of rng_err_id_list over the CHA-independent err_id_list.

Signed-off-by: Kim Phillips 
Signed-off-by: Herbert Xu

crypto: caam - remove DECO access initialization code

2011-12-20T07:20:05+00:00

Access to the SEC4 DECOs (DEscriptor COntrollers) (for debug purposes)
isn't supported or used, and its register access initialization code
erroneously makes illegal i/o accesses that show up as errors when
run under simulation.  Remove it until proper support (via DECORR)
is added.

Signed-off-by: Kim Phillips 
Signed-off-by: Herbert Xu

crypto: caam - fix queue interface detection

2011-05-02T23:53:35+00:00

The presence of a h/w Queue Interface would fail due to this
cut-n-paste snafu.

Signed-off-by: Kim Phillips 
Signed-off-by: Herbert Xu

crypto: caam - Add support for the Freescale SEC4/CAAM

2011-03-27T02:45:16+00:00

The SEC4 supercedes the SEC2.x/3.x as Freescale's
Integrated Security Engine.  Its programming model is
incompatible with all prior versions of the SEC (talitos).

The SEC4 is also known as the Cryptographic Accelerator
and Assurance Module (CAAM); this driver is named caam.

This initial submission does not include support for Data Path
mode operation - AEAD descriptors are submitted via the job
ring interface, while the Queue Interface (QI) is enabled
for use by others.  Only AEAD algorithms are implemented
at this time, for use with IPsec.

Many thanks to the Freescale STC team for their contributions
to this driver.

Signed-off-by: Steve Cornelius 
Signed-off-by: Kim Phillips 
Signed-off-by: Herbert Xu