linux-toradex.git/drivers/crypto, branch tegra Linux kernel for Apalis and Colibri modules crypto, tegra: fix build without pm runtime 2018-03-28T12:21:43+00:00 Marcel Ziswiler marcel.ziswiler@toradex.com 2018-01-11T08:20:47+00:00 b63ee2039e292ee00d3f5650ae29eaa2c67e3b09 Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Acked-by: Dominik Sliwa <dominik.sliwa@toradex.com> 
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Acked-by: Dominik Sliwa <dominik.sliwa@toradex.com>
crypto: tegra: treat compilation warning as error 2012-08-02T16:36:13+00:00 schowdary schowdary@nvidia.com 2012-07-24T15:42:04+00:00 2f32ad7958d5adaa1eda4c23541b50efd57708c2 - Add compilation flag to treat warning as error bug 949219 Change-Id: Ie5b8eb8ebb3ca37ac111fb0acc64cd8667e2c8e1 Signed-off-by: schowdary <schowdary@nvidia.com> Reviewed-on: http://git-master/r/118079 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Sanjay Singh Rawat <srawat@nvidia.com> Reviewed-by: Sachin Nikam <snikam@nvidia.com> 
- Add compilation flag to treat warning as error

bug 949219

Change-Id: Ie5b8eb8ebb3ca37ac111fb0acc64cd8667e2c8e1
Signed-off-by: schowdary <schowdary@nvidia.com>
Reviewed-on: http://git-master/r/118079
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sanjay Singh Rawat <srawat@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
crypto: tegra-se: Enable interrupts after clock enable 2012-07-09T23:39:36+00:00 Victor(Weiguo) Pan wpan@nvidia.com 2012-07-02T22:53:08+00:00 25a4796d13bfd8ae0e7618e573ab0aad6f928a6d Because SE interrupts could be enabled in bootloader, if it's not cleared before jumping into kernel, it continues to assert the interrupt line to interrupt controller. When SE interrupts is enabled in kernel, to access SE registers in IST without clock enabled hung the CPU. To fix this issue, interrupt enabling is moved after clock is enabled. bug 1010334 Change-Id: I1b909efce2c9d92c3112039fc217f7c1360f9bbb Reviewed-on: http://git-master/r/113073 (cherry picked from commit b06e6662f738ad01a3b2b6803db654abaa03385e) Signed-off-by: Victor(Weiguo) Pan <wpan@nvidia.com> Change-Id: Ide4b0295c781e0bba7aa071616e3e6160e44ee76 Reviewed-on: http://git-master/r/114064 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com> 
Because SE interrupts could be enabled in bootloader, if it's not
cleared before jumping into kernel, it continues to assert the
interrupt line to interrupt controller. When SE interrupts is
enabled in kernel, to access SE registers in IST without clock
enabled hung the CPU. To fix this issue, interrupt enabling is
moved after clock is enabled.

bug 1010334

Change-Id: I1b909efce2c9d92c3112039fc217f7c1360f9bbb
Reviewed-on: http://git-master/r/113073
(cherry picked from commit b06e6662f738ad01a3b2b6803db654abaa03385e)

Signed-off-by: Victor(Weiguo) Pan <wpan@nvidia.com>
Change-Id: Ide4b0295c781e0bba7aa071616e3e6160e44ee76
Reviewed-on: http://git-master/r/114064
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
crypto: tegra-aes: synchronize dma buffer access 2012-07-06T16:47:35+00:00 Sanjay Singh Rawat srawat@nvidia.com 2012-06-27T12:48:47+00:00 0d60794cd57d7ff483d1d6dcb4c00805779141bb - Using the dma sync apis to keep coherency. bug 984039 Change-Id: I9e389d2679f05c519ae4a51462247b7efeae01ca Signed-off-by: Sanjay Singh Rawat <srawat@nvidia.com> Reviewed-on: http://git-master/r/111612 Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com> Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com> 
- Using the dma sync apis to keep coherency.

bug 984039

Change-Id: I9e389d2679f05c519ae4a51462247b7efeae01ca
Signed-off-by: Sanjay Singh Rawat <srawat@nvidia.com>
Reviewed-on: http://git-master/r/111612
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
crypto: tegra-aes: correct key table buffer size 2012-07-03T22:03:39+00:00 Sanjay Singh Rawat srawat@nvidia.com 2012-06-27T11:58:03+00:00 f7565fbe6122648115a078b6560c0e955ca23f40 - Correcting the size of the dma buffer allocated for the key table. Change-Id: I34c0d0554710219021cb534e61a558cf217ccc19 Signed-off-by: Sanjay Singh Rawat <srawat@nvidia.com> Reviewed-on: http://git-master/r/111577 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com> Reviewed-by: Varun Wadekar <vwadekar@nvidia.com> 
- Correcting the size of the dma buffer allocated for the key table.

Change-Id: I34c0d0554710219021cb534e61a558cf217ccc19
Signed-off-by: Sanjay Singh Rawat <srawat@nvidia.com>
Reviewed-on: http://git-master/r/111577
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
crypto: tegra-se: Use sg_next to get next sg 2012-06-04T20:39:06+00:00 Mallikarjun Kasoju mkasoju@nvidia.com 2012-05-09T12:54:17+00:00 2d355c2e2b66359ed3a7f044185df5cfaf305c82 Use sg_next to get next sg Bug 958431 Signed-off-by: Mallikarjun Kasoju <mkasoju@nvidia.com> Change-Id: I14aa7c9c551d0230b9c5b681a2699dd5355d0a6d Reviewed-on: http://git-master/r/98449 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Mallikarjun Kasoju <mkasoju@nvidia.com> Tested-by: Mallikarjun Kasoju <mkasoju@nvidia.com> Reviewed-by: Venkat Moganty <vmoganty@nvidia.com> 
Use sg_next to get next sg

Bug 958431

Signed-off-by: Mallikarjun Kasoju <mkasoju@nvidia.com>

Change-Id: I14aa7c9c551d0230b9c5b681a2699dd5355d0a6d
Reviewed-on: http://git-master/r/98449
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Mallikarjun Kasoju <mkasoju@nvidia.com>
Tested-by: Mallikarjun Kasoju <mkasoju@nvidia.com>
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
crypto: tegra-aes: schedule single work handler 2012-04-16T21:05:14+00:00 Amit Kamath akamath@nvidia.com 2012-03-29T05:48:07+00:00 c8147f8213ebd279816256f79adee23085dbf4b8 Multiple queue were getting scheduled leading to race condition. Bug 955259 Change-Id: I7dd8d0d15b17552c3a611449642439ae21fa4b5d Signed-off-by: Amit Kamath <akamath@nvidia.com> Reviewed-on: http://git-master/r/93097 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Gerrit_Virtual_Submit Reviewed-by: Nitin Kumbhar <nkumbhar@nvidia.com> Reviewed-by: Sanjay Singh Rawat <srawat@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com> Reviewed-by: Varun Wadekar <vwadekar@nvidia.com> 
Multiple queue were getting scheduled leading to race condition.

Bug 955259

Change-Id: I7dd8d0d15b17552c3a611449642439ae21fa4b5d
Signed-off-by: Amit Kamath <akamath@nvidia.com>
Reviewed-on: http://git-master/r/93097
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Gerrit_Virtual_Submit
Reviewed-by: Nitin Kumbhar <nkumbhar@nvidia.com>
Reviewed-by: Sanjay Singh Rawat <srawat@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
crypto: tegra-aes: save key during key call 2012-03-27T00:50:35+00:00 Sanjay Singh Rawat srawat@nvidia.com 2012-03-14T13:18:29+00:00 fb23fdbe8951e1a11d13b921ae2fde91857ae55c Save the key in hardware when the key setting call comes. Currently it is set at later time. Bug 917607 Change-Id: Ibdacb07c16c161eeba00eda6716884518e40c40a Signed-off-by: Sanjay Singh Rawat <srawat@nvidia.com> Reviewed-on: http://git-master/r/90072 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Varun Wadekar <vwadekar@nvidia.com> 
Save the key in hardware when the key setting call comes. Currently it is
set at later time.

Bug 917607

Change-Id: Ibdacb07c16c161eeba00eda6716884518e40c40a
Signed-off-by: Sanjay Singh Rawat <srawat@nvidia.com>
Reviewed-on: http://git-master/r/90072
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
crypto: tegra-se: Check for valid reqeusted buffer size 2012-03-12T15:24:11+00:00 Mallikarjun Kasoju mkasoju@nvidia.com 2012-03-12T03:51:25+00:00 50d651b6cc7b3fdc31b49d81ad3684510e5a16a3 Added check for valid requested process buffer size. Bug 928454 Change-Id: I2dc389af64cb3de2f0a0a3f0bbc5057dd9bd676c Reviewed-on: http://git-master/r/89381 Reviewed-by: Mallikarjun Kasoju <mkasoju@nvidia.com> Tested-by: Mallikarjun Kasoju <mkasoju@nvidia.com> Reviewed-by: Venkat Moganty <vmoganty@nvidia.com> 
Added check for valid requested process buffer size.

Bug 928454

Change-Id: I2dc389af64cb3de2f0a0a3f0bbc5057dd9bd676c
Reviewed-on: http://git-master/r/89381
Reviewed-by: Mallikarjun Kasoju <mkasoju@nvidia.com>
Tested-by: Mallikarjun Kasoju <mkasoju@nvidia.com>
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
crypto: tegra-aes: fix "syntax error" in license 2012-03-08T05:50:55+00:00 Marc Dietrich marvin24@gmx.de 2012-03-06T20:50:55+00:00 d6f27584aba731e251c18c52ffd197d1101db02d Should have been "GPL v2", not "GPLv2". Signed-off-by: Marc Dietrich <marvin24@gmx.de> Signed-off-by: Stephen Warren <swarren@wwwdotorg.org> Change-Id: I7b4669c023c48e1080de7f87ed7166dc9b47884a Reviewed-on: http://git-master/r/88101 Reviewed-by: Scott Williams <scwilliams@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Tested-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Varun Wadekar <vwadekar@nvidia.com> 
Should have been "GPL v2", not "GPLv2".

Signed-off-by: Marc Dietrich <marvin24@gmx.de>
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
Change-Id: I7b4669c023c48e1080de7f87ed7166dc9b47884a
Reviewed-on: http://git-master/r/88101
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>