<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-toradex.git/drivers/crypto, branch v4.10</title>
<subtitle>Linux kernel for Apalis and Colibri modules</subtitle>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/'/>
<entry>
<title>Merge branch 'linus' of git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6</title>
<updated>2017-02-06T22:16:23+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2017-02-06T22:16:23+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=396bf4cd835e62d70fad4a03a8963e61f19021f2'/>
<id>396bf4cd835e62d70fad4a03a8963e61f19021f2</id>
<content type='text'>
Pull crypto fixes from Herbert Xu:

 - use-after-free in algif_aead

 - modular aesni regression when pcbc is modular but absent

 - bug causing IO page faults in ccp

 - double list add in ccp

 - NULL pointer dereference in qat (two patches)

 - panic in chcr

 - NULL pointer dereference in chcr

 - out-of-bound access in chcr

* 'linus' of git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6:
  crypto: chcr - Fix key length for RFC4106
  crypto: algif_aead - Fix kernel panic on list_del
  crypto: aesni - Fix failure when pcbc module is absent
  crypto: ccp - Fix double add when creating new DMA command
  crypto: ccp - Fix DMA operations when IOMMU is enabled
  crypto: chcr - Check device is allocated before use
  crypto: chcr - Fix panic on dma_unmap_sg
  crypto: qat - zero esram only for DH85x devices
  crypto: qat - fix bar discovery for c62x
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Pull crypto fixes from Herbert Xu:

 - use-after-free in algif_aead

 - modular aesni regression when pcbc is modular but absent

 - bug causing IO page faults in ccp

 - double list add in ccp

 - NULL pointer dereference in qat (two patches)

 - panic in chcr

 - NULL pointer dereference in chcr

 - out-of-bound access in chcr

* 'linus' of git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6:
  crypto: chcr - Fix key length for RFC4106
  crypto: algif_aead - Fix kernel panic on list_del
  crypto: aesni - Fix failure when pcbc module is absent
  crypto: ccp - Fix double add when creating new DMA command
  crypto: ccp - Fix DMA operations when IOMMU is enabled
  crypto: chcr - Check device is allocated before use
  crypto: chcr - Fix panic on dma_unmap_sg
  crypto: qat - zero esram only for DH85x devices
  crypto: qat - fix bar discovery for c62x
</pre>
</div>
</content>
</entry>
<entry>
<title>crypto: chcr - Fix key length for RFC4106</title>
<updated>2017-02-03T10:09:31+00:00</updated>
<author>
<name>Harsh Jain</name>
<email>harsh@chelsio.com</email>
</author>
<published>2017-01-27T10:39:06+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=7c2cf1c4615cc2f576d0604406cdf0065f00b83b'/>
<id>7c2cf1c4615cc2f576d0604406cdf0065f00b83b</id>
<content type='text'>
Check keylen before copying salt to avoid wrap around of Integer.

Signed-off-by: Harsh Jain &lt;harsh@chelsio.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Check keylen before copying salt to avoid wrap around of Integer.

Signed-off-by: Harsh Jain &lt;harsh@chelsio.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>crypto: ccp - Fix double add when creating new DMA command</title>
<updated>2017-02-03T09:45:46+00:00</updated>
<author>
<name>Gary R Hook</name>
<email>gary.hook@amd.com</email>
</author>
<published>2017-01-27T23:09:04+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=e5da5c5667381d2772374ee6a2967b3576c9483d'/>
<id>e5da5c5667381d2772374ee6a2967b3576c9483d</id>
<content type='text'>
Eliminate a double-add by creating a new list to manage
command descriptors when created; move the descriptor to
the pending list when the command is submitted.

Cc: &lt;stable@vger.kernel.org&gt;
Signed-off-by: Gary R Hook &lt;gary.hook@amd.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Eliminate a double-add by creating a new list to manage
command descriptors when created; move the descriptor to
the pending list when the command is submitted.

Cc: &lt;stable@vger.kernel.org&gt;
Signed-off-by: Gary R Hook &lt;gary.hook@amd.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>crypto: ccp - Fix DMA operations when IOMMU is enabled</title>
<updated>2017-02-03T09:45:45+00:00</updated>
<author>
<name>Gary R Hook</name>
<email>gary.hook@amd.com</email>
</author>
<published>2017-01-27T21:28:45+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=500c0106e638e08c2c661c305ed57d6b67e10908'/>
<id>500c0106e638e08c2c661c305ed57d6b67e10908</id>
<content type='text'>
An I/O page fault occurs when the IOMMU is enabled on a
system that supports the v5 CCP.  DMA operations use a
Request ID value that does not match what is expected by
the IOMMU, resulting in the I/O page fault.  Setting the
Request ID value to 0 corrects this issue.

Cc: &lt;stable@vger.kernel.org&gt;
Signed-off-by: Gary R Hook &lt;gary.hook@amd.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
An I/O page fault occurs when the IOMMU is enabled on a
system that supports the v5 CCP.  DMA operations use a
Request ID value that does not match what is expected by
the IOMMU, resulting in the I/O page fault.  Setting the
Request ID value to 0 corrects this issue.

Cc: &lt;stable@vger.kernel.org&gt;
Signed-off-by: Gary R Hook &lt;gary.hook@amd.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>crypto: chcr - Check device is allocated before use</title>
<updated>2017-02-03T09:45:44+00:00</updated>
<author>
<name>Harsh Jain</name>
<email>harsh@chelsio.com</email>
</author>
<published>2017-01-24T05:04:33+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=f5f7bebc91ab378dea5aad5277c4d283e46472d9'/>
<id>f5f7bebc91ab378dea5aad5277c4d283e46472d9</id>
<content type='text'>
Ensure dev is allocated for crypto uld context before using the device
for crypto operations.

Cc: &lt;stable@vger.kernel.org&gt;
Signed-off-by: Atul Gupta &lt;atul.gupta@chelsio.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Ensure dev is allocated for crypto uld context before using the device
for crypto operations.

Cc: &lt;stable@vger.kernel.org&gt;
Signed-off-by: Atul Gupta &lt;atul.gupta@chelsio.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>crypto: chcr - Fix panic on dma_unmap_sg</title>
<updated>2017-02-03T09:45:44+00:00</updated>
<author>
<name>Harsh Jain</name>
<email>harsh@chelsio.com</email>
</author>
<published>2017-01-24T05:04:32+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=94e1dab1c94715e18bb0bada503de3f3d7593076'/>
<id>94e1dab1c94715e18bb0bada503de3f3d7593076</id>
<content type='text'>
Save DMA mapped sg list addresses to request context buffer.

Signed-off-by: Atul Gupta &lt;atul.gupta@chelsio.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Save DMA mapped sg list addresses to request context buffer.

Signed-off-by: Atul Gupta &lt;atul.gupta@chelsio.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>crypto: qat - zero esram only for DH85x devices</title>
<updated>2017-02-02T13:54:53+00:00</updated>
<author>
<name>Giovanni Cabiddu</name>
<email>giovanni.cabiddu@intel.com</email>
</author>
<published>2016-12-22T15:00:24+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=685ce0626840e2673fe64ea8807684f7324fec5f'/>
<id>685ce0626840e2673fe64ea8807684f7324fec5f</id>
<content type='text'>
Zero embedded ram in DH85x devices. This is not
needed for newer generations as it is done by HW.

Cc: &lt;stable@vger.kernel.org&gt;
Signed-off-by: Giovanni Cabiddu &lt;giovanni.cabiddu@intel.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Zero embedded ram in DH85x devices. This is not
needed for newer generations as it is done by HW.

Cc: &lt;stable@vger.kernel.org&gt;
Signed-off-by: Giovanni Cabiddu &lt;giovanni.cabiddu@intel.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>crypto: qat - fix bar discovery for c62x</title>
<updated>2017-02-02T13:54:52+00:00</updated>
<author>
<name>Giovanni Cabiddu</name>
<email>giovanni.cabiddu@intel.com</email>
</author>
<published>2016-12-22T15:00:12+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=3484ecbe0e9deb94afb0b9b6172d77e98eb72b94'/>
<id>3484ecbe0e9deb94afb0b9b6172d77e98eb72b94</id>
<content type='text'>
Some accelerators of the c62x series have only two bars.
This patch skips BAR0 if the accelerator does not have it.

Cc: &lt;stable@vger.kernel.org&gt;
Signed-off-by: Giovanni Cabiddu &lt;giovanni.cabiddu@intel.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Some accelerators of the c62x series have only two bars.
This patch skips BAR0 if the accelerator does not have it.

Cc: &lt;stable@vger.kernel.org&gt;
Signed-off-by: Giovanni Cabiddu &lt;giovanni.cabiddu@intel.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge branch 'linus' of git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6</title>
<updated>2016-12-28T01:51:36+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2016-12-28T01:51:36+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=2d706e790f0508dff4fb72eca9b4892b79757feb'/>
<id>2d706e790f0508dff4fb72eca9b4892b79757feb</id>
<content type='text'>
Pull crypto fix from Herbert Xu:
 "This fixes a hash corruption bug in the marvell driver"

* 'linus' of git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6:
  crypto: marvell - Copy IVDIG before launching partial DMA ahash requests
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Pull crypto fix from Herbert Xu:
 "This fixes a hash corruption bug in the marvell driver"

* 'linus' of git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6:
  crypto: marvell - Copy IVDIG before launching partial DMA ahash requests
</pre>
</div>
</content>
</entry>
<entry>
<title>crypto: marvell - Copy IVDIG before launching partial DMA ahash requests</title>
<updated>2016-12-16T11:59:39+00:00</updated>
<author>
<name>Romain Perier</name>
<email>romain.perier@free-electrons.com</email>
</author>
<published>2016-12-14T14:15:07+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=8759fec4af222f338d08f8f1a7ad6a77ca6cb301'/>
<id>8759fec4af222f338d08f8f1a7ad6a77ca6cb301</id>
<content type='text'>
Currently, inner IV/DIGEST data are only copied once into the hash
engines and not set explicitly before launching a request that is not a
first frag. This is an issue especially when multiple ahash reqs are
computed in parallel or chained with cipher request, as the state of the
request being computed is not updated into the hash engine. It leads to
non-deterministic corrupted digest results.

Fixes: commit 2786cee8e50b ("crypto: marvell - Move SRAM I/O operations to step functions")
Signed-off-by: Romain Perier &lt;romain.perier@free-electrons.com&gt;
Acked-by: Boris Brezillon &lt;boris.brezillon@free-electrons.com&gt;
Cc: &lt;stable@vger.kernel.org&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Currently, inner IV/DIGEST data are only copied once into the hash
engines and not set explicitly before launching a request that is not a
first frag. This is an issue especially when multiple ahash reqs are
computed in parallel or chained with cipher request, as the state of the
request being computed is not updated into the hash engine. It leads to
non-deterministic corrupted digest results.

Fixes: commit 2786cee8e50b ("crypto: marvell - Move SRAM I/O operations to step functions")
Signed-off-by: Romain Perier &lt;romain.perier@free-electrons.com&gt;
Acked-by: Boris Brezillon &lt;boris.brezillon@free-electrons.com&gt;
Cc: &lt;stable@vger.kernel.org&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</pre>
</div>
</content>
</entry>
</feed>
