linux-toradex.git/drivers/dma/altera-msgdma.c, branch v5.0

dmaengine: altera: Use IRQ-safe spinlock calls in the error paths as well

2017-10-20T06:21:10+00:00

The patch edf10919 [dmaengine: altera: fix spinlock usage] missed to
change 2 occurrences of spin_unlock_bh() to spin_unlock_irqrestore().
This patch fixes this by moving to the IRQ-safe call in the error
paths as well.

Fixes: edf10919 (dmaengine: altera: fix spinlock usage)
Signed-off-by: Stefan Roese 
Reviewed-by: Sylvain Lesne 
[add fixes tag and fix typo in log]
Signed-off-by: Vinod Koul

dmaengine: altera: fix spinlock usage

2017-09-28T07:41:46+00:00

Since this lock is acquired in both process and IRQ context, failing to
to disable IRQs when trying to acquire the lock in process context can
lead to deadlocks.

Signed-off-by: Sylvain Lesne 
Reviewed-by: Stefan Roese 
Signed-off-by: Vinod Koul

dmaengine: altera: fix response FIFO emptying

2017-09-28T07:41:46+00:00

Commit 6084fc2ec478 ("dmaengine: altera: Use macros instead of structs
to describe the registers") introduced a minus sign before a register
offset.

This leads to soft-locks of the DMA controller, since reading the last
status byte is required to pop the response from the FIFO. Failing to
do so will lead to a full FIFO, which means that the DMA controller
will stop processing descriptors.

Signed-off-by: Sylvain Lesne 
Reviewed-by: Stefan Roese 
Signed-off-by: Vinod Koul

dmaengine: altera: Use macros instead of structs to describe the registers

2017-08-29T02:47:43+00:00

This patch moves from a struct declaration for the DMA controller
registers to macros with offests to the base address. This is mainly
done to remove the sparse warnings, since the function parameter of
ioread32/iowrite32 is "void __iomem *" instead of a pointer to struct
members. With this patch applied, no sparse warning is seen anymore.

Please note that the struct for the descriptors is still kept in place,
as the code largely accesses the struct members as internal variables
before the complete struct is copied into the descriptor FIFO of the
DMA controller.

Additionally this patch also removes two warnings "variable xxx set but
not used" seen when compiling with "W=1". The registers need to be read
to flush the response FIFO, but nothing needs to be done with them. So
the code is correct here and the warning is a false one.

Signed-off-by: Stefan Roese 
Signed-off-by: Vinod Koul

dmaengine: altera: remove DMA_SG

2017-08-22T16:33:43+00:00

Commit c678fa66341c: ("dmaengine: remove DMA_SG as it is dead code in
kernel") removes DMA_SG from dmaengine subsystem but missed the newly added
driver, so remove it from here as well

Reported-by: Stephen Rothwell 
Signed-off-by: Vinod Koul

dmaengine: Add driver for Altera / Intel mSGDMA IP core

2017-07-18T16:34:54+00:00

This driver adds support for the Altera / Intel modular Scatter-Gather
Direct Memory Access (mSGDMA) intellectual property (IP) to the Linux
DMAengine subsystem. Currently it supports the following op modes:

- DMA_MEMCPY
- DMA_SG
- DMA_SLAVE

This implementation has been tested on an Altera Cyclone FPGA connected
via PCIe, both on an ARM and an x86 platform.

Signed-off-by: Stefan Roese 
Cc: Vinod Koul 
Signed-off-by: Vinod Koul