linux-toradex.git/drivers/dma/amba-pl08x.c, branch v3.2.10

dmaengine/amba-pl08x: Check txd->llis_va before freeing dma_pool

2011-09-19T09:43:16+00:00

In pl08x_free_txd(), check if pool is allocated successfully before freeing it.

Signed-off-by: Viresh Kumar 
Acked-by: Linus Walleij 
Signed-off-by: Vinod Koul

dmaengine/amba-pl08x: Add support for sg len greater than one for slave transfers

2011-09-19T09:43:06+00:00

Untill now, sg_len greater than one is not supported. This patch adds support to
do that.

Note: Still, if peripheral is flow controller, sg_len can't be greater that one.

Signed-off-by: Viresh Kumar 
Acked-by: Linus Walleij 
Signed-off-by: Vinod Koul

dmaengine: amba-pl08x: make filter check that the channel is owned by pl08x

2011-09-05T13:27:38+00:00

Before converting the dma channel to our private data structure, first
check that the channel is indeed one which our driver registered.  We
do this by ensuring that the underlying device is bound to our driver.

This avoids potential oopses if we try to reference 'plchan->name'
against a foreign drivers dma channel.

Signed-off-by: Russell King 
Signed-off-by: Vinod Koul

Merge branch 'next' into v3.1-rc4

2011-09-02T11:13:44+00:00

Fixed trivial conflicts  in  drivers/dma/amba-pl08x.c

Signed-off-by: Vinod Koul

dmaengine/amba-pl08x: Call pl08x_free_txd() instead of calling kfree() directly

2011-08-25T14:05:07+00:00

pl08x_prep_channel_resources() is calling kfree() directly for txd(). To
maintain consistency in code call pl08x_free_txd() instead.

Signed-off-by: Viresh Kumar 
Acked-by: Linus Walleij 
Signed-off-by: Vinod Koul

dmaengine/amba-pl08x: Pass flow controller information with slave channel data

2011-08-25T14:03:39+00:00

At least, on SPEAr platforms there is one peripheral, JPEG, which can be flow
controller for DMA transfer. Currently DMA controller driver didn't support
peripheral flow controller configurations.

This patch adds device_fc field in struct pl08x_channel_data, which will be used
only for slave transfers and is not used in case of mem2mem transfers.

Signed-off-by: Viresh Kumar 
Acked-by: Linus Walleij 
Signed-off-by: Vinod Koul

dmaengine/amba-pl08x: Choose peripheral bus as master bus

2011-08-25T14:03:39+00:00

When we have DMA transfers between peripheral and memory, then we shouldn't
reduce width of peripheral at all, as that may be a strict requirement. But we
can always reduce width of memory access, with some compromise in performance.
Thus, we must select peripheral as master and not memory.

Also this rearranges code to make it shorter.

Signed-off-by: Viresh Kumar 
Acked-by: Linus Walleij 
Signed-off-by: Vinod Koul

dmaengine/amba-pl08x: Align lli_len to max(src.width, dst.width)

2011-08-25T14:03:39+00:00

Currently lli_len is aligned to min of two widths, which looks to be incorrect.
Instead it should be aligned to max of both widths.

Lets say, total_size = 441 bytes

MIN: lets check if min() suits or not:

CASE 1: srcwidth = 1, dstwidth = 4
min(src, dst) = 1

i.e. We program transfer size in control reg to 441.
Now, till 440 bytes everything is fine, but on the last byte DMAC can't transfer
1 byte to dst, as its width is 4.

CASE 2: srcwidth = 4, dstwidth = 1
min(src, dst) = 1

i.e. we program transfer size in control reg to 110 (data transferred = 110 * srcwidth).
So, here too 1 byte is left, but on the source side.

MAX: Lets check if max() suits or not:

CASE 3: srcwidth = 1, dstwidth = 4
max(src, dst) = 4

Aligned size is 440

i.e. We program transfer size in control reg to 440.
Now, all 440 bytes will be transferred without any issues.

CASE 4: srcwidth = 4, dstwidth = 1
max(src, dst) = 4

Aligned size is 440

i.e. We program transfer size in control reg to 110 (data transferred = 110 * srcwidth).
Now, also all 440 bytes will be transferred without any issues.

Signed-off-by: Viresh Kumar 
Acked-by: Linus Walleij 
Signed-off-by: Vinod Koul

dmaengine/amba-pl08x: Add prep_single_byte_llis() routine

2011-08-25T14:03:39+00:00

Code for creating single byte llis is present at several places. Create a
routine to avoid code redundancy.

Also, we don't need one lli per single byte transfer, we can have single lli to
do all single byte transfer.

Signed-off-by: Viresh Kumar 
Acked-by: Linus Walleij 
Signed-off-by: Vinod Koul

dmaengine/amba-pl08x: max_bytes_per_lli is TRANSFER_SIZE * src_width (not MIN(width))

2011-08-25T14:03:39+00:00

max_bytes_per_lli = bd.srcbus.buswidth * PL080_CONTROL_TRANSFER_SIZE_MASK;
This is confirmed by ARM support guys.

Below is summary of mail exchange with them:

[Viresh] What is the total data to be transferred in case source and destination
bus widths are different. Suppose, source bus width is 2 bytes and destination
is 4 bytes. Now in order to transfer 80 bytes, what should be value of
TransferSize field in control reg: 40? or 20?.

[David from ARM] The value that is programmed into the TransferSize field should
be the number of  transfers needed to achieve the required data
transfer.

So, to transfer 80 bytes, with a Source Width of 2, the TransferSize field =
should be programmed with:

        Total transfer size
        ------------------- = 40
          

[Viresh] Will this change if source is 4 bytes and dest is 2?

[David] Yes - the calculation then becomes:

        Total transfer size
        ------------------- =20
          

Also, max_bytes_per_lli must be calculated after fixing src and dest widths not
before that. So move this code to the correct place.

This patch also removes max_bytes_per_lli from earlier print message, as till
that point max_bytes_per_lli is unknown.

Signed-off-by: Viresh Kumar 
Acked-by: Linus Walleij 
Signed-off-by: Vinod Koul