linux-toradex.git/drivers/dma/dw-edma, branch v6.6-rc1

dmaengine: dw-edma: Add HDMA DebugFS support

2023-05-24T06:50:45+00:00

Add HDMA DebugFS support to show registers content

Signed-off-by: Cai Huoqing 
Reviewed-by: Serge Semin 
Reviewed-by: Manivannan Sadhasivam 
Tested-by: Serge Semin 
Link: https://lore.kernel.org/r/20230520050854.73160-5-cai.huoqing@linux.dev
Signed-off-by: Vinod Koul

dmaengine: dw-edma: Add support for native HDMA

2023-05-24T06:50:45+00:00

Add support for HDMA NATIVE, as long the IP design has set
the compatible register map parameter-HDMA_NATIVE,
which allows compatibility for native HDMA register configuration.

The HDMA Hyper-DMA IP is an enhancement of the eDMA embedded-DMA IP.
And the native HDMA registers are different from eDMA, so this patch
add support for HDMA NATIVE mode.

HDMA write and read channels operate independently to maximize
the performance of the HDMA read and write data transfer over
the link When you configure the HDMA with multiple read channels,
then it uses a round robin (RR) arbitration scheme to select
the next read channel to be serviced.The same applies when you
have multiple write channels.

The native HDMA driver also supports a maximum of 16 independent
channels (8 write + 8 read), which can run simultaneously.
Both SAR (Source Address Register) and DAR (Destination Address Register)
are aligned to byte.

Signed-off-by: Cai Huoqing 
Reviewed-by: Serge Semin 
Reviewed-by: Manivannan Sadhasivam 
Tested-by: Serge Semin 
Link: https://lore.kernel.org/r/20230520050854.73160-4-cai.huoqing@linux.dev
Signed-off-by: Vinod Koul

dmaengine: dw-edma: Create a new dw_edma_core_ops structure to abstract controller operation

2023-05-24T06:50:45+00:00

The structure dw_edma_core_ops has a set of the pointers
abstracting out the DW eDMA vX and DW HDMA Native controllers.
And use dw_edma_v0_core_register to set up operation.

Signed-off-by: Cai Huoqing 
Reviewed-by: Serge Semin 
Reviewed-by: Manivannan Sadhasivam 
Tested-by: Serge Semin 
Link: https://lore.kernel.org/r/20230520050854.73160-3-cai.huoqing@linux.dev
Signed-off-by: Vinod Koul

dmaengine: dw-edma: Rename dw_edma_core_ops structure to dw_edma_plat_ops

2023-05-24T06:50:45+00:00

The dw_edma_core_ops structure contains a set of the operations:
device IRQ numbers getter, CPU/PCI address translation. Based on the
functions semantics the structure name "dw_edma_plat_ops" looks more
descriptive since indeed the operations are platform-specific. The
"dw_edma_core_ops" name shall be used for a structure with the IP-core
specific set of callbacks in order to abstract out DW eDMA and DW HDMA
setups. Such structure will be added in one of the next commit in the
framework of the set of changes adding the DW HDMA device support.

Anyway the renaming was necessary to distinguish two types of
the implementation callbacks:
1. DW eDMA/hDMA IP-core specific operations: device-specific CSR
setups in one or another aspect of the DMA-engine initialization.
2. DW eDMA/hDMA platform specific operations: the DMA device
environment configs like IRQs, address translation, etc.

Signed-off-by: Cai Huoqing 
Reviewed-by: Serge Semin 
Reviewed-by: Manivannan Sadhasivam 
Tested-by: Serge Semin 
Link: https://lore.kernel.org/r/20230520050854.73160-2-cai.huoqing@linux.dev
Signed-off-by: Vinod Koul

dmaengine: dw-edma: Fix to enable to issue dma request on DMA processing

2023-04-12T17:14:49+00:00

The issue_pending request is ignored while driver is processing a DMA
request. Fix to issue the pending requests on any dma channel status.

Fixes: e63d79d1ffcd ("dmaengine: Add Synopsys eDMA IP core driver")
Signed-off-by: Shunsuke Mie 
Link: https://lore.kernel.org/r/20230411101758.438472-2-mie@igel.co.jp
Signed-off-by: Vinod Koul

dmaengine: dw-edma: Fix to change for continuous transfer

2023-04-12T17:14:49+00:00

The dw-edma driver stops after processing a DMA request even if a request
remains in the issued queue, which is not the expected behavior. The DMA
engine API requires continuous processing.

Add a trigger to start after one processing finished if there are requests
remain.

Fixes: e63d79d1ffcd ("dmaengine: Add Synopsys eDMA IP core driver")
Signed-off-by: Shunsuke Mie 
Link: https://lore.kernel.org/r/20230411101758.438472-1-mie@igel.co.jp
Signed-off-by: Vinod Koul

dmaengine: dw-edma: remove unused readq_ch and writeq_ch functions

2023-03-31T12:27:49+00:00

clang with W=1 reports
drivers/dma/dw-edma/dw-edma-v0-core.c:162:20: error:
  unused function 'writeq_ch' [-Werror,-Wunused-function]
static inline void writeq_ch(struct dw_edma *dw, enum dw_edma_dir dir, u16 ch,
                   ^
drivers/dma/dw-edma/dw-edma-v0-core.c:185:19: error:
  unused function 'readq_ch' [-Werror,-Wunused-function]
static inline u64 readq_ch(struct dw_edma *dw, enum dw_edma_dir dir, u16 ch,
                  ^
These functions and their wrapping macros are not used, so remove them.

Signed-off-by: Tom Rix 
Link: https://lore.kernel.org/r/20230320234906.1730308-1-trix@redhat.com
Signed-off-by: Vinod Koul

dmaengine: dw-edma: Depend on DW_EDMA instead of selecting it

2023-02-22T19:46:04+00:00

Kconfig "select" is discouraged for visible symbols like DW_EDMA because it
makes it possible to set DW_EDMA even if DW_EDMA depends on things that are
not set (see Documentation/kbuild/kconfig-language.txt).

Convert DW_EDMA_PCIE so it depends on DW_EDMA instead of selecting it.

There will likely be several future drivers that depend on DW_EDMA, so this
uses "if DW_EDMA" to enclose them all rather than repeating "depends on
DW_EDMA" for each.

[bhelgaas: split to separate patch, commit log]
Link: https://lore.kernel.org/r/20230113171409.30470-25-Sergey.Semin@baikalelectronics.ru
Signed-off-by: Serge Semin 
Signed-off-by: Lorenzo Pieralisi 
Signed-off-by: Bjorn Helgaas 
Acked-by: Vinod Koul

dmaengine: dw-edma: Add mem-mapped LL-entries support

2023-02-22T19:45:53+00:00

Currently the DW eDMA driver only supports the linked lists memory
allocated locally with respect to the remote eDMA engine setup. It means
the linked lists will be accessible by the CPU via the MMIO space only. If
eDMA is embedded into the DW PCIe Root Ports or local Endpoints (which
support will be added in subsequent commits) the linked lists are supposed
to be allocated in the CPU memory. In that case the LL-entries can be
directly accessed, while the former case implies using the MMIO accessors
for that.

In order to have both cases supported by the driver, the dw_edma_region
descriptor should be fixed to contain the MMIO-backed and just memory-based
virtual addresses. The linked lists initialization procedure will use one
of them depending on the eDMA device nature. If the eDMA engine is embedded
into the local DW PCIe Root Port/Endpoint controllers, the list entries
will be directly accessed by referencing the corresponding structure
fields.  Otherwise the MMIO accessors usage will be preserved.

Link: https://lore.kernel.org/r/20230113171409.30470-24-Sergey.Semin@baikalelectronics.ru
Signed-off-by: Serge Semin 
Signed-off-by: Lorenzo Pieralisi 
Signed-off-by: Bjorn Helgaas 
Acked-by: Vinod Koul

dmaengine: dw-edma: Skip cleanup procedure if no private data found

2023-02-10T23:15:23+00:00

DW eDMA driver private data is preserved in the passed DW eDMA chip info
structure. If the probe fails or for some reason the passed info object
doesn't have the private data pointer initialized, halt the DMA device
cleanup procedure to prevent system crashes.

Link: https://lore.kernel.org/r/20230113171409.30470-23-Sergey.Semin@baikalelectronics.ru
Tested-by: Manivannan Sadhasivam 
Signed-off-by: Serge Semin 
Signed-off-by: Lorenzo Pieralisi 
Signed-off-by: Bjorn Helgaas 
Reviewed-by: Manivannan Sadhasivam 
Acked-by: Vinod Koul