<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-toradex.git/drivers/dma/ioat, branch v3.4.45</title>
<subtitle>Linux kernel for Apalis and Colibri modules</subtitle>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/'/>
<entry>
<title>ioat: Fix DMA memory sync direction correct flag</title>
<updated>2013-01-28T04:47:44+00:00</updated>
<author>
<name>Shuah Khan</name>
<email>shuah.khan@hp.com</email>
</author>
<published>2012-10-25T16:22:32+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=8f3933a1e549a54b4c1b743b40cfd196c8bf0035'/>
<id>8f3933a1e549a54b4c1b743b40cfd196c8bf0035</id>
<content type='text'>
commit ac4989874af56435c308bdde9ad9c837a26f8b23 upstream.

ioat does DMA memory sync with DMA_TO_DEVICE direction on a buffer allocated
for DMA_FROM_DEVICE dma, resulting in the following warning from dma debug.
Fixed the dma_sync_single_for_device() call to use the correct direction.

[  226.288947] WARNING: at lib/dma-debug.c:990 check_sync+0x132/0x550()
[  226.288948] Hardware name: ProLiant DL380p Gen8
[  226.288951] ioatdma 0000:00:04.0: DMA-API: device driver syncs DMA memory with different direction [device address=0x00000000ffff7000] [size=4096 bytes] [mapped with DMA_FROM_DEVICE] [synced with DMA_TO_DEVICE]
[  226.288953] Modules linked in: iTCO_wdt(+) sb_edac(+) ioatdma(+) microcode serio_raw pcspkr edac_core hpwdt(+) iTCO_vendor_support hpilo(+) dca acpi_power_meter ata_generic pata_acpi sd_mod crc_t10dif ata_piix libata hpsa tg3 netxen_nic(+) sunrpc dm_mirror dm_region_hash dm_log dm_mod
[  226.288967] Pid: 1055, comm: work_for_cpu Tainted: G        W    3.3.0-0.20.el7.x86_64 #1
[  226.288968] Call Trace:
[  226.288974]  [&lt;ffffffff810644cf&gt;] warn_slowpath_common+0x7f/0xc0
[  226.288977]  [&lt;ffffffff810645c6&gt;] warn_slowpath_fmt+0x46/0x50
[  226.288980]  [&lt;ffffffff81345502&gt;] check_sync+0x132/0x550
[  226.288983]  [&lt;ffffffff81345c9f&gt;] debug_dma_sync_single_for_device+0x3f/0x50
[  226.288988]  [&lt;ffffffff81661002&gt;] ? wait_for_common+0x72/0x180
[  226.288995]  [&lt;ffffffffa019590f&gt;] ioat_xor_val_self_test+0x3e5/0x832 [ioatdma]
[  226.288999]  [&lt;ffffffff811a5739&gt;] ? kfree+0x259/0x270
[  226.289004]  [&lt;ffffffffa0195d77&gt;] ioat3_dma_self_test+0x1b/0x20 [ioatdma]
[  226.289008]  [&lt;ffffffffa01952c3&gt;] ioat_probe+0x2f8/0x348 [ioatdma]
[  226.289011]  [&lt;ffffffffa0195f51&gt;] ioat3_dma_probe+0x1d5/0x2aa [ioatdma]
[  226.289016]  [&lt;ffffffffa0194d12&gt;] ioat_pci_probe+0x139/0x17c [ioatdma]
[  226.289020]  [&lt;ffffffff81354b8c&gt;] local_pci_probe+0x5c/0xd0
[  226.289023]  [&lt;ffffffff81083e50&gt;] ? destroy_work_on_stack+0x20/0x20
[  226.289025]  [&lt;ffffffff81083e68&gt;] do_work_for_cpu+0x18/0x30
[  226.289029]  [&lt;ffffffff8108d997&gt;] kthread+0xb7/0xc0
[  226.289033]  [&lt;ffffffff8166cef4&gt;] kernel_thread_helper+0x4/0x10
[  226.289036]  [&lt;ffffffff81662d20&gt;] ? _raw_spin_unlock_irq+0x30/0x50
[  226.289038]  [&lt;ffffffff81663234&gt;] ? retint_restore_args+0x13/0x13
[  226.289041]  [&lt;ffffffff8108d8e0&gt;] ? kthread_worker_fn+0x1a0/0x1a0
[  226.289044]  [&lt;ffffffff8166cef0&gt;] ? gs_change+0x13/0x13
[  226.289045] ---[ end trace e1618afc7a606089 ]---
[  226.289047] Mapped at:
[  226.289048]  [&lt;ffffffff81345307&gt;] debug_dma_map_page+0x87/0x150
[  226.289050]  [&lt;ffffffffa019653c&gt;] dma_map_page.constprop.18+0x70/0xb34 [ioatdma]
[  226.289054]  [&lt;ffffffffa0195702&gt;] ioat_xor_val_self_test+0x1d8/0x832 [ioatdma]
[  226.289058]  [&lt;ffffffffa0195d77&gt;] ioat3_dma_self_test+0x1b/0x20 [ioatdma]
[  226.289061]  [&lt;ffffffffa01952c3&gt;] ioat_probe+0x2f8/0x348 [ioatdma]

Signed-off-by: Shuah Khan &lt;shuah.khan@hp.com&gt;
Signed-off-by: Vinod Koul &lt;vinod.koul@linux.intel.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;

</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
commit ac4989874af56435c308bdde9ad9c837a26f8b23 upstream.

ioat does DMA memory sync with DMA_TO_DEVICE direction on a buffer allocated
for DMA_FROM_DEVICE dma, resulting in the following warning from dma debug.
Fixed the dma_sync_single_for_device() call to use the correct direction.

[  226.288947] WARNING: at lib/dma-debug.c:990 check_sync+0x132/0x550()
[  226.288948] Hardware name: ProLiant DL380p Gen8
[  226.288951] ioatdma 0000:00:04.0: DMA-API: device driver syncs DMA memory with different direction [device address=0x00000000ffff7000] [size=4096 bytes] [mapped with DMA_FROM_DEVICE] [synced with DMA_TO_DEVICE]
[  226.288953] Modules linked in: iTCO_wdt(+) sb_edac(+) ioatdma(+) microcode serio_raw pcspkr edac_core hpwdt(+) iTCO_vendor_support hpilo(+) dca acpi_power_meter ata_generic pata_acpi sd_mod crc_t10dif ata_piix libata hpsa tg3 netxen_nic(+) sunrpc dm_mirror dm_region_hash dm_log dm_mod
[  226.288967] Pid: 1055, comm: work_for_cpu Tainted: G        W    3.3.0-0.20.el7.x86_64 #1
[  226.288968] Call Trace:
[  226.288974]  [&lt;ffffffff810644cf&gt;] warn_slowpath_common+0x7f/0xc0
[  226.288977]  [&lt;ffffffff810645c6&gt;] warn_slowpath_fmt+0x46/0x50
[  226.288980]  [&lt;ffffffff81345502&gt;] check_sync+0x132/0x550
[  226.288983]  [&lt;ffffffff81345c9f&gt;] debug_dma_sync_single_for_device+0x3f/0x50
[  226.288988]  [&lt;ffffffff81661002&gt;] ? wait_for_common+0x72/0x180
[  226.288995]  [&lt;ffffffffa019590f&gt;] ioat_xor_val_self_test+0x3e5/0x832 [ioatdma]
[  226.288999]  [&lt;ffffffff811a5739&gt;] ? kfree+0x259/0x270
[  226.289004]  [&lt;ffffffffa0195d77&gt;] ioat3_dma_self_test+0x1b/0x20 [ioatdma]
[  226.289008]  [&lt;ffffffffa01952c3&gt;] ioat_probe+0x2f8/0x348 [ioatdma]
[  226.289011]  [&lt;ffffffffa0195f51&gt;] ioat3_dma_probe+0x1d5/0x2aa [ioatdma]
[  226.289016]  [&lt;ffffffffa0194d12&gt;] ioat_pci_probe+0x139/0x17c [ioatdma]
[  226.289020]  [&lt;ffffffff81354b8c&gt;] local_pci_probe+0x5c/0xd0
[  226.289023]  [&lt;ffffffff81083e50&gt;] ? destroy_work_on_stack+0x20/0x20
[  226.289025]  [&lt;ffffffff81083e68&gt;] do_work_for_cpu+0x18/0x30
[  226.289029]  [&lt;ffffffff8108d997&gt;] kthread+0xb7/0xc0
[  226.289033]  [&lt;ffffffff8166cef4&gt;] kernel_thread_helper+0x4/0x10
[  226.289036]  [&lt;ffffffff81662d20&gt;] ? _raw_spin_unlock_irq+0x30/0x50
[  226.289038]  [&lt;ffffffff81663234&gt;] ? retint_restore_args+0x13/0x13
[  226.289041]  [&lt;ffffffff8108d8e0&gt;] ? kthread_worker_fn+0x1a0/0x1a0
[  226.289044]  [&lt;ffffffff8166cef0&gt;] ? gs_change+0x13/0x13
[  226.289045] ---[ end trace e1618afc7a606089 ]---
[  226.289047] Mapped at:
[  226.289048]  [&lt;ffffffff81345307&gt;] debug_dma_map_page+0x87/0x150
[  226.289050]  [&lt;ffffffffa019653c&gt;] dma_map_page.constprop.18+0x70/0xb34 [ioatdma]
[  226.289054]  [&lt;ffffffffa0195702&gt;] ioat_xor_val_self_test+0x1d8/0x832 [ioatdma]
[  226.289058]  [&lt;ffffffffa0195d77&gt;] ioat3_dma_self_test+0x1b/0x20 [ioatdma]
[  226.289061]  [&lt;ffffffffa01952c3&gt;] ioat_probe+0x2f8/0x348 [ioatdma]

Signed-off-by: Shuah Khan &lt;shuah.khan@hp.com&gt;
Signed-off-by: Vinod Koul &lt;vinod.koul@linux.intel.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;

</pre>
</div>
</content>
</entry>
<entry>
<title>Merge tag 'dmaengine-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/djbw/dmaengine</title>
<updated>2012-04-10T22:30:16+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2012-04-10T22:30:16+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=94fb175c0414902ad9dbd956addf3a5feafbc85b'/>
<id>94fb175c0414902ad9dbd956addf3a5feafbc85b</id>
<content type='text'>
Pull dmaengine fixes from Dan Williams:

1/ regression fix for Xen as it now trips over a broken assumption
   about the dma address size on 32-bit builds

2/ new quirk for netdma to ignore dma channels that cannot meet
   netdma alignment requirements

3/ fixes for two long standing issues in ioatdma (ring size overflow)
   and iop-adma (potential stack corruption)

* tag 'dmaengine-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/djbw/dmaengine:
  netdma: adding alignment check for NETDMA ops
  ioatdma: DMA copy alignment needed to address IOAT DMA silicon errata
  ioat: ring size variables need to be 32bit to avoid overflow
  iop-adma: Corrected array overflow in RAID6 Xscale(R) test.
  ioat: fix size of 'completion' for Xen
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Pull dmaengine fixes from Dan Williams:

1/ regression fix for Xen as it now trips over a broken assumption
   about the dma address size on 32-bit builds

2/ new quirk for netdma to ignore dma channels that cannot meet
   netdma alignment requirements

3/ fixes for two long standing issues in ioatdma (ring size overflow)
   and iop-adma (potential stack corruption)

* tag 'dmaengine-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/djbw/dmaengine:
  netdma: adding alignment check for NETDMA ops
  ioatdma: DMA copy alignment needed to address IOAT DMA silicon errata
  ioat: ring size variables need to be 32bit to avoid overflow
  iop-adma: Corrected array overflow in RAID6 Xscale(R) test.
  ioat: fix size of 'completion' for Xen
</pre>
</div>
</content>
</entry>
<entry>
<title>ioatdma: DMA copy alignment needed to address IOAT DMA silicon errata</title>
<updated>2012-04-05T22:24:35+00:00</updated>
<author>
<name>Dave Jiang</name>
<email>dave.jiang@intel.com</email>
</author>
<published>2012-04-04T23:10:41+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=f26df1a1a9452573af7b6cea9a4723593e838568'/>
<id>f26df1a1a9452573af7b6cea9a4723593e838568</id>
<content type='text'>
Silicon errata where when RAID and legacy descriptors are mixed, the legacy
(memcpy and friends) operation must have alignment of 64 bytes to avoid
hanging. This effects Intel Xeon C55xx, C35xx, E5-2600.

Signed-off-by: Dave Jiang &lt;dave.jiang@intel.com&gt;
Signed-off-by: Dan Williams &lt;dan.j.williams@intel.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Silicon errata where when RAID and legacy descriptors are mixed, the legacy
(memcpy and friends) operation must have alignment of 64 bytes to avoid
hanging. This effects Intel Xeon C55xx, C35xx, E5-2600.

Signed-off-by: Dave Jiang &lt;dave.jiang@intel.com&gt;
Signed-off-by: Dan Williams &lt;dan.j.williams@intel.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ioat: ring size variables need to be 32bit to avoid overflow</title>
<updated>2012-04-05T22:22:58+00:00</updated>
<author>
<name>Dave Jiang</name>
<email>dave.jiang@intel.com</email>
</author>
<published>2012-04-04T23:10:35+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=21b764e075e74f8af90da9f623aa3e2167484687'/>
<id>21b764e075e74f8af90da9f623aa3e2167484687</id>
<content type='text'>
The alloc order can be up to 16 and 1 &lt;&lt; 16 will over flow the 16bit
integer. Change the appropriate variables to 16bit to avoid overflow.

Reported-by: Jim Harris &lt;james.r.harris@intel.com&gt;
Signed-off-by: Dave Jiang &lt;dave.jiang@intel.com&gt;
Signed-off-by: Dan Williams &lt;dan.j.williams@intel.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The alloc order can be up to 16 and 1 &lt;&lt; 16 will over flow the 16bit
integer. Change the appropriate variables to 16bit to avoid overflow.

Reported-by: Jim Harris &lt;james.r.harris@intel.com&gt;
Signed-off-by: Dave Jiang &lt;dave.jiang@intel.com&gt;
Signed-off-by: Dan Williams &lt;dan.j.williams@intel.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ioat: fix size of 'completion' for Xen</title>
<updated>2012-03-23T20:36:42+00:00</updated>
<author>
<name>Dan Williams</name>
<email>dan.j.williams@intel.com</email>
</author>
<published>2012-03-23T20:36:42+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=275029353953c2117941ade84f02a2303912fad1'/>
<id>275029353953c2117941ade84f02a2303912fad1</id>
<content type='text'>
Starting with v3.2 Jonathan reports that Xen crashes loading the ioatdma
driver.  A debug run shows:

  ioatdma 0000:00:16.4: desc[0]: (0x300cc7000-&gt;0x300cc7040) cookie: 0 flags: 0x2 ctl: 0x29 (op: 0 int_en: 1 compl: 1)
  ...
  ioatdma 0000:00:16.4: ioat_get_current_completion: phys_complete: 0xcc7000

...which shows that in this environment GFP_KERNEL memory may be backed
by a 64-bit dma address.  This breaks the driver's assumption that an
unsigned long should be able to contain the physical address for
descriptor memory.  Switch to dma_addr_t which beyond being the right
size, is the true type for the data i.e. an io-virtual address
inidicating the engine's last processed descriptor.

[stable: 3.2+]
Cc: &lt;stable@vger.kernel.org&gt;
Reported-by: Jonathan Nieder &lt;jrnieder@gmail.com&gt;
Reported-by: William Dauchy &lt;wdauchy@gmail.com&gt;
Tested-by: William Dauchy &lt;wdauchy@gmail.com&gt;
Tested-by: Dave Jiang &lt;dave.jiang@intel.com&gt;
Signed-off-by: Dan Williams &lt;dan.j.williams@intel.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Starting with v3.2 Jonathan reports that Xen crashes loading the ioatdma
driver.  A debug run shows:

  ioatdma 0000:00:16.4: desc[0]: (0x300cc7000-&gt;0x300cc7040) cookie: 0 flags: 0x2 ctl: 0x29 (op: 0 int_en: 1 compl: 1)
  ...
  ioatdma 0000:00:16.4: ioat_get_current_completion: phys_complete: 0xcc7000

...which shows that in this environment GFP_KERNEL memory may be backed
by a 64-bit dma address.  This breaks the driver's assumption that an
unsigned long should be able to contain the physical address for
descriptor memory.  Switch to dma_addr_t which beyond being the right
size, is the true type for the data i.e. an io-virtual address
inidicating the engine's last processed descriptor.

[stable: 3.2+]
Cc: &lt;stable@vger.kernel.org&gt;
Reported-by: Jonathan Nieder &lt;jrnieder@gmail.com&gt;
Reported-by: William Dauchy &lt;wdauchy@gmail.com&gt;
Tested-by: William Dauchy &lt;wdauchy@gmail.com&gt;
Tested-by: Dave Jiang &lt;dave.jiang@intel.com&gt;
Signed-off-by: Dan Williams &lt;dan.j.williams@intel.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>dmaengine: fix for cookie changes and merge</title>
<updated>2012-03-13T06:28:12+00:00</updated>
<author>
<name>Vinod Koul</name>
<email>vinod.koul@linux.intel.com</email>
</author>
<published>2012-03-13T06:28:12+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=949ff5b8d46b5e3435d21b2651ce3a2599208d44'/>
<id>949ff5b8d46b5e3435d21b2651ce3a2599208d44</id>
<content type='text'>
Fixed trivial issues in drivers:
	drivers/dma/imx-sdma.c
	drivers/dma/intel_mid_dma.c
	drivers/dma/ioat/dma_v3.c
	drivers/dma/iop-adma.c
	drivers/dma/sirf-dma.c
	drivers/dma/timb_dma.c

Signed-off-by: Vinod Koul &lt;vinod.koul@linux.intel.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Fixed trivial issues in drivers:
	drivers/dma/imx-sdma.c
	drivers/dma/intel_mid_dma.c
	drivers/dma/ioat/dma_v3.c
	drivers/dma/iop-adma.c
	drivers/dma/sirf-dma.c
	drivers/dma/timb_dma.c

Signed-off-by: Vinod Koul &lt;vinod.koul@linux.intel.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>dmaengine: ensure all DMA engine drivers initialize their cookies</title>
<updated>2012-03-13T06:07:42+00:00</updated>
<author>
<name>Russell King - ARM Linux</name>
<email>linux@arm.linux.org.uk</email>
</author>
<published>2012-03-06T22:36:27+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=8ac695463f37af902e953d575d3f782e32e170da'/>
<id>8ac695463f37af902e953d575d3f782e32e170da</id>
<content type='text'>
Ensure all DMA engine drivers initialize their cookies in the same way,
so that they all behave in a similar fashion.  This means their first
issued cookie will be 2 rather than 1, and will increment to INT_MAX
before returning 1 and starting over.

In connection with this, Dan Williams said:
&gt; Russell King wrote:
&gt; &gt; Secondly, some DMA engine drivers initialize the dma_chan cookie to 0,
&gt; &gt; others to 1.  Is there a reason for this, or are these all buggy?
&gt;
&gt; I know that ioat and iop-adma expect 0 to mean "I have cleaned up this
&gt; descriptor and it is idle", and would break if zero was an in-flight
&gt; cookie value.  The reserved usage of zero is an driver internal
&gt; concern, but I have no problem formalizing it as a reserved value.

Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
Tested-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
Reviewed-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
Acked-by: Jassi Brar &lt;jassisinghbrar@gmail.com&gt;
[imx-sdma.c &amp; mxs-dma.c]
Tested-by: Shawn Guo &lt;shawn.guo@linaro.org&gt;
Signed-off-by: Vinod Koul &lt;vinod.koul@linux.intel.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Ensure all DMA engine drivers initialize their cookies in the same way,
so that they all behave in a similar fashion.  This means their first
issued cookie will be 2 rather than 1, and will increment to INT_MAX
before returning 1 and starting over.

In connection with this, Dan Williams said:
&gt; Russell King wrote:
&gt; &gt; Secondly, some DMA engine drivers initialize the dma_chan cookie to 0,
&gt; &gt; others to 1.  Is there a reason for this, or are these all buggy?
&gt;
&gt; I know that ioat and iop-adma expect 0 to mean "I have cleaned up this
&gt; descriptor and it is idle", and would break if zero was an in-flight
&gt; cookie value.  The reserved usage of zero is an driver internal
&gt; concern, but I have no problem formalizing it as a reserved value.

Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
Tested-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
Reviewed-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
Acked-by: Jassi Brar &lt;jassisinghbrar@gmail.com&gt;
[imx-sdma.c &amp; mxs-dma.c]
Tested-by: Shawn Guo &lt;shawn.guo@linaro.org&gt;
Signed-off-by: Vinod Koul &lt;vinod.koul@linux.intel.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>dmaengine: consolidate tx_status functions</title>
<updated>2012-03-13T06:07:14+00:00</updated>
<author>
<name>Russell King - ARM Linux</name>
<email>linux@arm.linux.org.uk</email>
</author>
<published>2012-03-06T22:35:27+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=96a2af41c78b1fbb1f567a3486bdc63f7b31c5fd'/>
<id>96a2af41c78b1fbb1f567a3486bdc63f7b31c5fd</id>
<content type='text'>
Now that we have the completed cookie in the dma_chan structure, we
can consolidate the tx_status functions by providing a function to set
the txstate structure and returning the DMA status.  We also provide
a separate helper to set the residue for cookies which are still in
progress.

Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
Tested-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
Reviewed-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
Acked-by: Jassi Brar &lt;jassisinghbrar@gmail.com&gt;
[imx-sdma.c &amp; mxs-dma.c]
Tested-by: Shawn Guo &lt;shawn.guo@linaro.org&gt;
Signed-off-by: Vinod Koul &lt;vinod.koul@linux.intel.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Now that we have the completed cookie in the dma_chan structure, we
can consolidate the tx_status functions by providing a function to set
the txstate structure and returning the DMA status.  We also provide
a separate helper to set the residue for cookies which are still in
progress.

Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
Tested-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
Reviewed-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
Acked-by: Jassi Brar &lt;jassisinghbrar@gmail.com&gt;
[imx-sdma.c &amp; mxs-dma.c]
Tested-by: Shawn Guo &lt;shawn.guo@linaro.org&gt;
Signed-off-by: Vinod Koul &lt;vinod.koul@linux.intel.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>dmaengine: provide a common function for completing a dma descriptor</title>
<updated>2012-03-13T06:07:01+00:00</updated>
<author>
<name>Russell King - ARM Linux</name>
<email>linux@arm.linux.org.uk</email>
</author>
<published>2012-03-06T22:35:07+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=f7fbce07c6ce26a25b4e0cb5f241c361fde87901'/>
<id>f7fbce07c6ce26a25b4e0cb5f241c361fde87901</id>
<content type='text'>
Provide a common function to do the cookie mechanics for completing
a DMA descriptor.

Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
Tested-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
Reviewed-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
Acked-by: Jassi Brar &lt;jassisinghbrar@gmail.com&gt;
[imx-sdma.c &amp; mxs-dma.c]
Tested-by: Shawn Guo &lt;shawn.guo@linaro.org&gt;
Signed-off-by: Vinod Koul &lt;vinod.koul@linux.intel.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Provide a common function to do the cookie mechanics for completing
a DMA descriptor.

Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
Tested-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
Reviewed-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
Acked-by: Jassi Brar &lt;jassisinghbrar@gmail.com&gt;
[imx-sdma.c &amp; mxs-dma.c]
Tested-by: Shawn Guo &lt;shawn.guo@linaro.org&gt;
Signed-off-by: Vinod Koul &lt;vinod.koul@linux.intel.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>dmaengine: consolidate assignment of DMA cookies</title>
<updated>2012-03-13T06:06:52+00:00</updated>
<author>
<name>Russell King - ARM Linux</name>
<email>linux@arm.linux.org.uk</email>
</author>
<published>2012-03-06T22:34:46+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=884485e1f12dcd39390f042e772cdbefc9ebb750'/>
<id>884485e1f12dcd39390f042e772cdbefc9ebb750</id>
<content type='text'>
Everyone deals with assigning DMA cookies in the same way (it's part of
the API so they should be), so lets consolidate the common code into a
helper function to avoid this duplication.

Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
Tested-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
Reviewed-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
Acked-by: Jassi Brar &lt;jassisinghbrar@gmail.com&gt;
[imx-sdma.c &amp; mxs-dma.c]
Tested-by: Shawn Guo &lt;shawn.guo@linaro.org&gt;
Signed-off-by: Vinod Koul &lt;vinod.koul@linux.intel.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Everyone deals with assigning DMA cookies in the same way (it's part of
the API so they should be), so lets consolidate the common code into a
helper function to avoid this duplication.

Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
Tested-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
Reviewed-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
Acked-by: Jassi Brar &lt;jassisinghbrar@gmail.com&gt;
[imx-sdma.c &amp; mxs-dma.c]
Tested-by: Shawn Guo &lt;shawn.guo@linaro.org&gt;
Signed-off-by: Vinod Koul &lt;vinod.koul@linux.intel.com&gt;
</pre>
</div>
</content>
</entry>
</feed>
