linux-toradex.git/drivers/dma/shdma.h, branch v3.4.55

dmaengine: move last completed cookie into generic dma_chan structure

2012-03-13T06:06:06+00:00

Every DMA engine implementation declares a last completed dma cookie
in their private dma channel structures.  This is pointless, and
forces driver specific code.  Move this out into the common dma_chan
structure.

Signed-off-by: Russell King 
Tested-by: Linus Walleij 
Reviewed-by: Linus Walleij 
Acked-by: Jassi Brar 
[imx-sdma.c & mxs-dma.c]
Tested-by: Shawn Guo 
Signed-off-by: Vinod Koul

dma: shdma: transfer based runtime PM

2011-09-28T04:37:40+00:00

Currently the shdma dmaengine driver uses runtime PM to save power, when
no channel on the specific controller is requested by a user. This patch
switches the driver to count individual DMA transfers. That way the
controller can be powered down between transfers, even if some of its
channels are in use.

Signed-off-by: Guennadi Liakhovetski 
Signed-off-by: Vinod Koul

dmaengine: shdma: add chcr_ie_bit

2011-06-21T08:56:01+00:00

IE bit position on CHCR register is not same in all DMAC.
This patch adds new "chcr_ie_bit" to decide it.

Signed-off-by: Kuninori Morimoto 
Signed-off-by: Paul Mundt

dmaengine: shdma: add chcr_write/read function

2011-06-21T08:55:57+00:00

CHCR register position is not same in all DMAC.
This patch adds new "chcr_offset" to decide it.

Signed-off-by: Kuninori Morimoto 
Signed-off-by: Paul Mundt

dmaengine: shdma: add to_sh_dev define

2011-06-16T06:03:36+00:00

This patch adds "to_sh_dev" macro, and clean up codes.

Signed-off-by: Kuninori Morimoto 
Signed-off-by: Paul Mundt

dmaengine: shdma: Update SH_DMAC_MAX_CHANNELS to 20

2011-05-25T02:36:17+00:00

Update SH_DMAC_MAX_CHANNELS to support the 20 DMA
channels included in the sh73a0 SY-DMAC hardware.

Signed-off-by: Magnus Damm 
Signed-off-by: Paul Mundt

dmaengine: shdma: add runtime- and system-level power management

2011-05-23T03:44:33+00:00

This patch extends and fixes runtime power management in the shdma
driver to support powering down the DMA controller and adds support
for system-level suspend and resume.

Signed-off-by: Guennadi Liakhovetski 
Signed-off-by: Paul Mundt

dma: shdma: NMI support.

2010-12-17T10:16:10+00:00

Presently DMA transfers are interrupted and aborted by the NMI. This
implements some basic logic for more gracefully handling and clearing
each controller's NMIF flag via the NMI die chain, needed to resume
transfers post-NMI.

Reported-by: Michael Szafranek 
Signed-off-by: Paul Mundt

dmaengine: shdma: Introduce include/linux/sh_dma.h

2010-03-23T08:20:06+00:00

Create a common platform data header file for the
shdma dmaengine driver. This is done by moving
common structures from sh asm/dmaengine.h to
linux/sh_dma.h. DMA registers are also copied from
sh asm/dma-register.h to make the code architecture
independent.

The sh header file asm/dmaengine.h is still kept
with the slave id enum. This allows us to keep the
old processor specific code as is and slowly move
over to slave id enums in per-processor headers.

Signed-off-by: Magnus Damm 
Signed-off-by: Paul Mundt

dmaengine: shdma: Common SH_DMA_SLAVE_NUMBER

2010-03-23T08:19:39+00:00

Move SHDMA_SLAVE_NUMBER from asm/dmaengine.h to
shdma.h. Set it to 256 to support a wide range
of processors. The amount of memory consumed by
this change is limited to 256 bits.

While at it, rename to SH_DMA_SLAVE_NUMBER to
match with the rest of the file.

Signed-off-by: Magnus Damm 
Acked-by: Guennadi Liakhovetski 
Signed-off-by: Paul Mundt