linux-toradex.git/drivers/edac/Kconfig, branch v3.7.4

edac: add support for Calxeda highbank L2 cache ecc

2012-06-27T12:01:29+00:00

Add support for L2 ECC on Calxeda highbank platform.

Signed-off-by: Rob Herring 
Signed-off-by: Mauro Carvalho Chehab

edac: add support for Calxeda highbank memory controller

2012-06-27T12:00:57+00:00

Add support for memory controller on Calxeda Highbank platforms. Highbank
platforms support a single 4GB mini-DIMM with 1-bit correction and 2-bit
detection.

Signed-off-by: Rob Herring 
Signed-off-by: Mauro Carvalho Chehab

edac: add a new per-dimm API and make the old per-virtual-rank API obsolete

2012-06-11T16:23:42+00:00

The old EDAC API is broken. It only works fine for systems manufatured
before 2005 and for AMD 64. The reason is that it forces all memory
controller drivers to discover rank info.

Also, it doesn't allow grouping the several ranks into a DIMM.

So, what almost all modern drivers do is to create a fake virtual-rank
information, and use it to cheat the EDAC core to accept the driver.

While this works if the user has enough time to discover what DIMM slot
corresponds to each "virtual-rank" information, it prevents EDAC usage
for users with less available time. It also makes life hard for vendors
that may want to provide a table with their motherboards to the userspace
tool (edac-utils) as each driver has its own logic for the virtual
mapping.

So, the old API should be removed, in favor of a more flexible API that
allows newer drivers to not lie to the EDAC core.

Reviewed-by: Aristeu Rozanski 
Cc: Doug Thompson 
Cc: Borislav Petkov 
Cc: Randy Dunlap 
Cc: Josh Boyer 
Cc: Hui Wang 
Signed-off-by: Mauro Carvalho Chehab

edac: sb_edac: Let the driver depend on PCI_MMCONFIG

2012-03-21T18:19:56+00:00

This driver needs to access PCIe Extended Configuration Space
Registers (0x100~0xfff), to correctly access those registers, we need
to enable PCI_MMCONFIG option. Since this option is not enabled for
X86_64 by default, we let the driver depend on it to prevent users
forgetting to enable this option.

Signed-off-by: Hui Wang 
Signed-off-by: Mauro Carvalho Chehab

Fix sb_edac compilation with 32 bits kernels

2012-03-21T18:19:38+00:00

As reported by Josh Boyer :
>	drivers/edac/sb_edac.c: In function 'get_memory_error_data':
> 	drivers/edac/sb_edac.c:861:2: warning: left shift count >= width of type
> 	[enabled by default]
> 	
> 	ERROR: "__udivdi3" [drivers/edac/sb_edac.ko] undefined!
> 	make[1]: *** [__modpost] Error 1
> 	make: *** [modules] Error 2

PS.: compile-tested only

Reported-by: Josh Boyer 
Signed-off-by: Mauro Carvalho Chehab

edac: Only build sb_edac on 64-bit

2011-11-03T18:22:44+00:00

The sb_edac driver is marginally useful on a 32-bit kernel, and
currently has 64-bit divide compile errors when building that config.
For now, make this build on only for 64-bit kernels.

Signed-off-by: Josh Boyer 
Signed-off-by: Mauro Carvalho Chehab 
Signed-off-by: Linus Torvalds

edac: tag sb_edac as EXPERIMENTAL, as it requires more testing

2011-11-01T12:01:55+00:00

Signed-off-by: Mauro Carvalho Chehab

edac: sb_edac: Add it to the building system

2011-11-01T12:01:54+00:00

Some changes on it were required due to changeset cd90cc84c6bf0, that
changed the glue with the MCE logic.

Signed-off-by: Mauro Carvalho Chehab

EDAC: Correct Kconfig dependencies

2011-11-01T12:01:50+00:00

Both AMD and Intel i7 EDAC drivers use MCE features and are thus
dependent of this functionality present in the kernel. Express this in
Kconfig so that randconfig builds don't break.

Reported-by: Randy Dunlap 
Signed-off-by: Borislav Petkov 
Acked-by: Randy Dunlap 
Signed-off-by: Mauro Carvalho Chehab

i7core_edac: Drop the edac_mce facility

2011-11-01T12:01:24+00:00

Remove edac_mce pieces and use the normal MCE decoder notifier chain by
retaining the same functionality with considerably less code.

Signed-off-by: Borislav Petkov 
Signed-off-by: Mauro Carvalho Chehab