<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-toradex.git/drivers/edac/Makefile, branch v5.3-rc8</title>
<subtitle>Linux kernel for Apalis and Colibri modules</subtitle>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/'/>
<entry>
<title>EDAC/sifive: Add EDAC platform driver for SiFive SoCs</title>
<updated>2019-06-20T18:44:36+00:00</updated>
<author>
<name>Yash Shah</name>
<email>yash.shah@sifive.com</email>
</author>
<published>2019-05-06T11:27:06+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=91abaeaaff35d97e88d2249f69f19db749a19a68'/>
<id>91abaeaaff35d97e88d2249f69f19db749a19a68</id>
<content type='text'>
Add an EDAC driver for SiFive SoCs. The initial version supports ECC
event monitoring and reporting through the EDAC framework for the SiFive
L2 cache controller. It registers for notifier events from the L2 cache
controller driver (arch/riscv/mm/sifive_l2_cache.c) for L2 ECC events.

 [ bp: Massage commit message. ]

Signed-off-by: Yash Shah &lt;yash.shah@sifive.com&gt;
Signed-off-by: Borislav Petkov &lt;bp@suse.de&gt;
Reviewed-by: James Morse &lt;james.morse@arm.com&gt;
Cc: Albert Ou &lt;aou@eecs.berkeley.edu&gt;
Cc: "David S. Miller" &lt;davem@davemloft.net&gt;
Cc: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
Cc: Jonathan Cameron &lt;Jonathan.Cameron@huawei.com&gt;
Cc: Linus Walleij &lt;linus.walleij@linaro.org&gt;
Cc: linux-edac &lt;linux-edac@vger.kernel.org&gt;
Cc: linux-riscv@lists.infradead.org
Cc: Mauro Carvalho Chehab &lt;mchehab@kernel.org&gt;
Cc: Nicolas Ferre &lt;nicolas.ferre@microchip.com&gt;
Cc: Palmer Dabbelt &lt;palmer@sifive.com&gt;
Cc: "Paul E. McKenney" &lt;paulmck@linux.ibm.com&gt;
Cc: Paul Walmsley &lt;paul.walmsley@sifive.com&gt;
Cc: sachin.ghadi@sifive.com
Link: https://lkml.kernel.org/r/1557142026-15949-2-git-send-email-yash.shah@sifive.com
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add an EDAC driver for SiFive SoCs. The initial version supports ECC
event monitoring and reporting through the EDAC framework for the SiFive
L2 cache controller. It registers for notifier events from the L2 cache
controller driver (arch/riscv/mm/sifive_l2_cache.c) for L2 ECC events.

 [ bp: Massage commit message. ]

Signed-off-by: Yash Shah &lt;yash.shah@sifive.com&gt;
Signed-off-by: Borislav Petkov &lt;bp@suse.de&gt;
Reviewed-by: James Morse &lt;james.morse@arm.com&gt;
Cc: Albert Ou &lt;aou@eecs.berkeley.edu&gt;
Cc: "David S. Miller" &lt;davem@davemloft.net&gt;
Cc: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
Cc: Jonathan Cameron &lt;Jonathan.Cameron@huawei.com&gt;
Cc: Linus Walleij &lt;linus.walleij@linaro.org&gt;
Cc: linux-edac &lt;linux-edac@vger.kernel.org&gt;
Cc: linux-riscv@lists.infradead.org
Cc: Mauro Carvalho Chehab &lt;mchehab@kernel.org&gt;
Cc: Nicolas Ferre &lt;nicolas.ferre@microchip.com&gt;
Cc: Palmer Dabbelt &lt;palmer@sifive.com&gt;
Cc: "Paul E. McKenney" &lt;paulmck@linux.ibm.com&gt;
Cc: Paul Walmsley &lt;paul.walmsley@sifive.com&gt;
Cc: sachin.ghadi@sifive.com
Link: https://lkml.kernel.org/r/1557142026-15949-2-git-send-email-yash.shah@sifive.com
</pre>
</div>
</content>
</entry>
<entry>
<title>EDAC, i10nm: Add a driver for Intel 10nm server processors</title>
<updated>2019-02-02T12:33:18+00:00</updated>
<author>
<name>Qiuxu Zhuo</name>
<email>qiuxu.zhuo@intel.com</email>
</author>
<published>2019-01-30T19:15:19+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=d4dc89d069aab9074e2493a4c2f3969a0a0b91c1'/>
<id>d4dc89d069aab9074e2493a4c2f3969a0a0b91c1</id>
<content type='text'>
This driver supports the Intel 10nm series server integrated memory
controller. It gets the memory capacity and topology information by
reading the registers in PCI configuration space and memory-mapped I/O.

It decodes the memory error address to the platform specific address
by using the ACPI Address Translation (ADXL) Device Specific Method
(DSM).

Co-developed-by: Tony Luck &lt;tony.luck@intel.com&gt;
Signed-off-by: Qiuxu Zhuo &lt;qiuxu.zhuo@intel.com&gt;
Signed-off-by: Tony Luck &lt;tony.luck@intel.com&gt;
Signed-off-by: Borislav Petkov &lt;bp@suse.de&gt;
Cc: James Morse &lt;james.morse@arm.com&gt;
Cc: Mauro Carvalho Chehab &lt;mchehab@kernel.org&gt;
Cc: linux-edac &lt;linux-edac@vger.kernel.org&gt;
Link: https://lkml.kernel.org/r/20190130191519.15393-5-tony.luck@intel.com
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This driver supports the Intel 10nm series server integrated memory
controller. It gets the memory capacity and topology information by
reading the registers in PCI configuration space and memory-mapped I/O.

It decodes the memory error address to the platform specific address
by using the ACPI Address Translation (ADXL) Device Specific Method
(DSM).

Co-developed-by: Tony Luck &lt;tony.luck@intel.com&gt;
Signed-off-by: Qiuxu Zhuo &lt;qiuxu.zhuo@intel.com&gt;
Signed-off-by: Tony Luck &lt;tony.luck@intel.com&gt;
Signed-off-by: Borislav Petkov &lt;bp@suse.de&gt;
Cc: James Morse &lt;james.morse@arm.com&gt;
Cc: Mauro Carvalho Chehab &lt;mchehab@kernel.org&gt;
Cc: linux-edac &lt;linux-edac@vger.kernel.org&gt;
Link: https://lkml.kernel.org/r/20190130191519.15393-5-tony.luck@intel.com
</pre>
</div>
</content>
</entry>
<entry>
<title>EDAC, skx_edac: Delete duplicated code</title>
<updated>2019-02-02T12:33:11+00:00</updated>
<author>
<name>Qiuxu Zhuo</name>
<email>qiuxu.zhuo@intel.com</email>
</author>
<published>2019-01-30T19:15:18+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=98f2fc829e3b55a0ff1b82753fc1e10941535cb9'/>
<id>98f2fc829e3b55a0ff1b82753fc1e10941535cb9</id>
<content type='text'>
Delete the duplicated code from skx_edac.c and rename skx_edac.c to
skx_base.c. Update the Makefile to build the skx_edac driver from
skx_base.c and skx_common.c.

Add SPDX to skx_base.c and clean out unnecessary #include lines.

 [ bp: Drop the license boilerplate - there's an SPDX identifier now. ]

Co-developed-by: Tony Luck &lt;tony.luck@intel.com&gt;
Signed-off-by: Qiuxu Zhuo &lt;qiuxu.zhuo@intel.com&gt;
Signed-off-by: Tony Luck &lt;tony.luck@intel.com&gt;
Signed-off-by: Borislav Petkov &lt;bp@suse.de&gt;
Cc: James Morse &lt;james.morse@arm.com&gt;
Cc: Mauro Carvalho Chehab &lt;mchehab@kernel.org&gt;
Cc: linux-edac &lt;linux-edac@vger.kernel.org&gt;
Link: https://lkml.kernel.org/r/20190130191519.15393-4-tony.luck@intel.com
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Delete the duplicated code from skx_edac.c and rename skx_edac.c to
skx_base.c. Update the Makefile to build the skx_edac driver from
skx_base.c and skx_common.c.

Add SPDX to skx_base.c and clean out unnecessary #include lines.

 [ bp: Drop the license boilerplate - there's an SPDX identifier now. ]

Co-developed-by: Tony Luck &lt;tony.luck@intel.com&gt;
Signed-off-by: Qiuxu Zhuo &lt;qiuxu.zhuo@intel.com&gt;
Signed-off-by: Tony Luck &lt;tony.luck@intel.com&gt;
Signed-off-by: Borislav Petkov &lt;bp@suse.de&gt;
Cc: James Morse &lt;james.morse@arm.com&gt;
Cc: Mauro Carvalho Chehab &lt;mchehab@kernel.org&gt;
Cc: linux-edac &lt;linux-edac@vger.kernel.org&gt;
Link: https://lkml.kernel.org/r/20190130191519.15393-4-tony.luck@intel.com
</pre>
</div>
</content>
</entry>
<entry>
<title>EDAC, aspeed: Add an Aspeed AST2500 EDAC driver</title>
<updated>2019-01-18T14:23:11+00:00</updated>
<author>
<name>Stefan M Schaeckeler</name>
<email>sschaeck@cisco.com</email>
</author>
<published>2019-01-17T16:38:16+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=9b7e6242ee4efcd7f9ef699bf1965e3a5343f216'/>
<id>9b7e6242ee4efcd7f9ef699bf1965e3a5343f216</id>
<content type='text'>
Add support for the Aspeed AST2500 SoC.

Signed-off-by: Stefan M Schaeckeler &lt;sschaeck@cisco.com&gt;
Signed-off-by: Borislav Petkov &lt;bp@suse.de&gt;
Cc: Andrew Jeffery &lt;andrew@aj.id.au&gt;
Cc: Joel Stanley &lt;joel@jms.id.au&gt;
Cc: Mark Rutland &lt;mark.rutland@arm.com&gt;
Cc: Mauro Carvalho Chehab &lt;mchehab@kernel.org&gt;
Cc: Rob Herring &lt;robh+dt@kernel.org&gt;
Cc: devicetree@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-aspeed@lists.ozlabs.org
Cc: linux-edac &lt;linux-edac@vger.kernel.org&gt;
Link: https://lkml.kernel.org/r/1547743097-5236-2-git-send-email-schaecsn@gmx.net
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add support for the Aspeed AST2500 SoC.

Signed-off-by: Stefan M Schaeckeler &lt;sschaeck@cisco.com&gt;
Signed-off-by: Borislav Petkov &lt;bp@suse.de&gt;
Cc: Andrew Jeffery &lt;andrew@aj.id.au&gt;
Cc: Joel Stanley &lt;joel@jms.id.au&gt;
Cc: Mark Rutland &lt;mark.rutland@arm.com&gt;
Cc: Mauro Carvalho Chehab &lt;mchehab@kernel.org&gt;
Cc: Rob Herring &lt;robh+dt@kernel.org&gt;
Cc: devicetree@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-aspeed@lists.ozlabs.org
Cc: linux-edac &lt;linux-edac@vger.kernel.org&gt;
Link: https://lkml.kernel.org/r/1547743097-5236-2-git-send-email-schaecsn@gmx.net
</pre>
</div>
</content>
</entry>
<entry>
<title>drivers: edac: Add EDAC driver support for QCOM SoCs</title>
<updated>2018-09-13T20:54:05+00:00</updated>
<author>
<name>Channagoud Kadabi</name>
<email>ckadabi@codeaurora.org</email>
</author>
<published>2018-09-12T18:06:34+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=27450653f1db0b9d5b5048a246c850c52ee4aa61'/>
<id>27450653f1db0b9d5b5048a246c850c52ee4aa61</id>
<content type='text'>
Add error reporting driver for Single Bit Errors (SBEs) and Double Bit
Errors (DBEs). As of now, this driver supports error reporting for
Last Level Cache Controller (LLCC) of Tag RAM and Data RAM. Interrupts
are triggered when the errors happen in the cache, the driver handles
those interrupts and dumps the syndrome registers.

Signed-off-by: Channagoud Kadabi &lt;ckadabi@codeaurora.org&gt;
Signed-off-by: Venkata Narendra Kumar Gutta &lt;vnkgutta@codeaurora.org&gt;
Co-developed-by: Venkata Narendra Kumar Gutta &lt;vnkgutta@codeaurora.org&gt;
Acked-by: Borislav Petkov &lt;bp@suse.de&gt;
Signed-off-by: Andy Gross &lt;andy.gross@linaro.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add error reporting driver for Single Bit Errors (SBEs) and Double Bit
Errors (DBEs). As of now, this driver supports error reporting for
Last Level Cache Controller (LLCC) of Tag RAM and Data RAM. Interrupts
are triggered when the errors happen in the cache, the driver handles
those interrupts and dumps the syndrome registers.

Signed-off-by: Channagoud Kadabi &lt;ckadabi@codeaurora.org&gt;
Signed-off-by: Venkata Narendra Kumar Gutta &lt;vnkgutta@codeaurora.org&gt;
Co-developed-by: Venkata Narendra Kumar Gutta &lt;vnkgutta@codeaurora.org&gt;
Acked-by: Borislav Petkov &lt;bp@suse.de&gt;
Signed-off-by: Andy Gross &lt;andy.gross@linaro.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>edac: remove tile driver</title>
<updated>2018-03-26T13:56:17+00:00</updated>
<author>
<name>Arnd Bergmann</name>
<email>arnd@arndb.de</email>
</author>
<published>2018-03-09T10:39:10+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=0833f7634ff89d8dd631925fb551e3d1864066d5'/>
<id>0833f7634ff89d8dd631925fb551e3d1864066d5</id>
<content type='text'>
The Tile architecture is obsolete and getting removed from the kernel,
this driver appears to only be used there, and not on the ARM based
successors (Tile-Mx, BlueField), so we should remove it as well.

Acked-by: Borislav Petkov &lt;bp@suse.de&gt;
Acked-by: Mauro Carvalho Chehab &lt;mchehab@s-opensource.com&gt;
Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The Tile architecture is obsolete and getting removed from the kernel,
this driver appears to only be used there, and not on the ARM based
successors (Tile-Mx, BlueField), so we should remove it as well.

Acked-by: Borislav Petkov &lt;bp@suse.de&gt;
Acked-by: Mauro Carvalho Chehab &lt;mchehab@s-opensource.com&gt;
Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>EDAC, ti: Add support for TI keystone and DRA7xx EDAC</title>
<updated>2017-11-27T12:51:19+00:00</updated>
<author>
<name>Tero Kristo</name>
<email>t-kristo@ti.com</email>
</author>
<published>2017-11-13T13:08:10+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=86a18ee21e5eecf56ca02aec24807ffa87bb57b6'/>
<id>86a18ee21e5eecf56ca02aec24807ffa87bb57b6</id>
<content type='text'>
TI Keystone and DRA7xx SoCs have support for EDAC on DDR3 memory that can
correct one bit errors and detect two bit errors. Add EDAC driver for this
feature which plugs into the generic kernel EDAC framework.

Signed-off-by: Tero Kristo &lt;t-kristo@ti.com&gt;
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-edac &lt;linux-edac@vger.kernel.org&gt;
Cc: linux-omap@vger.kernel.org
Link: http://lkml.kernel.org/r/1510578490-14510-1-git-send-email-t-kristo@ti.com
[ Add SPDX tag and make _emif_get_id() use edac_printk(). ]
Signed-off-by: Borislav Petkov &lt;bp@suse.de&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
TI Keystone and DRA7xx SoCs have support for EDAC on DDR3 memory that can
correct one bit errors and detect two bit errors. Add EDAC driver for this
feature which plugs into the generic kernel EDAC framework.

Signed-off-by: Tero Kristo &lt;t-kristo@ti.com&gt;
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-edac &lt;linux-edac@vger.kernel.org&gt;
Cc: linux-omap@vger.kernel.org
Link: http://lkml.kernel.org/r/1510578490-14510-1-git-send-email-t-kristo@ti.com
[ Add SPDX tag and make _emif_get_id() use edac_printk(). ]
Signed-off-by: Borislav Petkov &lt;bp@suse.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>EDAC: Delete edac_stub.c</title>
<updated>2017-04-10T15:14:48+00:00</updated>
<author>
<name>Borislav Petkov</name>
<email>bp@suse.de</email>
</author>
<published>2017-02-04T16:42:03+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=fee27d7d97886515a60cce38b4152b7f5b5a21fc'/>
<id>fee27d7d97886515a60cce38b4152b7f5b5a21fc</id>
<content type='text'>
Move the remaining functionality to edac_mc.c. Convert "edac_report=" to
a module parameter.

Signed-off-by: Borislav Petkov &lt;bp@suse.de&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Move the remaining functionality to edac_mc.c. Convert "edac_report=" to
a module parameter.

Signed-off-by: Borislav Petkov &lt;bp@suse.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>EDAC: Remove EDAC_MM_EDAC</title>
<updated>2017-04-10T15:14:41+00:00</updated>
<author>
<name>Borislav Petkov</name>
<email>bp@suse.de</email>
</author>
<published>2017-02-03T17:18:05+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=e3c4ff6d8c949fa9a9ea1bd005bf1967efe09d5d'/>
<id>e3c4ff6d8c949fa9a9ea1bd005bf1967efe09d5d</id>
<content type='text'>
Move all the EDAC core functionality behind CONFIG_EDAC and get rid of
that indirection. Update defconfigs which had it.

While at it, fix dependencies such that EDAC depends on RAS for the
tracepoints.

Signed-off-by: Borislav Petkov &lt;bp@suse.de&gt;
Cc: linux-arm-kernel@lists.infradead.org
Cc: linuxppc-dev@lists.ozlabs.org
Cc: Chris Metcalf &lt;cmetcalf@mellanox.com&gt;
Cc: linux-edac@vger.kernel.org
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Move all the EDAC core functionality behind CONFIG_EDAC and get rid of
that indirection. Update defconfigs which had it.

While at it, fix dependencies such that EDAC depends on RAS for the
tracepoints.

Signed-off-by: Borislav Petkov &lt;bp@suse.de&gt;
Cc: linux-arm-kernel@lists.infradead.org
Cc: linuxppc-dev@lists.ozlabs.org
Cc: Chris Metcalf &lt;cmetcalf@mellanox.com&gt;
Cc: linux-edac@vger.kernel.org
</pre>
</div>
</content>
</entry>
<entry>
<title>EDAC, highbank: Align Makefile directives</title>
<updated>2017-04-10T15:10:43+00:00</updated>
<author>
<name>Borislav Petkov</name>
<email>bp@suse.de</email>
</author>
<published>2017-02-03T13:28:38+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=76f6a26ce94f1af2a04fcb44fe74386ec524931f'/>
<id>76f6a26ce94f1af2a04fcb44fe74386ec524931f</id>
<content type='text'>
... like the rest of the file.

Signed-off-by: Borislav Petkov &lt;bp@suse.de&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
... like the rest of the file.

Signed-off-by: Borislav Petkov &lt;bp@suse.de&gt;
</pre>
</div>
</content>
</entry>
</feed>
