<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-toradex.git/drivers/edac/altera_edac.c, branch v4.4.6</title>
<subtitle>Linux kernel for Apalis and Colibri modules</subtitle>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/'/>
<entry>
<title>EDAC, altera: Convert to debugfs wrappers</title>
<updated>2015-09-22T16:20:56+00:00</updated>
<author>
<name>Borislav Petkov</name>
<email>bp@suse.de</email>
</author>
<published>2015-09-22T10:27:29+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=bba3b31e440a9c16da013a5f07066b8092a16c87'/>
<id>bba3b31e440a9c16da013a5f07066b8092a16c87</id>
<content type='text'>
Use the EDAC-specific wrappers. Drop CONFIG_EDAC_DEBUG ifdeffery.

Cc: Thor Thayer &lt;tthayer@opensource.altera.com&gt;
Cc: &lt;linux-edac@vger.kernel.org&gt;
Signed-off-by: Borislav Petkov &lt;bp@suse.de&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Use the EDAC-specific wrappers. Drop CONFIG_EDAC_DEBUG ifdeffery.

Cc: Thor Thayer &lt;tthayer@opensource.altera.com&gt;
Cc: &lt;linux-edac@vger.kernel.org&gt;
Signed-off-by: Borislav Petkov &lt;bp@suse.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>EDAC, altera: Do not allow suspend when EDAC is enabled</title>
<updated>2015-06-24T16:16:12+00:00</updated>
<author>
<name>Alan Tull</name>
<email>atull@opensource.altera.com</email>
</author>
<published>2015-06-05T13:49:15+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=6f2b6422d4787ffa72bd81abdc1b503dbf87a49a'/>
<id>6f2b6422d4787ffa72bd81abdc1b503dbf87a49a</id>
<content type='text'>
Suspend-to-RAM and EDAC support are mutually exclusive on SOCFPGA. If
EDAC is enabled, it will prevent the platform from going into suspend.

The reason is that the IRQ vectors for OCRAM reside on DDR and in
Suspend-to-RAM mode we're executing out of OCRAM. If an ECC error
occurs, we can't handle it so it was decided to make them mutually
exclusive.

Signed-off-by: Alan Tull &lt;atull@opensource.altera.com&gt;
Signed-off-by: Dinh Nguyen &lt;dinguyen@opensource.altera.com&gt;
Cc: dinh.linux@gmail.com
Cc: dougthompson@xmission.com
Cc: linux-edac &lt;linux-edac@vger.kernel.org&gt;
Cc: mchehab@osg.samsung.com
Cc: tthayer@opensource.altera.com
Link: http://lkml.kernel.org/r/1433512155-9906-1-git-send-email-dinguyen@opensource.altera.com
Signed-off-by: Borislav Petkov &lt;bp@suse.de&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Suspend-to-RAM and EDAC support are mutually exclusive on SOCFPGA. If
EDAC is enabled, it will prevent the platform from going into suspend.

The reason is that the IRQ vectors for OCRAM reside on DDR and in
Suspend-to-RAM mode we're executing out of OCRAM. If an ECC error
occurs, we can't handle it so it was decided to make them mutually
exclusive.

Signed-off-by: Alan Tull &lt;atull@opensource.altera.com&gt;
Signed-off-by: Dinh Nguyen &lt;dinguyen@opensource.altera.com&gt;
Cc: dinh.linux@gmail.com
Cc: dougthompson@xmission.com
Cc: linux-edac &lt;linux-edac@vger.kernel.org&gt;
Cc: mchehab@osg.samsung.com
Cc: tthayer@opensource.altera.com
Link: http://lkml.kernel.org/r/1433512155-9906-1-git-send-email-dinguyen@opensource.altera.com
Signed-off-by: Borislav Petkov &lt;bp@suse.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>EDAC, altera: Add Arria10 EDAC support</title>
<updated>2015-06-24T16:16:09+00:00</updated>
<author>
<name>Thor Thayer</name>
<email>tthayer@opensource.altera.com</email>
</author>
<published>2015-06-04T14:28:47+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=73bcc942f4271fab2ea41e6a3992d3c2164faaa8'/>
<id>73bcc942f4271fab2ea41e6a3992d3c2164faaa8</id>
<content type='text'>
The Arria10 SDRAM and ECC system differs significantly from the
Cyclone5 and Arria5 SoCs. This patch adds support for the Arria10
SoC.
1) IRQ handler needs to support SHARED IRQ
2) Support sberr and dberr address reporting.

Signed-off-by: Thor Thayer &lt;tthayer@opensource.altera.com&gt;
Cc: Arnd Bergmann &lt;arnd@arndb.de&gt;
Cc: devicetree@vger.kernel.org
Cc: dinguyen@opensource.altera.com
Cc: galak@codeaurora.org
Cc: grant.likely@linaro.org
Cc: ijc+devicetree@hellion.org.uk
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-edac &lt;linux-edac@vger.kernel.org&gt;
Cc: m.chehab@samsung.com
Cc: mark.rutland@arm.com
Cc: pawel.moll@arm.com
Cc: robh+dt@kernel.org
Cc: tthayer.linux@gmail.com
Link: http://lkml.kernel.org/r/1433428128-7292-4-git-send-email-tthayer@opensource.altera.com
Signed-off-by: Borislav Petkov &lt;bp@suse.de&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The Arria10 SDRAM and ECC system differs significantly from the
Cyclone5 and Arria5 SoCs. This patch adds support for the Arria10
SoC.
1) IRQ handler needs to support SHARED IRQ
2) Support sberr and dberr address reporting.

Signed-off-by: Thor Thayer &lt;tthayer@opensource.altera.com&gt;
Cc: Arnd Bergmann &lt;arnd@arndb.de&gt;
Cc: devicetree@vger.kernel.org
Cc: dinguyen@opensource.altera.com
Cc: galak@codeaurora.org
Cc: grant.likely@linaro.org
Cc: ijc+devicetree@hellion.org.uk
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-edac &lt;linux-edac@vger.kernel.org&gt;
Cc: m.chehab@samsung.com
Cc: mark.rutland@arm.com
Cc: pawel.moll@arm.com
Cc: robh+dt@kernel.org
Cc: tthayer.linux@gmail.com
Link: http://lkml.kernel.org/r/1433428128-7292-4-git-send-email-tthayer@opensource.altera.com
Signed-off-by: Borislav Petkov &lt;bp@suse.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>EDAC, altera: Refactor for Altera CycloneV SoC</title>
<updated>2015-06-24T16:16:08+00:00</updated>
<author>
<name>Thor Thayer</name>
<email>tthayer@opensource.altera.com</email>
</author>
<published>2015-06-04T14:28:46+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=143f4a5ac5af82a4055100c8f40b26187d5c20ba'/>
<id>143f4a5ac5af82a4055100c8f40b26187d5c20ba</id>
<content type='text'>
The Arria10 SoC uses a completely different SDRAM controller from the
earlier CycloneV and ArriaV SoCs. This patch abstracts the SDRAM bits
for the CycloneV/ArriaV SoCs in preparation for the Arria10 support.

Signed-off-by: Thor Thayer &lt;tthayer@opensource.altera.com&gt;
Cc: Arnd Bergmann &lt;arnd@arndb.de&gt;
Cc: devicetree@vger.kernel.org
Cc: dinguyen@opensource.altera.com
Cc: galak@codeaurora.org
Cc: grant.likely@linaro.org
Cc: ijc+devicetree@hellion.org.uk
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-edac &lt;linux-edac@vger.kernel.org&gt;
Cc: m.chehab@samsung.com
Cc: mark.rutland@arm.com
Cc: pawel.moll@arm.com
Cc: robh+dt@kernel.org
Cc: tthayer.linux@gmail.com
Link: http://lkml.kernel.org/r/1433428128-7292-3-git-send-email-tthayer@opensource.altera.com
Signed-off-by: Borislav Petkov &lt;bp@suse.de&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The Arria10 SoC uses a completely different SDRAM controller from the
earlier CycloneV and ArriaV SoCs. This patch abstracts the SDRAM bits
for the CycloneV/ArriaV SoCs in preparation for the Arria10 support.

Signed-off-by: Thor Thayer &lt;tthayer@opensource.altera.com&gt;
Cc: Arnd Bergmann &lt;arnd@arndb.de&gt;
Cc: devicetree@vger.kernel.org
Cc: dinguyen@opensource.altera.com
Cc: galak@codeaurora.org
Cc: grant.likely@linaro.org
Cc: ijc+devicetree@hellion.org.uk
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-edac &lt;linux-edac@vger.kernel.org&gt;
Cc: m.chehab@samsung.com
Cc: mark.rutland@arm.com
Cc: pawel.moll@arm.com
Cc: robh+dt@kernel.org
Cc: tthayer.linux@gmail.com
Link: http://lkml.kernel.org/r/1433428128-7292-3-git-send-email-tthayer@opensource.altera.com
Signed-off-by: Borislav Petkov &lt;bp@suse.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>EDAC, altera: Generalize driver to use DT Memory size</title>
<updated>2015-06-24T16:16:07+00:00</updated>
<author>
<name>Thor Thayer</name>
<email>tthayer@opensource.altera.com</email>
</author>
<published>2015-06-04T14:28:45+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=f9ae487e04370e229a96c83a8c86510299712192'/>
<id>f9ae487e04370e229a96c83a8c86510299712192</id>
<content type='text'>
The Arria10 SOC uses a completely different SDRAM controller from the
earlier CycloneV and ArriaV SoCs. The memory size is calculated in the
bootloader and passed via the device tree. Using this device tree size
is more generic than using the register fields to calculate the memory
size for different SDRAM controllers.

Signed-off-by: Thor Thayer &lt;tthayer@opensource.altera.com&gt;
Cc: Arnd Bergmann &lt;arnd@arndb.de&gt;
Cc: devicetree@vger.kernel.org
Cc: dinguyen@opensource.altera.com
Cc: galak@codeaurora.org
Cc: grant.likely@linaro.org
Cc: ijc+devicetree@hellion.org.uk
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-edac &lt;linux-edac@vger.kernel.org&gt;
Cc: m.chehab@samsung.com
Cc: mark.rutland@arm.com
Cc: pawel.moll@arm.com
Cc: robh+dt@kernel.org
Cc: tthayer.linux@gmail.com
Link: http://lkml.kernel.org/r/1433428128-7292-2-git-send-email-tthayer@opensource.altera.com
Signed-off-by: Borislav Petkov &lt;bp@suse.de&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The Arria10 SOC uses a completely different SDRAM controller from the
earlier CycloneV and ArriaV SoCs. The memory size is calculated in the
bootloader and passed via the device tree. Using this device tree size
is more generic than using the register fields to calculate the memory
size for different SDRAM controllers.

Signed-off-by: Thor Thayer &lt;tthayer@opensource.altera.com&gt;
Cc: Arnd Bergmann &lt;arnd@arndb.de&gt;
Cc: devicetree@vger.kernel.org
Cc: dinguyen@opensource.altera.com
Cc: galak@codeaurora.org
Cc: grant.likely@linaro.org
Cc: ijc+devicetree@hellion.org.uk
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-edac &lt;linux-edac@vger.kernel.org&gt;
Cc: m.chehab@samsung.com
Cc: mark.rutland@arm.com
Cc: pawel.moll@arm.com
Cc: robh+dt@kernel.org
Cc: tthayer.linux@gmail.com
Link: http://lkml.kernel.org/r/1433428128-7292-2-git-send-email-tthayer@opensource.altera.com
Signed-off-by: Borislav Petkov &lt;bp@suse.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>edac: altera: Add Altera SDRAM EDAC support</title>
<updated>2014-09-04T18:41:46+00:00</updated>
<author>
<name>Thor Thayer</name>
<email>tthayer@opensource.altera.com</email>
</author>
<published>2014-09-03T15:27:54+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=71bcada88b0f3c7f11fa5b8a4b30ae66dbfabbf3'/>
<id>71bcada88b0f3c7f11fa5b8a4b30ae66dbfabbf3</id>
<content type='text'>
This patch adds support for the CycloneV and ArriaV SDRAM controllers.
Correction and reporting of SBEs, Panic on DBEs.

There was a discussion thread on whether this driver should be an mfd driver
or just make use of syscon, which is already a mfd. Ultimately, the
decision to use a simple syscon interface was reached.[1]

[1] https://lkml.org/lkml/2014/7/30/514

[dinguyen] Fixed Kconfig to have EDAC_ALTERA_MC as a tristate to prevent a
build failure for allmodconfig.

Signed-off-by: Thor Thayer &lt;tthayer@opensource.altera.com&gt;
Acked-by: Borislav Petkov &lt;bp@suse.de&gt;
[dinguyen] cleaned up commit message
Signed-off-by: Dinh Nguyen &lt;dinguyen@opensource.altera.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This patch adds support for the CycloneV and ArriaV SDRAM controllers.
Correction and reporting of SBEs, Panic on DBEs.

There was a discussion thread on whether this driver should be an mfd driver
or just make use of syscon, which is already a mfd. Ultimately, the
decision to use a simple syscon interface was reached.[1]

[1] https://lkml.org/lkml/2014/7/30/514

[dinguyen] Fixed Kconfig to have EDAC_ALTERA_MC as a tristate to prevent a
build failure for allmodconfig.

Signed-off-by: Thor Thayer &lt;tthayer@opensource.altera.com&gt;
Acked-by: Borislav Petkov &lt;bp@suse.de&gt;
[dinguyen] cleaned up commit message
Signed-off-by: Dinh Nguyen &lt;dinguyen@opensource.altera.com&gt;
</pre>
</div>
</content>
</entry>
</feed>
