linux-toradex.git/drivers/edac/altera_edac.h, branch v4.9.52

EDAC, altera: Rename device trigger to common name

2016-09-01T06:55:24+00:00

The L2 and OCRAM devices have different ecc trigger names than the other
EDAC devices (FIFO peripherals). Make them all the same and remove the
character array from the device structure.

Signed-off-by: Thor Thayer 
Cc: linux-edac 
Link: http://lkml.kernel.org/r/1471622666-15197-2-git-send-email-tthayer@opensource.altera.com
Signed-off-by: Borislav Petkov

EDAC, altera: Add Arria10 SD-MMC EDAC support

2016-08-10T12:43:14+00:00

Add Altera Arria10 SD-MMC FIFO memory EDAC support. The SD-MMC is a
dual port RAM implementation which is different than any of the other
peripherals and therefore requires additional code.

Signed-off-by: Thor Thayer 
Cc: dinguyen@opensource.altera.com
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-edac 
Link: http://lkml.kernel.org/r/1470753653-23465-3-git-send-email-tthayer@opensource.altera.com
Signed-off-by: Borislav Petkov

EDAC, altera: Add Arria10 Ethernet EDAC support

2016-06-25T09:31:34+00:00

Add Altera Arria10 Ethernet FIFO memory EDAC support. Update to support
a common compatibility string for all Ethernet FIFOs in the DT.

Signed-off-by: Thor Thayer 
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-edac 
Link: http://lkml.kernel.org/r/1466603939-7526-8-git-send-email-tthayer@opensource.altera.com
Signed-off-by: Borislav Petkov

EDAC, altera: Add Arria10 ECC memory init functions

2016-06-24T19:16:38+00:00

In preparation for additional memory module ECCs, add the memory
initialization functions and helpers.

Signed-off-by: Thor Thayer 
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-edac 
Link: http://lkml.kernel.org/r/1466603939-7526-7-git-send-email-tthayer@opensource.altera.com
Signed-off-by: Borislav Petkov

EDAC, altera: Add panic flag check to A10 IRQ

2016-06-24T09:58:43+00:00

In preparation for additional memory module ECCs, the IRQ function will
check a panic flag before doing a kernel panic on double bit errors.

OCRAM uncorrectable errors cause a panic because sleep/resume functions
and FPGA contents during sleep are stored in OCRAM.

ECCs on peripheral FIFO buffers will not cause a kernel panic on DBERRs
because the packet can be retried and therefore recovered.

Signed-off-by: Thor Thayer 
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-edac 
Link: http://lkml.kernel.org/r/1466603939-7526-3-git-send-email-tthayer@opensource.altera.com
Signed-off-by: Borislav Petkov

EDAC, altera: Add ECC Manager IRQ controller support

2016-06-08T11:23:01+00:00

To better support child devices, the ECC manager needs to be
implemented as an IRQ controller.

Signed-off-by: Thor Thayer 
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-edac 
Link: http://lkml.kernel.org/r/1465331757-10227-1-git-send-email-tthayer@opensource.altera.com
Signed-off-by: Borislav Petkov

EDAC, altera: Add Arria10 OCRAM ECC support

2016-04-07T10:42:56+00:00

Add Arria10 On-Chip RAM ECC handling.

Signed-off-by: Thor Thayer 
Cc: devicetree@vger.kernel.org
Cc: dinguyen@opensource.altera.com
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux@arm.linux.org.uk
Cc: linux-edac 
Link: http://lkml.kernel.org/r/1459992174-8015-1-git-send-email-tthayer@opensource.altera.com
Signed-off-by: Borislav Petkov

EDAC, altera: Add register offset for ECC Enable

2016-04-02T11:38:57+00:00

In preparation for the Arria10 peripheral ECCs, add a register offset
from the ECC base to index to the ECC enable register.

Signed-off-by: Thor Thayer 
Cc: devicetree@vger.kernel.org
Cc: dinguyen@opensource.altera.com
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux@arm.linux.org.uk
Cc: linux-edac 
Link: http://lkml.kernel.org/r/1459450087-24792-3-git-send-email-tthayer@opensource.altera.com
Signed-off-by: Borislav Petkov

EDAC, altera: Extract error inject operations to a struct fops

2016-04-02T11:27:06+00:00

In preparation for the Arria10 peripheral ECCs, extract the inject file
operations because the Arria10 IRQ trigger mechanism is different than
Cyclone5/Arria5 and Arria10 L2 cache.

Signed-off-by: Thor Thayer 
Cc: devicetree@vger.kernel.org
Cc: dinguyen@opensource.altera.com
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux@arm.linux.org.uk
Cc: linux-edac 
Link: http://lkml.kernel.org/r/1459450087-24792-2-git-send-email-tthayer@opensource.altera.com
Signed-off-by: Borislav Petkov

EDAC, altera: Add Arria10 L2 Cache ECC handling

2016-03-29T08:34:06+00:00

Add a private data structure for Arria10 L2 cache ECC and the probe
function for it.

The Arria10 ECC device IRQs are in a shared register so the ECC Manager
parent/child relationship requires a different probe function.

Signed-off-by: Thor Thayer 
Cc: devicetree@vger.kernel.org
Cc: dinguyen@opensource.altera.com
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux@arm.linux.org.uk
Cc: linux-edac 
Link: http://lkml.kernel.org/r/1458576106-24505-8-git-send-email-tthayer@opensource.altera.com
Signed-off-by: Borislav Petkov