linux-toradex.git/drivers/edac/altera_edac.h, branch v6.11

edac: altera: Move Stratix10 SDRAM ECC to peripheral

2019-07-25T18:28:42+00:00

ARM32 SoCFPGAs had separate IRQs for SDRAM. ARM64 SoCFPGAs
send all DBEs to SError so filtering by source is necessary.

The Stratix10 SDRAM ECC is a better match with the generic
Altera peripheral ECC framework because the linked list can
be searched to find the ECC block offset and printout
the DBE Address.

Signed-off-by: Thor Thayer 
Acked-by: James Morse 
Signed-off-by: Mauro Carvalho Chehab

EDAC/altera, firmware/intel: Add Stratix10 ECC DBE SMC call

2019-04-02T15:42:15+00:00

Reserve ECC Double Bit Error SMC call to alert U-Boot that a DBE has
occurred. Move the call from local EDAC header file to a common header.

 [ bp: Merge the two patches. ]

Signed-off-by: Thor Thayer 
Signed-off-by: Borislav Petkov 
Reviewed-by: Richard Gong 
Reviewed-by: Alan Tull  # firmware
Cc: Greg KH 
Cc: James Morse 
Cc: linux-edac 
Cc: mchehab@kernel.org
Link: https://lkml.kernel.org/r/1553870639-23895-1-git-send-email-thor.thayer@linux.intel.com

Signed-off-by: Borislav Petkov

EDAC/altera: Do less intrusive error injection

2019-03-29T10:35:39+00:00

Improve the Arria10 and Stratix10 error injection routine
by reading the data and changing just 1 bit before writing
back out. Previous routine would overwrite the first bytes
to 0 then change 1 bit but this method is less intrusive.

Signed-off-by: Thor Thayer 
Signed-off-by: Borislav Petkov 
Cc: James Morse 
Cc: Mauro Carvalho Chehab 
Cc: linux-edac 
Link: https://lkml.kernel.org/r/1553635771-32693-1-git-send-email-thor.thayer@linux.intel.com

EDAC, altera: Fix S10 Double Bit Error Notification

2019-03-23T09:03:30+00:00

Stratix10 Double Bit Error Address was always read from SDRAM Address
register instead of each device's Address register.

To determine which device had the DBE, cycle through the EDAC devices
comparing the DBE value to the db_irq value. Once found, report the DBE
Address from the device registers as well as the device name.

Finally, notify the system via an SMC call and indicate the panic should
result in a system reboot. Change a run-time check to a Stratix10
compile-time check for a clean SMC notification.

Fixes: d5fc9125566c ("EDAC, altera: Combine Stratix10 and Arria10 probe functions")
Signed-off-by: Thor Thayer 
Signed-off-by: Borislav Petkov 
Cc: James Morse 
Cc: Mauro Carvalho Chehab 
Cc: linux-edac 
Link: https://lkml.kernel.org/r/1552490842-25440-1-git-send-email-thor.thayer@linux.intel.com

EDAC, altera: Fix S10 persistent register offset

2019-01-24T16:13:59+00:00

Correct the persistent register offset where address and status are
stored.

Fixes: 08f08bfb7b4c ("EDAC, altera: Merge Stratix10 into the Arria10 SDRAM probe routine")
Signed-off-by: Thor Thayer 
Signed-off-by: Borislav Petkov 
Cc: James Morse 
Cc: Mauro Carvalho Chehab 
Cc: devicetree@vger.kernel.org
Cc: dinguyen@kernel.org
Cc: linux-edac 
Cc: mark.rutland@arm.com
Cc: robh+dt@kernel.org
Cc: stable 
Link: https://lkml.kernel.org/r/1548179287-21760-2-git-send-email-thor.thayer@linux.intel.com

EDAC, altera: Add Stratix10 peripheral support

2018-09-25T19:22:20+00:00

Add a new peripheral ECC error injection algorithm for Stratix10 and
some Arria10 peripherals. Inject a single bit error and upon readback,
it will be corrected and the SBE IRQ handler will be called.

Add regmap selection for Stratix10 or Arria10 peripheral device memory
initialization.

Add checks for both Arria10 and Stratix10 to the peripheral ECC setup.

Signed-off-by: Thor Thayer 
Signed-off-by: Borislav Petkov 
Cc: dinguyen@kernel.org
Cc: robh+dt@kernel.org
Cc: mark.rutland@arm.com
Cc: mchehab@kernel.org
Cc: devicetree@vger.kernel.org
Cc: linux-edac@vger.kernel.org
Link: https://lkml.kernel.org/r/1537883342-30180-6-git-send-email-thor.thayer@linux.intel.com

EDAC, altera: Merge Stratix10 into the Arria10 SDRAM probe routine

2018-09-25T19:21:26+00:00

Change Stratix10 regmap to use offsets from a base to match
the Arria10 regmap and allow re-use of the Arria10 functions.
Only the regmap initialization differs (Arria10 mmio_regmap
vs Stratix10 custom regmap).

Modify the SDRAM probe function to handle Stratix10. Remove the
Stratix10 offset defines if Arria10 can be used. Remove the unused
Stratix10 probe function.

Signed-off-by: Thor Thayer 
Signed-off-by: Borislav Petkov 
Cc: dinguyen@kernel.org
Cc: robh+dt@kernel.org
Cc: mark.rutland@arm.com
Cc: mchehab@kernel.org
Cc: devicetree@vger.kernel.org
Cc: linux-edac@vger.kernel.org
Link: https://lkml.kernel.org/r/1537883342-30180-5-git-send-email-thor.thayer@linux.intel.com

EDAC, altera: Combine Stratix10 and Arria10 probe functions

2018-09-25T19:17:38+00:00

On Stratix10, the ECC offsets are similar to the existing
Arria10 functions and this can be leveraged to simplify
the EDAC driver as follows:

1. Fold Stratix10 specifics into Arria10 structures and
functions.

2. Implement the Stratix10 System Manager register accesses
using a custom regmap to allow use with the Arria10 System
Manager regmaps.

3. Stratix10 double bit errors are implemented as SError
instead of interrupts so use a panic notifier.

Signed-off-by: Thor Thayer 
Signed-off-by: Borislav Petkov 
Cc: dinguyen@kernel.org
Cc: robh+dt@kernel.org
Cc: mark.rutland@arm.com
Cc: mchehab@kernel.org
Cc: devicetree@vger.kernel.org
Cc: linux-edac@vger.kernel.org
Link: https://lkml.kernel.org/r/1537883342-30180-3-git-send-email-thor.thayer@linux.intel.com

EDAC, altera: Handle SDRAM Uncorrectable Errors on Stratix10

2018-05-12T10:29:41+00:00

On Stratix10, uncorrectable errors are routed to the SError exception
instead of the IRQ exceptions. In Stratix10, uncorrectable SErrors
must be treated as fatal and will cause a panic. Older Altera/Intel
parts printed out a message for UE so do that here using the notifier
framework.

Record the UE in sticky registers that retain the state through a reset.
Check these registers on probe and printout the error on startup.

Signed-off-by: Thor Thayer 
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-edac 
Cc: mark.rutland@arm.com
Cc: mchehab@kernel.org
Cc: will.deacon@arm.com
Link: http://lkml.kernel.org/r/1526079610-5527-1-git-send-email-thor.thayer@linux.intel.com
[ Remove unused var in s10_edac_dberr_handler(), reorder args. ]
Signed-off-by: Borislav Petkov

EDAC, altera: Add support for Stratix10 SDRAM EDAC

2018-05-12T09:13:39+00:00

Support for Stratix10 SDRAM ECC requires the use of SMC calls to Secure
Monitor for accessing registers.

Signed-off-by: Thor Thayer 
Cc: Mauro Carvalho Chehab 
Cc: catalin.marinas@arm.com
Cc: devicetree@vger.kernel.org
Cc: dinguyen@kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-edac 
Cc: mark.rutland@arm.com
Cc: robh+dt@kernel.org
Cc: will.deacon@arm.com
Link: http://lkml.kernel.org/r/1524854238-19394-3-git-send-email-thor.thayer@linux.intel.com
Signed-off-by: Borislav Petkov