linux-toradex.git/drivers/edac/amd64_edac.h, branch v3.14.50

bitops: Introduce a more generic BITMASK macro

2013-10-21T22:12:01+00:00

GENMASK is used to create a contiguous bitmask([hi:lo]). It is
implemented twice in current kernel. One is in EDAC driver, the other
is in SiS/XGI FB driver. Move it to a more generic place for other
usage.

Signed-off-by: Chen, Gong 
Cc: Borislav Petkov 
Cc: Thomas Winischhofer 
Cc: Jean-Christophe Plagniol-Villard 
Cc: Tomi Valkeinen 
Acked-by: Borislav Petkov 
Acked-by: Mauro Carvalho Chehab 
Signed-off-by: Tony Luck

amd64_edac: Get rid of boot_cpu_data accesses

2013-08-12T14:01:56+00:00

Now that we cache (family, model, stepping) locally, use them instead of
boot_cpu_data.

No functionality change.

Signed-off-by: Borislav Petkov

amd64_edac: Add ECC decoding support for newer F15h models

2013-08-12T14:00:10+00:00

On newer models, support has been included for upto 4 DCT's, however,
only DCT0 and DCT3 are currently configured (cf BKDG Section 2.10).
Also, the routing DRAM Requests algorithm is different for F15h M30h.
Thus it is cleaner to use a brand new function rather than adding quirks
to the more generic f1x_match_to_this_node(). Refer to "2.10.5 DRAM
Routing Requests" in the BKDG for further info.

Tested on Fam15h M30h with ECC turned on using mce_amd_inj facility and
verified to be functionally correct.

While at it, verify if erratum workarounds for E505 and E637 still hold.
From email conversations within AMD, the current status of the errata
is:

      * Erratum 505: fixed in model 0x1, stepping 0x1 and later.
      * Erratum 637: not fixed.

Signed-off-by: Aravind Gopalakrishnan 
[ Cleanups, corrections ]
Signed-off-by: Borislav Petkov

amd64_edac: Add Family 16h support

2013-04-19T10:46:50+00:00

Add code to handle DRAM ECC errors decoding for Fam16h.

Tested on Fam16h with ECC turned on using the mce_amd_inj facility and
works fine.

Signed-off-by: Aravind Gopalakrishnan 
[ Boris: cleanups and clarifications ]
Signed-off-by: Borislav Petkov

amd64_edac: Fix type usage in NB IDs and memory ranges

2013-01-10T15:18:00+00:00

Use appropriate types for northbridge IDs and memory ranges. Mark
immutable data const and keep within compilation unit on related
structures.

Signed-off-by: Daniel J Blueman 
Link: http://lkml.kernel.org/r/1354265060-22956-2-git-send-email-daniel@numascale-asia.com
[Boris: Drop arg change to node_to_amd_nb]
Signed-off-by: Borislav Petkov

x86, AMD, NB: Add multi-domain support

2013-01-10T15:17:58+00:00

Fix get_node_id to match northbridge IDs from the array of detected
ones, allowing multi-server support such as with Numascale's
NumaConnect, renaming to 'amd_get_node_id' for consistency.

Signed-off-by: Daniel J Blueman 
Link: http://lkml.kernel.org/r/1353997932-8475-1-git-send-email-daniel@numascale-asia.com
[Boris: shorten lines to fit 80 cols]
Signed-off-by: Borislav Petkov

amd64_edac: Use DBAM_DIMM macro

2012-11-28T10:46:19+00:00

Instead of open-coding it, use the DBAM_DIMM macro in
amd64_csrow_nr_pages() which we have already.

Signed-off-by: Borislav Petkov

amd64_edac: Reorganize error reporting path

2012-11-28T10:45:34+00:00

Rewrite CE/UE paths so that they use the same code and drop additional
code duplication in handle_ue. Add a struct err_info which collects
required info for the error reporting. This, in turn, helps slimming all
edac_mc_handle_error() calls down to one.

Signed-off-by: Borislav Petkov

amd64_edac: Improve error injection

2012-11-28T10:45:01+00:00

When injecting DRAM ECC errors over the F3xB[8,C] interface, the machine
does this by injecting the error in the next non-cached access. This
takes relatively long time on a normal system so that in order for us to
expedite it, we disable the caches around the injection.

Signed-off-by: Borislav Petkov

amd64_edac: Cleanup error injection code

2012-11-28T10:44:35+00:00

Invert kstrtoul return value testing and win one indentation level.
Also, shorten up macro names so that the lines can fit into 80 cols. No
functional change.

Signed-off-by: Borislav Petkov