linux-toradex.git/drivers/edac/amd64_edac.h, branch v5.3-rc1

Revert "EDAC/amd64: Support more than two controllers for chip select handling"

2019-04-25T14:30:34+00:00

This reverts commit 0a227af521d6df5286550b62f4b591417170b4ea.

Unfortunately, this commit caused wrong detection of chip select sizes
on some F17h client machines:

  --- 00-rc6+     2019-02-14 14:28:03.126622904 +0100
  +++ 01-rc4+     2019-04-14 21:06:16.060614790 +0200
   EDAC amd64: MC: 0:     0MB 1:     0MB
  -EDAC amd64: MC: 2: 16383MB 3: 16383MB
  +EDAC amd64: MC: 2:     0MB 3: 2097151MB
   EDAC amd64: MC: 4:     0MB 5:     0MB
   EDAC amd64: MC: 6:     0MB 7:     0MB
   EDAC MC: UMC1 chip selects:
   EDAC amd64: MC: 0:     0MB 1:     0MB
  -EDAC amd64: MC: 2: 16383MB 3: 16383MB
  +EDAC amd64: MC: 2:     0MB 3: 2097151MB
   EDAC amd64: MC: 4:     0MB 5:     0MB
   EDAC amd64: MC: 6:     0MB 7:     0M

Revert it for now until it has been solved properly.

Signed-off-by: Borislav Petkov 
Cc: Yazen Ghannam

EDAC/amd64: Support more than two controllers for chip select handling

2019-03-26T23:13:25+00:00

The struct chip_select array that's used for saving chip select bases
and masks is fixed at length of two. There should be one struct
chip_select for each controller, so this array should be increased to
support systems that may have more than two controllers.

Increase the size of the struct chip_select array to eight, which is the
largest number of controllers per die currently supported on AMD
systems.

Also, carve out the Family 17h+ reading of the bases/masks into a
separate function. This effectively reverts the original bases/masks
reading code to before Family 17h support was added.

Signed-off-by: Yazen Ghannam 
Signed-off-by: Borislav Petkov 
Tested-by: Kim Phillips 
Cc: James Morse 
Cc: Mauro Carvalho Chehab 
Cc: linux-edac 
Link: https://lkml.kernel.org/r/20190228153558.127292-5-Yazen.Ghannam@amd.com

EDAC/amd64: Recognize x16 symbol size

2019-03-26T23:13:25+00:00

Future AMD systems may support x16 symbol sizes.

Recognize if a system is using x16 symbol size. Also, simplify the print
statement.

Note that a x16 syndrome vector table is not necessary like with x4 or
x8 syndromes. This is because systems that support x16 symbol sizes are
SMCA systems and in that case, the syndrome can be directly extracted
from the MCA_SYND[Syndrome] field.

 [ bp: massage. ]

Signed-off-by: Yazen Ghannam 
Signed-off-by: Borislav Petkov 
Tested-by: Kim Phillips 
Cc: James Morse 
Cc: Mauro Carvalho Chehab 
Cc: linux-edac 
Link: https://lkml.kernel.org/r/20190228153558.127292-4-Yazen.Ghannam@amd.com

EDAC/amd64: Support more than two Unified Memory Controllers

2019-03-26T23:13:25+00:00

The first few models of Family 17h all had 2 Unified Memory Controllers
per Die, so this was treated as a fixed value. However, future systems
may have more Unified Memory Controllers per Die.

Related to this, the channel number and base address of a Unified Memory
Controller were found by matching on fixed, known values. However,
current and future systems follow this pattern for the channel number
and base address of a Unified Memory Controller: 0xYXXXXX, where Y is
the channel number. So matching on hardcoded values is not necessary.

Set the number of Unified Memory Controllers at driver init time based
on the family/model. Also, update the functions that find the channel
number and base address of a Unified Memory Controller to support more
than two.

 [ bp: Move num_umcs into the .c file and simplify comment. ]

Signed-off-by: Yazen Ghannam 
Signed-off-by: Borislav Petkov 
Tested-by: Kim Phillips 
Cc: James Morse 
Cc: Mauro Carvalho Chehab 
Cc: linux-edac 
Link: https://lkml.kernel.org/r/20190228153558.127292-3-Yazen.Ghannam@amd.com

EDAC/amd64: Add Family 17h Model 30h PCI IDs

2019-03-26T23:13:25+00:00

Add the new Family 17h Model 30h PCI IDs to the AMD64 EDAC module.

This also fixes a probe failure that appeared when some other PCI IDs
for Family 17h Model 30h were added to the AMD NB code.

Fixes: be3518a16ef2 (x86/amd_nb: Add PCI device IDs for family 17h, model 30h)
Signed-off-by: Yazen Ghannam 
Signed-off-by: Borislav Petkov 
Tested-by: Kim Phillips 
Cc: James Morse 
Cc: Mauro Carvalho Chehab 
Cc: linux-edac 
Link: https://lkml.kernel.org/r/20190228153558.127292-1-Yazen.Ghannam@amd.com

EDAC, amd64: Add Family 17h, models 10h-2fh support

2018-08-27T04:17:21+00:00

Add new device IDs for family 17h, models 10h-2fh.

This is required by amd64_edac_mod in order to properly detect PCI
device functions 0 and 6.

Signed-off-by: Michael Jin 
Reviewed-by: Yazen Ghannam 
Cc: 
Link: http://lkml.kernel.org/r/20180816192840.31166-1-mikhail.jin@gmail.com
Signed-off-by: Borislav Petkov

EDAC, amd64: Bump driver version

2017-02-14T10:58:05+00:00

Last time we did that was when we enabled Bulldozer. Now, we enabled Zen
so it is only natural ... :-)

Signed-off-by: Borislav Petkov 
Cc: Yazen Ghannam

EDAC, amd64: Add x86cpuid sanity check during init

2017-01-28T13:43:06+00:00

Match one of the devices in amd64_cpuids[] before loading the module.
This is an additional sanity check against users trying to load
amd64_edac_mod on unsupported systems.

Signed-off-by: Yazen Ghannam 
Cc: linux-edac 
Link: http://lkml.kernel.org/r/1485537863-2707-9-git-send-email-Yazen.Ghannam@amd.com
[ Get rid of err_ret label, make it a bit more readable this way. ]
Signed-off-by: Borislav Petkov

EDAC, amd64: Remove unused printing macros

2017-01-28T12:20:06+00:00

amd64_{debug,notice} don't have any users, so remove them.

Signed-off-by: Yazen Ghannam 
Cc: linux-edac 
Link: http://lkml.kernel.org/r/1485537863-2707-6-git-send-email-Yazen.Ghannam@amd.com
Signed-off-by: Borislav Petkov

edac: rename edac_core.h to edac_mc.h

2016-12-15T10:54:51+00:00

Now, all left at edac_core.h are at drivers/edac/edac_mc.c,
so rename it to edac_mc.h.

Signed-off-by: Mauro Carvalho Chehab