linux-toradex.git/drivers/edac/pnd2_edac.c, branch v5.18-rc5

EDAC/Intel: Do not load EDAC driver when running as a guest

2021-06-18T01:23:14+00:00

There's little to no point in loading an EDAC driver running in a guest:
1) The CPU model reported by CPUID may not represent actual h/w
2) The hypervisor likely does not pass in access to memory controller devices
3) Hypervisors generally do not pass corrected error details to guests

Add a check in each of the Intel EDAC drivers for X86_FEATURE_HYPERVISOR
and simply return -ENODEV in the init routine.

Acked-by: Borislav Petkov 
Signed-off-by: Tony Luck 
Link: https://lore.kernel.org/r/20210615174419.GA1087688@agluck-desk2.amr.corp.intel.com

treewide: Use fallthrough pseudo-keyword

2020-08-23T22:36:59+00:00

Replace the existing /* fall through */ comments and its variants with
the new pseudo-keyword macro fallthrough[1]. Also, remove unnecessary
fall-through markings when it is the case.

[1] https://www.kernel.org/doc/html/v5.7/process/deprecated.html?highlight=fallthrough#implicit-switch-case-fall-through

Signed-off-by: Gustavo A. R. Silva

EDAC/{i7core,sb,pnd2,skx}: Fix error event severity

2020-08-18T13:40:30+00:00

IA32_MCG_STATUS.RIPV indicates whether the return RIP value pushed onto
the stack as part of machine check delivery is valid or not.

Various drivers copied a code fragment that uses the RIPV bit to
determine the severity of the error as either HW_EVENT_ERR_UNCORRECTED
or HW_EVENT_ERR_FATAL, but this check is reversed (marking errors where
RIPV is set as "FATAL").

Reverse the tests so that the error is marked fatal when RIPV is not set.

Reported-by: Gabriele Paoloni 
Signed-off-by: Tony Luck 
Signed-off-by: Borislav Petkov 
Cc: 
Link: https://lkml.kernel.org/r/20200707194324.14884-1-tony.luck@intel.com

EDAC, pnd2: Set MCE_PRIO_EDAC priority for pnd2_mce_dec notifier

2020-06-15T18:19:39+00:00

Avoid giving it MCE_PRIO_LOWEST priority by default.

Signed-off-by: Zhenzhong Duan 
Signed-off-by: Tony Luck 
Link: https://lore.kernel.org/r/20200610065846.3626-1-zhenzhong.duan@gmail.com

EDAC: Drop the EDAC report status checks

2020-04-14T14:01:01+00:00

When acpi_extlog was added, we were worried that the same error would
be reported more than once by different subsystems. But in the ensuing
years I've seen complaints that people could not find an error log
(because this mechanism suppressed the log they were looking for).

Rip it all out. People are smart enough to notice the same address from
different reporting mechanisms.

Signed-off-by: Tony Luck 
Signed-off-by: Borislav Petkov 
Tested-by: Tony Luck 
Link: https://lkml.kernel.org/r/20200214222720.13168-8-tony.luck@intel.com

x86/mce: Fix all mce notifiers to update the mce->kflags bitmask

2020-04-14T13:59:26+00:00

If the handler took any action to log or deal with the error, set a bit
in mce->kflags so that the default handler on the end of the machine
check chain can see what has been done.

Get rid of NOTIFY_STOP returns. Make the EDAC and dev-mcelog handlers
skip over errors already processed by CEC.

Signed-off-by: Tony Luck 
Signed-off-by: Borislav Petkov 
Tested-by: Tony Luck 
Link: https://lkml.kernel.org/r/20200214222720.13168-5-tony.luck@intel.com

EDAC: Convert to new X86 CPU match macros

2020-03-24T20:32:28+00:00

The new macro set has a consistent namespace and uses C99 initializers
instead of the grufty C89 ones.

Signed-off-by: Thomas Gleixner 
Signed-off-by: Borislav Petkov 
Reviewed-by: Greg Kroah-Hartman 
Acked-by: Tony Luck 
Link: https://lkml.kernel.org/r/20200320131509.673579000@linutronix.de

EDAC: Replace EDAC_DIMM_PTR() macro with edac_get_dimm() function

2019-11-09T09:32:32+00:00

The EDAC_DIMM_PTR() macro takes 3 arguments from struct mem_ctl_info.
Clean up this interface to only pass the mci struct and replace this
macro with a new function edac_get_dimm().

Also introduce an edac_get_dimm_by_index() function for later use.
This allows it to get a DIMM pointer only by a given index. This can
be useful if the DIMM's position within the layers of the memory
controller or the exact size of the layers are unknown.

Small style changes made for some hunks after applying the semantic
patch.

Semantic patch used:

@@ expression mci, a, b,c; @@

-EDAC_DIMM_PTR(mci->layers, mci->dimms, mci->n_layers, a, b, c)
+edac_get_dimm(mci, a, b, c)

 [ bp: Touchups. ]

Signed-off-by: Robert Richter 
Signed-off-by: Borislav Petkov 
Reviewed-by: Mauro Carvalho Chehab 
Cc: "linux-edac@vger.kernel.org" 
Cc: James Morse 
Cc: Jason Baron 
Cc: Qiuxu Zhuo 
Cc: Tero Kristo 
Cc: Tony Luck 
Link: https://lkml.kernel.org/r/20191106093239.25517-2-rrichter@marvell.com

Merge branch 'x86-cpu-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip

2019-09-17T01:47:53+00:00

Pull x86 cpu-feature updates from Ingo Molnar:

 - Rework the Intel model names symbols/macros, which were decades of
   ad-hoc extensions and added random noise. It's now a coherent, easy
   to follow nomenclature.

 - Add new Intel CPU model IDs:
    - "Tiger Lake" desktop and mobile models
    - "Elkhart Lake" model ID
    - and the "Lightning Mountain" variant of Airmont, plus support code

 - Add the new AVX512_VP2INTERSECT instruction to cpufeatures

 - Remove Intel MPX user-visible APIs and the self-tests, because the
   toolchain (gcc) is not supporting it going forward. This is the
   first, lowest-risk phase of MPX removal.

 - Remove X86_FEATURE_MFENCE_RDTSC

 - Various smaller cleanups and fixes

* 'x86-cpu-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (25 commits)
  x86/cpu: Update init data for new Airmont CPU model
  x86/cpu: Add new Airmont variant to Intel family
  x86/cpu: Add Elkhart Lake to Intel family
  x86/cpu: Add Tiger Lake to Intel family
  x86: Correct misc typos
  x86/intel: Add common OPTDIFFs
  x86/intel: Aggregate microserver naming
  x86/intel: Aggregate big core graphics naming
  x86/intel: Aggregate big core mobile naming
  x86/intel: Aggregate big core client naming
  x86/cpufeature: Explain the macro duplication
  x86/ftrace: Remove mcount() declaration
  x86/PCI: Remove superfluous returns from void functions
  x86/msr-index: Move AMD MSRs where they belong
  x86/cpu: Use constant definitions for CPU models
  lib: Remove redundant ftrace flag removal
  x86/crash: Remove unnecessary comparison
  x86/bitops: Use __builtin_constant_p() directly instead of IS_IMMEDIATE()
  x86: Remove X86_FEATURE_MFENCE_RDTSC
  x86/mpx: Remove MPX APIs
  ...

x86/intel: Aggregate microserver naming

2019-08-28T09:29:32+00:00

Currently big microservers have _XEON_D while small microservers have
_X, Make it uniformly: _D.

for i in `git grep -l "\(INTEL_FAM6_\|VULNWL_INTEL\|INTEL_CPU_FAM6\).*_\(X\|XEON_D\)"`
do
	sed -i -e 's/\(\(INTEL_FAM6_\|VULNWL_INTEL\|INTEL_CPU_FAM6\).*ATOM.*\)_X/\1_D/g' \
	       -e 's/\(\(INTEL_FAM6_\|VULNWL_INTEL\|INTEL_CPU_FAM6\).*\)_XEON_D/\1_D/g' ${i}
done

Signed-off-by: Peter Zijlstra (Intel) 
Reviewed-by: Tony Luck 
Cc: x86@kernel.org
Cc: Dave Hansen 
Cc: Thomas Gleixner 
Cc: Borislav Petkov 
Link: https://lkml.kernel.org/r/20190827195122.677152989@infradead.org