linux-toradex.git/drivers/fpga/dfl.h, branch v5.13-rc3

fpga: dfl: move dfl bus related APIs to include/linux/dfl.h

2021-01-07T14:21:27+00:00

Now the dfl drivers could be made as independent modules and put in
different folders according to their functionalities. In order for
scattered dfl device drivers to include dfl bus APIs, move the
dfl bus APIs to a new header file in the public folder.

[mdf@kernel.org: Fixed up header guards to match filename]

Reviewed-by: Tom Rix 
Acked-by: Wu Hao 
Signed-off-by: Xu Yilun 
Signed-off-by: Moritz Fischer 
Link: https://lore.kernel.org/r/20210107043714.991646-7-mdf@kernel.org
Signed-off-by: Greg Kroah-Hartman

fpga: dfl: move dfl_device_id to mod_devicetable.h

2021-01-07T14:21:27+00:00

In order to support MODULE_DEVICE_TABLE() for dfl device driver, this
patch moves struct dfl_device_id to mod_devicetable.h

Some brief description for DFL (Device Feature List) is added to make
the DFL known to the whole kernel.

Reviewed-by: Tom Rix 
Acked-by: Wu Hao 
Signed-off-by: Xu Yilun 
Signed-off-by: Wu Hao 
Signed-off-by: Matthew Gerlach 
Signed-off-by: Russ Weight 
Signed-off-by: Moritz Fischer 
Link: https://lore.kernel.org/r/20210107043714.991646-5-mdf@kernel.org
Signed-off-by: Greg Kroah-Hartman

fpga: dfl: fix the definitions of type & feature_id for dfl devices

2021-01-07T14:21:27+00:00

The value of the field dfl_device.type comes from the 12 bits register
field DFH_ID according to DFL spec. So this patch changes the definition
of the type field to u16.

Also it is not necessary to illustrate the valid bits of the type field
in comments. Instead we should explicitly define the possible values in
the enumeration type for it, because they are shared by hardware spec.
We should not let the compiler decide these values.

Similar changes are also applied to dfl_device.feature_id.

This patch also fixed the MODALIAS format according to the changes
above.

Reviewed-by: Tom Rix 
Signed-off-by: Xu Yilun 
Signed-off-by: Moritz Fischer 
Link: https://lore.kernel.org/r/20210107043714.991646-4-mdf@kernel.org
Signed-off-by: Greg Kroah-Hartman

fpga: dfl: create a dfl bus type to support DFL devices

2020-09-10T03:28:16+00:00

A new bus type "dfl" is introduced for private features which are not
initialized by DFL feature drivers (dfl-fme & dfl-afu drivers). So these
private features could be handled by separate driver modules.

DFL feature drivers (dfl-fme, dfl-port) will create DFL devices on
enumeration. DFL drivers could be registered on this bus to match these
DFL devices. They are matched by dfl type & feature_id.

[mdf@kernel.org: Add missing Documentation part to MAINTAINERS file]

Signed-off-by: Xu Yilun 
Signed-off-by: Wu Hao 
Signed-off-by: Matthew Gerlach 
Signed-off-by: Russ Weight 
Reviewed-by: Tom Rix 
Acked-by: Wu Hao 
Signed-off-by: Moritz Fischer

fpga: dfl: map feature mmio resources in their own feature drivers

2020-08-31T00:15:58+00:00

This patch makes preparation for modularization of DFL sub feature
drivers.

DFL based FPGA devices may contain some IP blocks which are already
supported by kernel, most of them are supported by platform device
drivers. We could create platform devices for these IP blocks and get them
supported by these drivers.

An important issue is that platform device drivers usually requests mmio
resources on probe. But now DFL mmio is mapped in DFL bus driver (e.g.
dfl-pci) as a whole region. Then platform device drivers for sub features
can't request their own mmio resources again. This is what the patch
trying to resolve.

This patch changes the DFL enumeration. DFL bus driver will unmap mmio
resources after first step enumeration and pass enumeration info to DFL
framework. Then DFL framework will map the mmio resources again, do 2nd
step enumeration, and also unmap the mmio resources. In this way, sub
feature drivers could then request their own mmio resources as needed.

An exception is that mmio resource of FIU headers are still mapped in DFL
bus driver. The FIU headers have some fundamental functions (sriov set,
port enable/disable) needed for DFL bus devices and other sub features.
They should not be unmapped as long as DFL bus device is alive.

Signed-off-by: Xu Yilun 
Signed-off-by: Wu Hao 
Signed-off-by: Matthew Gerlach 
Signed-off-by: Russ Weight 
Reviewed-by: Tom Rix 
Acked-by: Wu Hao 
Signed-off-by: Moritz Fischer

fpga: dfl: change data type of feature id to u16

2020-08-20T04:05:47+00:00

The feature id is stored in a 12 bit field in DFH. So a u16 variable is
enough for feature id.

This patch changes all feature id related places to fit u16.

Signed-off-by: Xu Yilun 
Reviewed-by: Tom Rix 
Acked-by: Wu Hao 
Signed-off-by: Moritz Fischer

fpga: dfl: introduce interrupt trigger setting API

2020-06-28T19:43:16+00:00

FPGA user applications may be interested in interrupts generated by
DFL features. For example, users can implement their own FPGA
logics with interrupts enabled in AFU (Accelerated Function Unit,
dynamic region of DFL based FPGA). So user applications need to be
notified to handle these interrupts.

In order to allow userspace applications to monitor interrupts,
driver requires userspace to provide eventfds as interrupt
notification channels. Applications then poll/select on the eventfds
to get notified.

This patch introduces a generic helper functions to do eventfds binding
with given interrupts.

Sub feature drivers are expected to use XXX_GET_IRQ_NUM to query irq
info, and XXX_SET_IRQ to set eventfds for interrupts. This patch also
introduces helper functions for these 2 ioctls.

Signed-off-by: Luwei Kang 
Signed-off-by: Wu Hao 
Signed-off-by: Xu Yilun 
Signed-off-by: Tom Rix 
Reviewed-by: Marcelo Tosatti 
Acked-by: Wu Hao 
Signed-off-by: Moritz Fischer

fpga: dfl: parse interrupt info for feature devices on enumeration

2020-06-28T19:42:29+00:00

DFL based FPGA devices could support interrupts for different purposes,
but current DFL framework only supports feature device enumeration with
given MMIO resources information via common DFL headers. This patch
introduces one new API dfl_fpga_enum_info_add_irq for low level bus
drivers (e.g. PCIe device driver) to pass its interrupt resources
information to DFL framework for enumeration, and also adds interrupt
enumeration code in framework to parse and assign interrupt resources
for enumerated feature devices and their own sub features.

With this patch, DFL framework enumerates interrupt resources for core
features, including PORT Error Reporting, FME (FPGA Management Engine)
Error Reporting and also AFU User Interrupts.

Signed-off-by: Luwei Kang 
Signed-off-by: Wu Hao 
Signed-off-by: Xu Yilun 
Reviewed-by: Marcelo Tosatti 
Acked-by: Wu Hao 
Signed-off-by: Moritz Fischer

fpga: dfl: Use struct_size() in kzalloc()

2020-06-19T01:22:12+00:00

Make use of the struct_size() helper instead of an open-coded version
in order to avoid any potential type mistakes. Also, remove unnecessary
function dfl_feature_platform_data_size().

This code was detected with the help of Coccinelle and, audited and
fixed manually.

Signed-off-by: Gustavo A. R. Silva 
Signed-off-by: Moritz Fischer

Merge tag 'fpga-for-5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/mdf/linux-fpga into char-misc-next

2020-05-15T14:09:24+00:00

Moritz writes:

FPGA Manager changes for 5.8

Here's the first set of changes for the 5.8-rc1 merge window.

Dominic's change adds support for accessing AFU regions with gdb.
Gustavo's change is a cleanup patch regarding variable lenght arrays.
Richard's changes update dt-bindings and add support for stratix and agilex.
Sergiu's changes update spi transfers with the new delay field.
Xu's change addresses an issue with a wrong return value.
Shubhrajyoti's change makes the Zynq FPGA driver return -EPROBE_DEFER on
check of devm_clk_get failure.
Xu's change for DFL enables multiple opens.

All of these patches have been reviewed, have appropriate Acked-by's and
have been in the last few linux-next releases without issues.

Signed-off-by: Moritz Fischer 

* tag 'fpga-for-5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/mdf/linux-fpga:
  fpga: dfl: afu: support debug access to memory-mapped afu regions
  fpga: dfl.h: Replace zero-length array with flexible-array member
  arm64: dts: agilex: correct service layer driver's compatible value
  dt-bindings, firmware: add compatible value Intel Stratix10 service layer binding
  fpga: stratix10-soc: add compatible property value for intel agilex
  arm64: dts: agilex: correct FPGA manager driver's compatible value
  dt-bindings: fpga: add compatible value to Stratix10 SoC FPGA manager binding
  fpga: machxo2-spi: Use new structure for SPI transfer delays
  fpga: ice40-spi: Use new structure for SPI transfer delays
  fpga: dfl: support multiple opens on feature device node.