linux-toradex.git/drivers/fpga, branch v4.17

fpga-manager: altera-ps-spi: preserve nCONFIG state

2018-04-23T11:27:05+00:00

If the driver module is loaded when FPGA is configured, the FPGA
is reset because nconfig is pulled low (low-active gpio inited
with GPIOD_OUT_HIGH activates the signal which means setting its
value to low). Init nconfig with GPIOD_OUT_LOW to prevent this.

Signed-off-by: Anatolij Gustschin 
Acked-by: Alan Tull 
Signed-off-by: Moritz Fischer 
Cc: stable  # 4.14+
Signed-off-by: Greg Kroah-Hartman

PCI: Add Altera vendor ID

2018-03-14T18:13:47+00:00

Add the Altera PCI Vendor id to pci_ids.h and remove the private
definitions from xillybus_pcie.c and altera-cvp.c.

Signed-off-by: Johannes Thumshirn 
Cc: Bjorn Helgaas 
Cc: Eli Billauer 
Cc: Anatolij Gustschin 
Acked-by: Eli Billauer 
Acked-by: Bjorn Helgaas 
Reviewed-by: Andy Shevchenko 
Signed-off-by: Greg Kroah-Hartman

fpga: socfpga-a10: disable clk on error in socfpga_a10_fpga_probe()

2017-12-18T14:59:16+00:00

If fpga_mgr_register() fails, a clock is left undisabled.

Found by Linux Driver Verification project (linuxtesting.org).

Signed-off-by: Alexey Khoroshilov 
Reviewed-by: Moritz Fischer 
Signed-off-by: Alan Tull 
Signed-off-by: Greg Kroah-Hartman

fpga: region: release of_parse_phandle nodes after use

2017-11-28T15:31:27+00:00

Both fpga_region_get_manager() and fpga_region_get_bridges() call
of_parse_phandle(), but nothing calls of_node_put() on the returned
struct device_node pointers.  Make sure to do that to stop their
reference counters getting out of whack.

Fixes: 0fa20cdfcc1f ("fpga: fpga-region: device tree control for FPGA")
Cc:  # 4.10+
Signed-off-by: Ian Abbott 
Signed-off-by: Alan Tull 
Signed-off-by: Greg Kroah-Hartman

fpga: fpga-bridge: remove unnecessary null check in of_fpga_bridge_get

2017-11-28T15:31:27+00:00

Notice that bridge = to_fpga_bridge(dev); expands to:

bridge = container_of(dev, struct fpga_bridge, dev);

and container_of is never null, so this null check is
unnecessary.

Addresses-Coverity-ID: 1397912
Reported-by: Alan Tull 
Signed-off-by: Gustavo A. R. Silva 
Reviewed-by: Moritz Fischer 
Signed-off-by: Alan Tull 
Signed-off-by: Greg Kroah-Hartman

fpga: fpga-mgr: remove unnecessary code in __fpga_mgr_get

2017-11-28T15:31:27+00:00

Notice that mgr = to_fpga_manager(dev); expands to:

mgr = container_of(dev, struct fpga_manager, dev);

and container_of is never null, so this null check is
unnecessary.

Addresses-Coverity-ID: 1397916
Signed-off-by: Gustavo A. R. Silva 
Signed-off-by: Alan Tull 
Signed-off-by: Greg Kroah-Hartman

fpga: add attribute groups

2017-11-28T15:30:38+00:00

Make it easy to add attributes to low level FPGA drivers the right
way.  Add attribute groups pointers to structures that are used when
registering a manager, bridge, or group.  When the low level driver
registers, set the device attribute group.  The attributes are
created in device_add.

Signed-off-by: Alan Tull 
Acked-by: Moritz Fischer 
Signed-off-by: Greg Kroah-Hartman

fpga: clean up fpga Kconfig

2017-11-28T15:30:38+00:00

The fpga menuconfig has gotten messy.  The bridges and managers are
mixed together.

* Separate the bridges and things dependent on CONFIG_FPGA_BRIDGE
  from the managers.
* Group the managers by vendor in order that they were added
  to the kernel.

The following is what the menuconfig ends up looking like more or less
(platform dependencies are hiding some of these on any given
platform).

    --- FPGA Configuration Framework
    <*>   Altera SOCFPGA FPGA Manager
    <*>   Altera SoCFPGA Arria10
    <*>   Altera Partial Reconfiguration IP Core
    <*>     Platform support of Altera Partial Reconfiguration IP Core
    <*>   Altera FPGA Passive Serial over SPI
    <*>   Altera Arria-V/Cyclone-V/Stratix-V CvP FPGA Manager
    <*>   Xilinx Zynq FPGA
    <*>   Xilinx Configuration over Slave Serial (SPI)
    <*>   Lattice iCE40 SPI
    <*>   Technologic Systems TS-73xx SBC FPGA Manager
    <*>   FPGA Bridge Framework
    <*>     Altera SoCFPGA FPGA Bridges
    <*>     Altera FPGA Freeze Bridge
    <*>     Xilinx LogiCORE PR Decoupler
    <*>     FPGA Region
    <*>       FPGA Region Device Tree Overlay Support

Signed-off-by: Alan Tull 
Acked-by: Moritz Fischer 
Signed-off-by: Greg Kroah-Hartman

fpga: of-fpga-region: accept overlays that don't program FPGA

2017-11-28T15:30:38+00:00

The FPGA may already have a static image programmed when
Linux boots.  In that case a DT overlay may be used to add
the devices that already exist.  This commit allows that
by shuffling the order of some checks.

Signed-off-by: Alan Tull 
Acked-by: Moritz Fischer 
Signed-off-by: Greg Kroah-Hartman

fpga: region: move device tree support to of-fpga-region.c

2017-11-28T15:30:38+00:00

Create of-fpga-region.c and move the following functions without
modification from fpga-region.c.

* of_fpga_region_find
* of_fpga_region_get_mgr
* of_fpga_region_get_bridges
* child_regions_with_firmware
* of_fpga_region_parse_ov
* of_fpga_region_notify_pre_apply
* of_fpga_region_notify_post_remove
* of_fpga_region_notify
* of_fpga_region_probe
* of_fpga_region_remove

Create two new functions with some code from fpga_region_init/exit.

* of_fpga_region_init
* of_fpga_region_exit

Signed-off-by: Alan Tull 
Acked-by: Moritz Fischer 
Signed-off-by: Greg Kroah-Hartman