Adds a new driver for Altera soft GPIO IP. The driver is able to do
read/write and allows GPIO to be a interrupt controller.
Tested on Altera GHRD on interrupt handling and IO.
v10:
- Updated conflicting device tree parameters
- Removed unused headers
- Used macro instead of magic numbers for ngpio
- Code readability cleanup using ?: and temporal variables
- Removed leftover garbage and unnecessary function calls
- Checked bgpio_init but unusable because Altera GPIO may not
be a multiple of 8 bits
v9:
- Removed duplicated initialization on set_type using temporals
to improve code readability in calling generic_handle_irq
- Using ?: ternary to reduce code size
v8:
- Using for_each_set_bit
- Added const for struct definition
- Removed naggy pr_err
- Sort alpha header
- Remove unused macros
- Use fixed width data types instead of unsigned long
- Whitespace issue fixes
- Removed _relaxed function for better compatibility across different
CPU
- Changed irq_create_mapping to platform_get_irq updated implementation
to use gpiochip_irqchip_add
- Reserve interrupt-cells number 2 in device tree binding for future
use
- Remove confusing sections on devicetree bindings
- Added tristate Kconfig help text
v7:
- Used dev_warn instead of pr_warn
- Clean up unnecesarry if else indentation
v6:
- Added irq_startup and irq_shutdown
- Changed bitwise clamping style
- Cleanup bitwise operation to improve readability change naming of
mapped irqs from virq to mapped_irq
v5:
- Dispose irq_domain mapping correctly
- Update optional binding description in binding docs
v4:
- Added vendor prefix to devicetree binding for IP specific properties
using MMIO GPIO helper library instead of manually map PIO to memory
- altera_gpio_chip inline struct documentation to kerneldoc
- Using dev_ print to print a better failure message
v2, v3:
- Do not reference NO_IRQ
- Updated irq_set_type to only allow the hardware configured irq type
Signed-off-by: Tien Hock Loh <thloh@altera.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>