linux-toradex.git/drivers/gpio/gpio-octeon.c, branch v3.18.3 Linux kernel for Apalis and Colibri modules gpio: remove all usage of gpio_remove retval in driver/gpio 2014-07-22T14:39:26+00:00 abdoulaye berthe berthe.ab@gmail.com 2014-07-12T20:30:12+00:00 9f5132ae82fdbb047cc187bf689a81c8cc0de7fa Signed-off-by: abdoulaye berthe <berthe.ab@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> 
Signed-off-by: abdoulaye berthe <berthe.ab@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
gpio/pinctrl: make gpio_chip members typed boolean 2013-12-04T13:42:46+00:00 Linus Walleij linus.walleij@linaro.org 2013-12-04T13:42:46+00:00 9fb1f39eb2d6707d265087ee186376e24995f55a This switches the two members of struct gpio_chip that were defined as unsigned foo:1 to bool, because that is indeed what they are. Switch all users in the gpio and pinctrl subsystems to assign these values with true/false instead of 0/1. The users outside these subsystems will survive since true/false is 1/0, atleast we set some kind of more strict typing example. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> 
This switches the two members of struct gpio_chip that were
defined as unsigned foo:1 to bool, because that is indeed what
they are. Switch all users in the gpio and pinctrl subsystems
to assign these values with true/false instead of 0/1. The
users outside these subsystems will survive since true/false
is 1/0, atleast we set some kind of more strict typing example.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
gpio MIPS/OCTEON: Add a driver for OCTEON's on-chip GPIO pins. 2013-08-26T13:33:40+00:00 David Daney david.daney@cavium.com 2013-07-29T21:29:10+00:00 aca58a662067606e6020e1d42ced1b88cab65ca1 The SOCs in the OCTEON family have 16 (or in some cases 20) on-chip GPIO pins, this driver handles them all. Configuring the pins as interrupt sources is handled elsewhere (OCTEON's irq handling code). Signed-off-by: David Daney <david.daney@cavium.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Cc: linux-gpio@vger.kernel.org Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/5633/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org> 
The SOCs in the OCTEON family have 16 (or in some cases 20) on-chip
GPIO pins, this driver handles them all.  Configuring the pins as
interrupt sources is handled elsewhere (OCTEON's irq handling code).

Signed-off-by: David Daney <david.daney@cavium.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Cc: linux-gpio@vger.kernel.org
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/5633/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>