linux-toradex.git/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h, branch v5.5-rc7 Linux kernel for Apalis and Colibri modules drm/amd/amdgpu/vcn_v2_0: Mark RB commands as KMD commands 2019-07-31T04:48:32+00:00 Thong Thai thong.thai@amd.com 2019-07-25T15:21:58+00:00 333fe325febabe3df2bc3019d4b97f879d8cef73 Sets the CMD_SOURCE bit for VCN 2.0 Decoder Ring Buffer commands. This bit was previously set by the RBC HW on older firmware. Newer firmware uses a SW RBC and this bit has to be set by the driver. Signed-off-by: Thong Thai <thong.thai@amd.com> Reviewed-by: Leo Liu <leo.liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 
Sets the CMD_SOURCE bit for VCN 2.0 Decoder Ring Buffer commands. This
bit was previously set by the RBC HW on older firmware. Newer firmware
uses a SW RBC and this bit has to be set by the driver.

Signed-off-by: Thong Thai <thong.thai@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: add harvest support for Arcturus 2019-07-18T19:18:06+00:00 James Zhu James.Zhu@amd.com 2019-07-10T17:07:29+00:00 cd1fd7b3818a5724374ff80d9a13a4243b7b9df6 Add VCN harvest support for Arcturus Signed-off-by: James Zhu <James.Zhu@amd.com> Reviewed-by: Leo Liu <leo.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 
Add VCN harvest support for Arcturus

Signed-off-by: James Zhu <James.Zhu@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: modify amdgpu_vcn to support multiple instances 2019-07-18T19:18:05+00:00 James Zhu James.Zhu@amd.com 2019-07-10T15:53:34+00:00 c01b6a1d38675652199d12b898c1c23b96b5055f Arcturus has dual-VCN. Need Restruct amdgpu_device::vcn to support multiple vcns. There are no any logical changes here Signed-off-by: James Zhu <James.Zhu@amd.com> Reviewed-by: Leo Liu <leo.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 
Arcturus has dual-VCN. Need Restruct amdgpu_device::vcn to support
multiple vcns. There are no any logical changes here

Signed-off-by: James Zhu <James.Zhu@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu/VCN2: put IB internal registers offset to structure 2019-07-18T19:18:04+00:00 Leo Liu leo.liu@amd.com 2019-04-15T13:39:06+00:00 22a8f442866bf539c7a659923155d9afa03d77bb So the ring functions can be shared with different VCN versions with different internal registers offsets Signed-off-by: Leo Liu <leo.liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 
So the ring functions can be shared with different VCN versions
with different internal registers offsets

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu/VCN: implement indirect DPG SRAM mode 2019-06-21T23:59:33+00:00 Leo Liu leo.liu@amd.com 2019-05-27T14:46:25+00:00 dc8ae677c2a03891149a743fe50931bae4c506c5 SRAM will be programmed by PSP Signed-off-by: Leo Liu <leo.liu@amd.com> Reviewed-by: James Zhu <James.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 
SRAM will be programmed by PSP

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: James Zhu <James.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu/VCN: add buffer for indirect SRAM usage 2019-06-21T23:59:33+00:00 Leo Liu leo.liu@amd.com 2019-05-24T18:07:41+00:00 a77b9fdf9aca3d9d8955487e95cd1e884b45fe1a This will be used later for indirect SRAM mode Signed-off-by: Leo Liu <leo.liu@amd.com> Reviewed-by: James Zhu <James.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 
This will be used later for indirect SRAM mode

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: James Zhu <James.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu/VCN2.0: add direct SRAM read and write 2019-06-21T23:59:32+00:00 Leo Liu leo.liu@amd.com 2019-05-24T16:19:00+00:00 19c663fc7799035f39f9833a2e3d82a2ed27b1e5 This will be the basic and used for DPG mode Signed-off-by: Leo Liu <leo.liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: James Zhu <James.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 
This will be the basic and used for DPG mode

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: James Zhu <James.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu/VCN2.0: remove powergating for UVDW tile 2019-06-21T23:59:28+00:00 Leo Liu leo.liu@amd.com 2019-04-30T14:15:38+00:00 863dd269fa413ab8366cc42c8c2baade6f96de6e No UVDW tile any more from VCN2.0, so mark out related fields. It fixes error: "[drm] Register(0) [mmUVD_PGFSM_STATUS] failed to reach value 0x002aaaaa != 0x00aaaaaa" Signed-off-by: Leo Liu <leo.liu@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 
No UVDW tile any more from VCN2.0, so mark out related fields.

It fixes error:
"[drm] Register(0) [mmUVD_PGFSM_STATUS] failed to reach value 0x002aaaaa != 0x00aaaaaa"

Signed-off-by: Leo Liu <leo.liu@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: add initial VCN2.0 support (v2) 2019-06-21T23:58:22+00:00 Leo Liu leo.liu@amd.com 2018-10-15T15:38:59+00:00 1b61de45dfaff00b627e47349a019658e39268b9 VCN (Video Core Next) is the video encode/decode block. Porting over the same functions from VCN1.0 v2: squash in updates (Alex) Signed-off-by: Leo Liu <leo.liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: James Zhu <James.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 
VCN (Video Core Next) is the video encode/decode block.

Porting over the same functions from VCN1.0

v2: squash in updates (Alex)

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: James Zhu <James.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: add JPEG2.0 decode ring test 2019-06-21T23:58:22+00:00 Leo Liu leo.liu@amd.com 2018-12-03T16:42:28+00:00 9085914a5af4b3078a0289c4d67ee7cbc45dac99 Use register from JPEG tile, the UVD tile reg won't work for JPEG Signed-off-by: Leo Liu <leo.liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 
Use register from JPEG tile, the UVD tile reg won't work for JPEG

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>