linux-toradex.git/drivers/gpu/drm/amd/amdgpu/soc15d.h, branch v4.20 Linux kernel for Apalis and Colibri modules drm/amdgpu: add jpeg packet defines to soc15d.h 2018-06-15T17:20:34+00:00 Boyuan Zhang boyuan.zhang@amd.com 2018-04-30T20:51:33+00:00 d521093a5f84cacf9935e8c9834ad3054b423ee1 Add new packet for vcn jpeg, including condition checks, types and packet Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 
Add new packet for vcn jpeg, including condition checks, types and packet

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Merge branch 'drm-next-4.18' of git://people.freedesktop.org/~agd5f/linux into drm-next 2018-05-15T22:31:29+00:00 Dave Airlie airlied@redhat.com 2018-05-15T22:21:51+00:00 95d2c3e15da613afd53b4b8f2cdb352dc7d12221 Main changes for 4.18. I'd like to do a separate pull for vega20 later this week or next. Highlights: - Reserve pre-OS scanout buffer during init for seemless transition from console to driver - VEGAM support - Improved GPU scheduler documentation - Initial gfxoff support for raven - SR-IOV fixes - Default to non-AGP on PowerPC for radeon - Fine grained clock voltage control for vega10 - Power profiles for vega10 - Further clean up of powerplay/driver interface - Underlay fixes - Display link bw updates - Gamma fixes - Scatter/Gather display support on CZ/ST - Misc bug fixes and clean ups [airlied: fixup v3d vs scheduler API change] Link: https://patchwork.freedesktop.org/patch/msgid/20180515185450.1113-1-alexander.deucher@amd.com Signed-off-by: Dave Airlie <airlied@redhat.com> 
Main changes for 4.18.  I'd like to do a separate pull for vega20 later
this week or next.  Highlights:
- Reserve pre-OS scanout buffer during init for seemless transition from
  console to driver
- VEGAM support
- Improved GPU scheduler documentation
- Initial gfxoff support for raven
- SR-IOV fixes
- Default to non-AGP on PowerPC for radeon
- Fine grained clock voltage control for vega10
- Power profiles for vega10
- Further clean up of powerplay/driver interface
- Underlay fixes
- Display link bw updates
- Gamma fixes
- Scatter/Gather display support on CZ/ST
- Misc bug fixes and clean ups

[airlied: fixup v3d vs scheduler API change]

Link: https://patchwork.freedesktop.org/patch/msgid/20180515185450.1113-1-alexander.deucher@amd.com
Signed-off-by: Dave Airlie <airlied@redhat.com>
drm/amdgpu: optionally do a writeback but don't invalidate TC for IB fences 2018-05-15T18:43:32+00:00 Marek Olšák marek.olsak@amd.com 2018-04-03T17:05:03+00:00 d240cd9eddd943dbe0267d081697195ff1e90b65 There is a new IB flag that enables this new behavior. Full invalidation is unnecessary for RELEASE_MEM and doesn't make sense when draw calls from two adjacent gfx IBs run in parallel. This will be the new default for Mesa. v2: bump the version Signed-off-by: Marek Olšák <marek.olsak@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 
There is a new IB flag that enables this new behavior.
Full invalidation is unnecessary for RELEASE_MEM and doesn't make sense
when draw calls from two adjacent gfx IBs run in parallel. This will be
the new default for Mesa.

v2: bump the version

Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: Add GFXv9 TLB invalidation packet definition 2018-04-10T21:33:00+00:00 Felix Kuehling Felix.Kuehling@amd.com 2018-04-10T21:33:00+00:00 ab88bded7522dafc1a6beb251092365519a01c4e Signed-off-by: Shaoyun Liu <Shaoyun.Liu@amd.com> Signed-off-by: Jay Cornwall <Jay.Cornwall@amd.com> Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com> Reviewed-by: Oded Gabbay <oded.gabbay@gmail.com> Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com> 
Signed-off-by: Shaoyun Liu <Shaoyun.Liu@amd.com>
Signed-off-by: Jay Cornwall <Jay.Cornwall@amd.com>
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: Oded Gabbay <oded.gabbay@gmail.com>
Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
drm/amdgpu: fix vega10 graphic hang issue in S3 test 2017-08-18T16:02:11+00:00 Ken Wang Ken.Wang@amd.com 2017-08-15T09:16:08+00:00 d5de797ff1c91157ddefd7102aaf5f87ff222746 mmVGT_INDEX_TYPE has no default value, need to make sure it's initialized when gfx is initialized. Signed-off-by: Ken Wang <Ken.Wang@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 
mmVGT_INDEX_TYPE has no default value, need to make sure
it's initialized when gfx is initialized.

Signed-off-by: Ken Wang <Ken.Wang@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu/gfx9: move define to header file 2017-05-24T21:40:29+00:00 Alex Deucher alexander.deucher@amd.com 2017-05-04T14:32:33+00:00 67fb56a6dde9bddd3a57614607af255bbb732118 rather than defining it locally. Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 
rather than defining it locally.

Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu:new PM4 entry for VI/AI 2017-05-24T21:40:26+00:00 Monk Liu Monk.Liu@amd.com 2017-05-01T09:23:44+00:00 d951eeddface8bcdcb4fd95066801abface55c21 TMZ package will be used for VULKAN/CHAINED-IB MCBP Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 
TMZ package will be used for VULKAN/CHAINED-IB MCBP

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: add KIQ packet defines to soc15d.h 2017-05-24T21:40:14+00:00 Alex Deucher alexander.deucher@amd.com 2017-04-17T19:54:55+00:00 495a746354a056ecb8c13f3baff305d0c50864ec Will be used in subsequent commits rather rather than magic numbers. Reviewed-by: monk liu <monk.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 
Will be used in subsequent commits rather rather than
magic numbers.

Reviewed-by: monk liu <monk.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu:enable mcbp for gfx9(v2) 2017-03-30T03:55:35+00:00 Monk Liu Monk.Liu@amd.com 2017-03-21T03:50:43+00:00 9ccd52eb248b0d8f0450e1201a8064f5ab1ec07e set bit 21 of IB.control filed to actually enable MCBP for SRIOV v2: add flag for preemption enable bit for soc15 and use this flag instead of hardcode. Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 
set bit 21 of IB.control filed to actually enable
MCBP for SRIOV
v2:
add flag for preemption enable bit for soc15 and use
this flag instead of hardcode.

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: init kiq and kcq for vega10 2017-03-30T03:55:00+00:00 Xiangliang Yu Xiangliang.Yu@amd.com 2017-02-28T08:48:47+00:00 464826d67aee079e34c8b8bb652cef71c1a7dbe4 Init kiq via cpu mmio and init kcq through kiq. Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com> Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 
Init kiq via cpu mmio and init kcq through kiq.

Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com>
Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>