linux-toradex.git/drivers/gpu/drm/amd/display/dmub/src, branch v5.16

drm/amd/display: Added new DMUB boot option for power optimization

2021-11-03T16:32:34+00:00

[Why]
During Z10, root clock gating and memory low power registers needs to
to be restored if optimization is enabled in driver.

[How]
Added new DMUB boot option for root clock gating and memory low power.

Acked-by: Aurabindo Pillai 
Signed-off-by: Jake Wang 
Reviewed-by: Nicholas Kazlauskas 
Tested-by: Daniel Wheeler 
Signed-off-by: Alex Deucher

drm/amd/display: Enable dpia in dmub only for DCN31 B0

2021-10-28T18:26:59+00:00

[Why]
DMUB binary is common for both A0 and B0. Hence, driver should
notify FW about the support for DPIA in B0.

[How]
Added dpia_supported bit in dmub_fw_boot_options and will be set
only for B0.

Assign dpia_supported to true before dm_dmub_hw_init
in B0 case.

v2: fix build without CONFIG_DRM_AMD_DC_DCN (Alex)

Signed-off-by: Jude Shih 
Reviewed-by: Nicholas Kazlauskas 
Signed-off-by: Alex Deucher

drm/amd/display: Set phy_mux_sel bit in dmub scratch register

2021-10-28T18:26:16+00:00

[Why]
B0 has pipe mux for DIGC and DIGD which can be connected to PHYF/PHYG or
PHYC/PHY D.

[How]
Based on chip internal hardware revision id determine it is B0 and set
DMUB scratch register so DMUBFW can connect the display pipe is
connected correctly to the dig.

Cc: Wayne Lin 
Cc: Nicholas Kazlauskas 
Reviewed-by: Charlene Liu 
Acked-by: Rodrigo Siqueira 
Tested-by: Daniel Wheeler 
Signed-off-by: Hansen 
Signed-off-by: Alex Deucher

drm/amd/display: Add dpia debug options

2021-10-06T19:52:24+00:00

[Why & How]
To add support for dpia debug options.

Reviewed-by: Jimmy Kizito 
Acked-by: Wayne Lin 
Acked-by: Nicholas Kazlauskas 
Acked-by: Harry Wentland 
Signed-off-by: Meenakshikumar Somasundaram 
Signed-off-by: Alex Deucher

drm/amd/display: Support for SET_CONFIG processing with DMUB

2021-10-06T19:52:11+00:00

[Why]
To process SET_CONFIG transactions with DMUB using inbox1 and
outbox1 mail boxes.

[How]
1) Added inbox1 DPIA command subtype DMUB_CMD__DPIA_SET_CONFIG_ACCESS to
   issue SET_CONFIG command to DMUB in dc_process_dmub_set_config_async().
   DMUB processes the command with DPIA sends reply back immediately or
   in an outbox1 message triggering an outbox1 interrupt to driver.
2) DMUB posts SET_CONFIG reply as an Outbox1 message of type
   DMUB_OUT_CMD__SET_CONFIG_REPLY.
3) The dmub async to sync mechanism for AUX is modified to accommodate
   SET_CONFIG commands for both command issue and reply code paths.

Reviewed-by: Jun Lei 
Acked-by: Wayne Lin 
Acked-by: Nicholas Kazlauskas 
Acked-by: Harry Wentland 
Signed-off-by: Meenakshikumar Somasundaram 
Signed-off-by: Alex Deucher

drm/amd/display: Support for DMUB HPD and HPD RX interrupt handling

2021-10-06T19:51:03+00:00

[WHY]
To add support for HPD & HPD RX interrupt handling for USB4 DPIA in
YELLOW_CARP_B0. USB4 DPIA HPD & HPD RX interrupts are issued from DMUB to
driver as a outbox1 message.

[HOW]
1) Created get_link_index_from_dpia_port_index() to retrieve link index
   from dpia port index for HPD & HPD RX dmub notifications.
2) Added DMUB HPD & HPD RX handling in dmub_srv_stat_get_notification().

Reviewed-by: Jun Lei 
Acked-by: Wayne Lin 
Acked-by: Nicholas Kazlauskas 
Acked-by: Harry Wentland 
Signed-off-by: Meenakshikumar Somasundaram 
Signed-off-by: Alex Deucher

drm/amd/display: Prevent using DMUB rptr that is out-of-bounds

2021-10-04T19:23:02+00:00

[Why]
Running into bugchecks during stress test where rptr is 0xFFFFFFFF.
Typically this is caused by a hard hang, and can come from HW outside
of DCN.

[How]
To prevent bugchecks when writing the DMUB rptr, fist check that the
rptr is valid.

Reviewed-by: Nicholas Kazlauskas 
Acked-by: Solomon Chiu 
Signed-off-by: Wyatt Wood 
Tested-by: Daniel Wheeler 
Signed-off-by: Alex Deucher

drm/amd/display: Add periodic detection when zstate is enabled

2021-09-14T19:57:10+00:00

[Why]
When system is in Z10 HPD interrupts cannot fire, we may miss display
configuration changes.

[How]
When Zstate is enabled, if DMUB indicate DCN has lost power, do a
complete detection periodically.

Reviewed-by: Nicholas Kazlauskas 
Acked-by: Mikita Lipski 
Signed-off-by: Eric Yang 
Tested-by: Daniel Wheeler 
Signed-off-by: Alex Deucher

drm/amd/display: Increase timeout threshold for DMCUB reset

2021-08-09T19:44:02+00:00

[Why]
If we're backdoor loading the DMCUB performs more work than just
the PHY reset so we can end up resetting before the cleanup has fully
finished.

[How]
Increase timeout, add udelay between spins to guarantee a minimum.

Reviewed-by: Roy Chan 
Reviewed-by: Eric Yang 
Acked-by: Anson Jacob 
Signed-off-by: Nicholas Kazlauskas 
Tested-by: Daniel Wheeler 
Signed-off-by: Alex Deucher

drm/amd/display: Clear GPINT after DMCUB has reset

2021-08-09T19:43:55+00:00

[Why]
Otherwise we can end up processing whatever was left in the register
if the DMCUB was previously reset.

If DMCUB gets force reset too early from another client then we might
not have even acked the disable yet - causing DMCUB instantly shutdown
if the command was 10020000.

[How]
Move the GPINT clear outside of the reset loop and do it unconditionally
after the DMCUB has been properly reset.

Reviewed-by: Roy Chan 
Reviewed-by: Eric Yang 
Acked-by: Anson Jacob 
Signed-off-by: Nicholas Kazlauskas 
Tested-by: Daniel Wheeler 
Signed-off-by: Alex Deucher