linux-toradex.git/drivers/gpu/drm/amd/include, branch v5.13-rc3 Linux kernel for Apalis and Colibri modules drm/amdgpu: add judgement when add ip blocks (v2) 2021-05-13T14:46:58+00:00 Likun GAO Likun.Gao@amd.com 2021-04-29T06:08:13+00:00 83a0b8639185f40ab7fc9dd291a057150eb9d238 Judgement whether to add an sw ip according to the harvest info. v2: fix indentation (Alex) Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Guchun Chen <guchun.chen@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 
Judgement whether to add an sw ip according to the harvest info.

v2: fix indentation (Alex)

Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Guchun Chen <guchun.chen@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: only harvest gcea/mmea error status in arcturus 2021-04-21T01:35:45+00:00 Hawking Zhang Hawking.Zhang@amd.com 2021-04-16T09:34:13+00:00 53ee6609b42e09f89bf2cdd15a340c236694ecd3 SDP RdRspStatus/WrRspStatus or first parity error on RdRsp data can cause system fatal error in arcturus. GPU will be freezed in such case. Driver needs to harvest these error information before reset the GPU. Check error type to avoid harvest normal gcea/mmea information. Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Stanley Yang <Stanley.Yang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 
SDP RdRspStatus/WrRspStatus or first parity error on
RdRsp data can cause system fatal error in arcturus.
GPU will be freezed in such case.

Driver needs to harvest these error information before
reset the GPU. Check error type to avoid harvest normal
gcea/mmea information.

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Stanley Yang <Stanley.Yang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd: update the atomfirmware header for smu12 2021-04-15T20:32:44+00:00 Xiaojian Du Xiaojian.Du@amd.com 2021-04-13T07:03:42+00:00 af48a06daaf15e0ee7c354a1e5ce6e8b06d67a38 This patch is to update the atomfirmware header for smu12. v2: remove some unnecessary members Signed-off-by: Xiaojian Du <Xiaojian.Du@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 
This patch is to update the atomfirmware header for smu12.

v2: remove some unnecessary members

Signed-off-by: Xiaojian Du <Xiaojian.Du@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: add DMUB outbox event IRQ source define/complete/debug flag 2021-04-09T20:54:42+00:00 Jude Shih shenshih@amd.com 2021-04-01T03:10:41+00:00 f066af882b3755c5cdd2574e860433750c6bce1e [Why & How] We use outbox interrupt that allows us to do the AUX via DMUB Therefore, we need to add some irq source related definition in the header files; Signed-off-by: Jude Shih <shenshih@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 
[Why & How]
We use outbox interrupt that allows us to do the AUX via DMUB
Therefore, we need to add some irq source related definition
in the header files;

Signed-off-by: Jude Shih <shenshih@amd.com>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd/display: Interface for LTTPR interop 2021-04-09T20:48:25+00:00 Wesley Chalmers Wesley.Chalmers@amd.com 2021-03-17T20:36:47+00:00 dd8a86877ec0dece66b5633b57622767696fc31f [WHY] The logic to toggle LTTPR transparent/non-transparent requires 2 flags provided by BIOS [HOW] Repurpose the interface to get dce caps so both LTTPR querying functions can use them. Signed-off-by: Wesley Chalmers <Wesley.Chalmers@amd.com> Reviewed-by: Jun Lei <Jun.Lei@amd.com> Acked-by: Anson Jacob <Anson.Jacob@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 
[WHY]
The logic to toggle LTTPR transparent/non-transparent requires 2 flags
provided by BIOS

[HOW]
Repurpose the interface to get dce caps so both LTTPR querying functions
can use them.

Signed-off-by: Wesley Chalmers <Wesley.Chalmers@amd.com>
Reviewed-by: Jun Lei <Jun.Lei@amd.com>
Acked-by: Anson Jacob <Anson.Jacob@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd/display: BIOS LTTPR Caps Interface 2021-04-09T20:47:53+00:00 Wesley Chalmers Wesley.Chalmers@amd.com 2021-02-22T04:05:48+00:00 95574c6961476e26236f16b48bfd98d6a1ceff4c [WHY] Some platforms will have LTTPR capabilities forced on by VBIOS flags; the functions added here will access those flags. Signed-off-by: Wesley Chalmers <Wesley.Chalmers@amd.com> Reviewed-by: Jun Lei <Jun.Lei@amd.com> Acked-by: Anson Jacob <Anson.Jacob@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 
[WHY]
Some platforms will have LTTPR capabilities forced on by VBIOS flags;
the functions added here will access those flags.

Signed-off-by: Wesley Chalmers <Wesley.Chalmers@amd.com>
Reviewed-by: Jun Lei <Jun.Lei@amd.com>
Acked-by: Anson Jacob <Anson.Jacob@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd/amdgpu: Add CP_IB1_BASE_* to gc_10_3_0 headers 2021-04-09T20:46:59+00:00 Tom St Denis tom.stdenis@amd.com 2021-03-26T11:07:25+00:00 53df89ddc0ccb016edbf8c4cc1d66e75ade28837 Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd: Fix a typo in two different sentences 2021-04-09T20:44:32+00:00 Bhaskar Chowdhury unixbhaskar@gmail.com 2021-03-22T21:06:12+00:00 5bf314abfb8a3edf84af9565c12156041395d3a8 s/defintion/definition/ .....two different places. Acked-by: Randy Dunlap <rdunlap@infradead.org> Signed-off-by: Bhaskar Chowdhury <unixbhaskar@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 
s/defintion/definition/ .....two different places.

Acked-by: Randy Dunlap <rdunlap@infradead.org>
Signed-off-by: Bhaskar Chowdhury <unixbhaskar@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd/pm: make DAL communicate with SMU through unified interfaces 2021-04-09T20:42:37+00:00 Evan Quan evan.quan@amd.com 2021-03-19T04:15:47+00:00 5f400639dd4ef9e23a74f72cdd007fa67ee35e5c No need to have special handlings for swSMU supported ASICs. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 
No need to have special handlings for swSMU supported ASICs.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd/pm: add a new sysfs entry for default power limit 2021-03-24T03:30:55+00:00 Eric Huang jinhuieric.huang@amd.com 2021-03-12T17:43:32+00:00 6e58941cff74aac49659abc8b27740c0457c2397 Driver doesn't keep the default bootup power limit and expose it to user. As requested we add it in driver. Signed-off-by: Eric Huang <jinhuieric.huang@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 
Driver doesn't keep the default bootup power limit and expose it
to user. As requested we add it in driver.

Signed-off-by: Eric Huang <jinhuieric.huang@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>