linux-toradex.git/drivers/gpu/drm/amd/pm/powerplay/inc, branch master Linux kernel for Apalis and Colibri modules drm/amd/pm/smu7: Notify SMU7 of DC->AC switch 2026-05-27T14:48:15+00:00 Timur Kristóf timur.kristof@gmail.com 2026-05-19T08:41:56+00:00 96da0d86614e2e8ab34afd5b8578e8ee43963df5 When ATOM_PP_PLATFORM_CAP_HARDWAREDC is set, the SMU has a GPIO pin for detecting AC/DC switch and everything works automatically. Otherwise when there is no GPIO pin, the SMU can automatically detect switching to DC, but needs to be notified of switching to AC. Use PPSMC_MSG_RunningOnAC to notify the SMC when switching to AC. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Timur Kristóf <timur.kristof@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 
When ATOM_PP_PLATFORM_CAP_HARDWAREDC is set,
the SMU has a GPIO pin for detecting AC/DC switch
and everything works automatically.

Otherwise when there is no GPIO pin, the SMU can
automatically detect switching to DC, but needs
to be notified of switching to AC.

Use PPSMC_MSG_RunningOnAC to notify the SMC
when switching to AC.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd/pm: Delete get_dal_power_level 2026-05-27T14:47:07+00:00 Timur Kristóf timur.kristof@gmail.com 2026-05-19T10:21:17+00:00 e624a56f8a4c8c5a7d0a3937e929056e807d9562 Not needed anymore. Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Timur Kristóf <timur.kristof@gmail.com> Reviewed-by: Melissa Wen <mwen@igalia.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 
Not needed anymore.

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Melissa Wen <mwen@igalia.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd/pm: Delete vddc_dep_on_dal_pwrl 2026-05-27T14:47:01+00:00 Timur Kristóf timur.kristof@gmail.com 2026-05-19T10:21:16+00:00 d24cf9ce3f0607649a175f47c6f3d8f45dbf08ad It was not used by anything anymore. Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Timur Kristóf <timur.kristof@gmail.com> Reviewed-by: Melissa Wen <mwen@igalia.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 
It was not used by anything anymore.

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Melissa Wen <mwen@igalia.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd/pm/smu7: Remove non-functional SMU7 voltage dependency on DAL 2026-03-30T20:48:11+00:00 Timur Kristóf timur.kristof@gmail.com 2026-03-29T16:03:01+00:00 9f49e3d4cb86859a4e5fde3f2060ed4f09bddaed It looks like this was written for an old version of DC (DAL) and was never adapted afterwards. This was non-functional because it relied on the "dal_power_level" field which was never assigned anywhere in the code base. Also, it was not implemented for CI ASICs. Now superseded by the newer voltage dependency on display clock table added by the previous commit, let's remove. Signed-off-by: Timur Kristóf <timur.kristof@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 
It looks like this was written for an old version of DC (DAL)
and was never adapted afterwards. This was non-functional
because it relied on the "dal_power_level" field which was
never assigned anywhere in the code base.

Also, it was not implemented for CI ASICs.

Now superseded by the newer voltage dependency on display
clock table added by the previous commit, let's remove.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd/pm/smu7: Fix SMU7 voltage dependency on display clock 2026-03-30T20:45:22+00:00 Timur Kristóf timur.kristof@gmail.com 2026-03-29T16:03:00+00:00 0138610c14130425be53423b35336561829965e0 The DCE (display controller engine) requires a minimum voltage in order to function correctly, depending on which clock level it currently uses. Add a new table that contains display clock frequency levels and the corresponding required voltages. The clock frequency levels are taken from DC (and the old radeon driver's voltage dependency table for CI in cases where its values were lower). The voltage levels are taken from the following function: phm_initializa_dynamic_state_adjustment_rule_settings(). Furthermore, in case of CI, call smu7_patch_vddc() on the new table to account for leakage voltage (like in radeon). Use the display clock value from amd_pp_display_configuration to look up the voltage level needed by the DCE. Send the voltage to the SMU via the PPSMC_MSG_VddC_Request command. The previous implementation of this feature was non-functional because it relied on a "dal_power_level" field which was never assigned; and it was not at all implemented for CI ASICs. I verified this on a Radeon R9 M380 which previously booted to a black screen with DC enabled (default since Linux 6.19), but now works correctly. Fixes: 599a7e9fe1b6 ("drm/amd/powerplay: implement smu7 hwmgr to manager asics with smu ip version 7.") Signed-off-by: Timur Kristóf <timur.kristof@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 
The DCE (display controller engine) requires a minimum voltage
in order to function correctly, depending on which clock level
it currently uses.

Add a new table that contains display clock frequency levels
and the corresponding required voltages. The clock frequency
levels are taken from DC (and the old radeon driver's voltage
dependency table for CI in cases where its values were lower).
The voltage levels are taken from the following function:
phm_initializa_dynamic_state_adjustment_rule_settings().
Furthermore, in case of CI, call smu7_patch_vddc() on the new
table to account for leakage voltage (like in radeon).

Use the display clock value from amd_pp_display_configuration
to look up the voltage level needed by the DCE. Send the
voltage to the SMU via the PPSMC_MSG_VddC_Request command.

The previous implementation of this feature was non-functional
because it relied on a "dal_power_level" field which was never
assigned; and it was not at all implemented for CI ASICs.

I verified this on a Radeon R9 M380 which previously booted to
a black screen with DC enabled (default since Linux 6.19), but
now works correctly.

Fixes: 599a7e9fe1b6 ("drm/amd/powerplay: implement smu7 hwmgr to manager asics with smu ip version 7.")
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: Remove powerdown_uvd member 2025-03-05T15:44:37+00:00 Dr. David Alan Gilbert linux@treblig.org 2025-03-03T14:39:19+00:00 7b111aaae0ef810d26520e278bc9f7644158cb99 With phm_powerdown_uvd() gone in the previous patch, there's now no longer anything that reads the powerdown_uvd member of the pp_hwmgr_func. Remove it. There are a few assignments to it; a boring NULL which can just go, and two functions, but those functions are called explicitly anyway so the assignments to the member go. One of those (smu7_powerdown_uvd) wasn't static previously; make it static. Signed-off-by: Dr. David Alan Gilbert <linux@treblig.org> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 
With phm_powerdown_uvd() gone in the previous patch, there's
now no longer anything that reads the powerdown_uvd member of the
pp_hwmgr_func.

Remove it.

There are a few assignments to it; a boring NULL which can just go,
and two functions, but those functions are called explicitly anyway
so the assignments to the member go.

One of those (smu7_powerdown_uvd) wasn't static previously;
make it static.

Signed-off-by: Dr. David Alan Gilbert <linux@treblig.org>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: Remove phm_powerdown_uvd 2025-03-05T15:44:29+00:00 Dr. David Alan Gilbert linux@treblig.org 2025-03-03T14:39:18+00:00 51cd1bcfac4f1f8fae45249e08929d57b1d17bc4 phm_powerdown_uvd() has been unused since 2017's commit 47047263c527 ("drm/amd/powerplay: delete eventmgr related files.") Remove it. Signed-off-by: Dr. David Alan Gilbert <linux@treblig.org> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 
phm_powerdown_uvd() has been unused since 2017's
commit 47047263c527 ("drm/amd/powerplay: delete eventmgr related files.")

Remove it.

Signed-off-by: Dr. David Alan Gilbert <linux@treblig.org>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: partially revert powerplay `__counted_by` changes 2024-10-07T18:58:26+00:00 Alex Deucher alexander.deucher@amd.com 2024-10-02T21:27:25+00:00 d6b9f492e229be1d1bd360c3ac5bee4635bacf99 Partially revert commit 0ca9f757a0e2 ("drm/amd/pm: powerplay: Add `__counted_by` attribute for flexible arrays") The count attribute for these arrays does not get set until after the arrays are allocated and populated leading to false UBSAN warnings. Fixes: 0ca9f757a0e2 ("drm/amd/pm: powerplay: Add `__counted_by` attribute for flexible arrays") Reviewed-by: Mario Limonciello <mario.limonciello@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/3662 Signed-off-by: Alex Deucher <alexander.deucher@amd.com> (cherry picked from commit 8a5ae927b653b43623e55610d2215ee94c027e8c) Cc: stable@vger.kernel.org 
Partially revert
commit 0ca9f757a0e2 ("drm/amd/pm: powerplay: Add `__counted_by` attribute for flexible arrays")

The count attribute for these arrays does not get set until
after the arrays are allocated and populated leading to false
UBSAN warnings.

Fixes: 0ca9f757a0e2 ("drm/amd/pm: powerplay: Add `__counted_by` attribute for flexible arrays")
Reviewed-by: Mario Limonciello <mario.limonciello@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/3662
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
(cherry picked from commit 8a5ae927b653b43623e55610d2215ee94c027e8c)
Cc: stable@vger.kernel.org
drm/amd/pm: powerplay: Add `__counted_by` attribute for flexible arrays 2024-06-19T16:52:25+00:00 Mario Limonciello mario.limonciello@amd.com 2024-06-14T17:05:51+00:00 0ca9f757a0e27a076395ec1b2002661bcf5c25e8 This attribute is used to hint the length of flexible arrays to compiler and sanitizers. Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 
This attribute is used to hint the length of flexible arrays to
compiler and sanitizers.

Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu/pm: Add support for MACO flag checking 2024-04-10T02:07:59+00:00 Ma Jun Jun.Ma2@amd.com 2024-03-27T09:26:08+00:00 b2207dc6989f5c913cca932eb8720b6ad0725d67 Add support for MACO flag checking. MACO mode only works if BACO is supported. Signed-off-by: Ma Jun <Jun.Ma2@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 
Add support for MACO flag checking.
MACO mode only works if BACO is supported.

Signed-off-by: Ma Jun <Jun.Ma2@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>