linux-toradex.git/drivers/gpu/drm/ast, branch master

Merge tag 'drm-misc-next-2026-04-20' of https://gitlab.freedesktop.org/drm/misc/kernel into drm-next

2026-05-06T00:12:25+00:00

drm-misc-next for v7.1-rc1:

UAPI Changes:
- Expose per-client BO memory usage via fdinfo in amdxdna. (Hou)
- Change the default priority of drm scheduler to fair. (Tvrtko)

Cross-subsystem Changes:
- Revert hugetlb support in udmabuf. (Gunthorpe)
- Fix error in udmabuf with CONFIG_DMA_API_DEBUG(/ _SG). (Gavrilov)
- Add Docbook for DRM_IOCTL_SYNCOBJ_EVENTFD, (Ser)
  clarify drm_bridge_get/put. (Tvrtko)
- Change signature of drm_connector_attach_hdr_output_metadata_property. (Canal)
- Use IOVA allocations in gpusvm and pagemap APIs. (Brost)
- Fix tracepoints vs dma-fence lifetime. (Tvrtko)
- Convert st-dma*.c tests to use kunit. (Gunthorpe)

Core Changes:
- Deduplicate counter and timestamp retrieval in vblank code. (Ville)
- Parse AMD VSDB v3 in CTA extension blocks, and use it in amdgpu. (Chen)
- Prevent bridge and encoder chain changes at inopportune times. (Ceresoli)
- Map the run queue 1:1 to the drm scheduler. (Tvrtko)

Driver Changes:
- Assorted bugfixes and (documentation) updates to rockchip, bridge/synopsis,
  panfrost, tidss, accel/qaic, tilcdc, vc4, ast, imagination, panthor,
  renesas, accel/amdxdna, msxfb, bridge/imx8mp, nouveau.
  bridge/analogix_dp, bridge/exynos_dp, omap.
- Add support for CSW PNB601LS1-2, LGD LP116WHA-SPB1, panels.
- Add support for a lot of waveshare panels (Baryshkov)
- Support for AIE4 devices in accel/wamdxdna. (Zhang)
- Enable support for GEM shrinking in panthor. (Goel/Brezillon)
- Runtime Power Management is added to v3d. (Canal)
- Allow panel probing and use the panel bridge helper in analogix_dp. (Ding)
- Support XRGB1555 and C8 in mgag and XRGB1555 in ast. (Zimmermann)

From: Maarten Lankhorst 
Link: https://patch.msgid.link/bf31b1a1-951b-4f60-b226-22e8c083697d@linux.intel.com
Signed-off-by: Dave Airlie

drm: Rename struct drm_atomic_state to drm_atomic_commit

2026-05-04T04:05:04+00:00

The KMS framework uses two slightly different definitions for the state
concept. For a given object (plane, CRTC, encoder, etc., so
drm_$OBJECT_state), the state is the entire state of that object.
However, at the device level, drm_atomic_state refers to a state update
for a limited number of objects.

Thus, drm_atomic_state isn't the entire device state, but only the full
state of some objects in that device. This has been an endless source of
confusion and thus bugs.

We can rename the drm_atomic_state structure to drm_atomic_commit to
make it less confusing.

This patch was created using:

rg -l drm_atomic_state | \
	xargs sed -i 's/drm_atomic_state/drm_atomic_commit/g; s/drm_atomic_commit_helper/drm_atomic_state_helper/g'
mv drivers/gpu/drm/tests/drm_atomic_state_test.c drivers/gpu/drm/tests/drm_atomic_commit_test.c

Acked-by: Simona Vetter 
Acked-by: Thomas Zimmermann 
Acked-by: Jani Nikula 
Reviewed-by: Luca Ceresoli 
Tested-by: Luca Ceresoli 
Signed-off-by: Maxime Ripard 
Signed-off-by: Dave Airlie 
Link: https://patch.msgid.link/20260427-drm-drm-atomic-update-v4-1-c0e713bfdf25@kernel.org

drm/ast: Support DRM_FORMAT_XRGB1555 on the primary plane

2026-04-20T07:12:01+00:00

Export DRM_FORMAT_XRGB1555 in the primary plane's format array and
handle the format in the color-format updates. With this, ast is now
feature complete wrt. color-format support.

Also update the comments in the gamma-LUT code to reflect the ast
manual's terminology.

Signed-off-by: Thomas Zimmermann 
Reviewed-by: Jocelyn Falempe 
Link: https://patch.msgid.link/20260414070522.33943-5-tzimmermann@suse.de

drm/ast: Replace references to struct drm_format_info.cpp

2026-04-20T07:12:00+00:00

Replace all uses of struct drm_format_info.cpp with the corresponding
4CC constant. Color-mode selection uses switch statements that branch
by cpp in several places. While at it, also name the involved variables
according to register names and replace magic values with constants.

Replace the use of *ModeIndex constants in ast_set_vbios_color_reg()
with correct register constants. The former are array indices and do
not belong into registers.

In ast_set_color_reg(), vgacra0 is independent from the color format,
so move it out from the switch statements.

There is also a flag for gamma correction in vgacra8, which currently
ast_set_color_reg() handles as part of the primary plane. The gamma LUT
and its programming is located in the CRTC. A future update should
consolidate gamma correction in the primary plane and implement the
functionality with DRM's colorop helpers.

Signed-off-by: Thomas Zimmermann 
Reviewed-by: Jocelyn Falempe 
Link: https://patch.msgid.link/20260414070522.33943-4-tzimmermann@suse.de

drm/ast: Remove traces of DRM_FORMAT_RGB888 handling

2026-04-20T07:12:00+00:00

There's some incomplete handling for DRM_FORMAT_RGB888 in the mode-
setting code. It was added by ast's original commit, which imported
the code from the user-space Xorg driver. But the hardware doesn't
support 24-bit pixel sizes. Hence remove the traces of RGB888 from
ast.

Signed-off-by: Thomas Zimmermann 
Reviewed-by: Jocelyn Falempe 
Link: https://patch.msgid.link/20260414070522.33943-3-tzimmermann@suse.de

drm/ast: Add constant for VGACR91

2026-04-20T07:11:59+00:00

Register VGACR91 receives a password that enables the new mode-info
header in other registers. Replace the password's magic value with a
constant.

Signed-off-by: Thomas Zimmermann 
Reviewed-by: Jocelyn Falempe 
Link: https://patch.msgid.link/20260414070522.33943-2-tzimmermann@suse.de

drm/ast: Fix open-coded scu_rev access

2026-04-08T09:04:49+00:00

Replace all open-coded access to P2A and SCU registers in the device
detection with the appropriate calls to ast_moutdwm() and ast_mindwm().
Use P2A and MCR register constants. Name variables according to registers.

Signed-off-by: Thomas Zimmermann 
Reviewed-by: Jocelyn Falempe 
Link: https://patch.msgid.link/20260327133532.79696-16-tzimmermann@suse.de

drm/ast: dp501: Fix open-coded register access

2026-04-08T09:04:49+00:00

Replace all open-coded access to SCU registers in DP501 support with
the appropriate calls to ast_moutdwm() and ast_mindwm(). Use SCU register
constants. Name variables according to registers.

Signed-off-by: Thomas Zimmermann 
Reviewed-by: Jocelyn Falempe 
Link: https://patch.msgid.link/20260327133532.79696-15-tzimmermann@suse.de

drm/ast: Gen6: Fix open-coded register access

2026-04-08T09:04:49+00:00

Replace all open-coded access to MCR and SCU registers in Gen6 with
the appropriate calls to ast_moutdwm() and ast_mindwm(). Use MCR and
SCU register constants. Name variables according to registers.

v2:
- also fix MCR constants

Signed-off-by: Thomas Zimmermann 
Reviewed-by: Jocelyn Falempe 
Link: https://patch.msgid.link/20260327133532.79696-14-tzimmermann@suse.de

drm/ast: Gen4: Fix open-coded register access

2026-04-08T09:04:49+00:00

Replace all open-coded access to MCR and SCU registers in Gen4 with the
appropriate calls to ast_moutdwm() and ast_mindwm(). Use MCR and SCU
register constants. Name variables according to registers.

Signed-off-by: Thomas Zimmermann 
Reviewed-by: Jocelyn Falempe 
Link: https://patch.msgid.link/20260327133532.79696-13-tzimmermann@suse.de