<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-toradex.git/drivers/gpu/drm/msm/msm_kms.h, branch v3.18.16</title>
<subtitle>Linux kernel for Apalis and Colibri modules</subtitle>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/'/>
<entry>
<title>drm/msm: add mdp5/apq8x74</title>
<updated>2014-01-09T19:44:06+00:00</updated>
<author>
<name>Rob Clark</name>
<email>robdclark@gmail.com</email>
</author>
<published>2013-11-30T22:51:47+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=06c0dd96bfbba8a9368ffd7c4b12d3bfed37001d'/>
<id>06c0dd96bfbba8a9368ffd7c4b12d3bfed37001d</id>
<content type='text'>
Add support for the new MDP5 display controller block.  The mapping
between parts of the display controller and KMS is:

  plane   -&gt; PIPE{RGBn,VIGn}             \
  crtc    -&gt; LM (layer mixer)            |-&gt; MDP "device"
  encoder -&gt; INTF                        /
  connector -&gt; HDMI/DSI/eDP/etc          --&gt; other device(s)

Unlike MDP4, it appears we can get by with a single encoder, rather
than needing a different implementation for DTV, DSI, etc.  (Ie. the
register interface is same, just different bases.)

Also unlike MDP4, all the IRQs for other blocks (HDMI, DSI, etc) are
routed through MDP.

And finally, MDP5 has this "Shared Memory Pool" (called "SMP"), from
which blocks need to be allocated to the active pipes based on fetch
stride.

Signed-off-by: Rob Clark &lt;robdclark@gmail.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add support for the new MDP5 display controller block.  The mapping
between parts of the display controller and KMS is:

  plane   -&gt; PIPE{RGBn,VIGn}             \
  crtc    -&gt; LM (layer mixer)            |-&gt; MDP "device"
  encoder -&gt; INTF                        /
  connector -&gt; HDMI/DSI/eDP/etc          --&gt; other device(s)

Unlike MDP4, it appears we can get by with a single encoder, rather
than needing a different implementation for DTV, DSI, etc.  (Ie. the
register interface is same, just different bases.)

Also unlike MDP4, all the IRQs for other blocks (HDMI, DSI, etc) are
routed through MDP.

And finally, MDP5 has this "Shared Memory Pool" (called "SMP"), from
which blocks need to be allocated to the active pipes based on fetch
stride.

Signed-off-by: Rob Clark &lt;robdclark@gmail.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drm/msm: move irq utils to mdp_kms</title>
<updated>2014-01-09T19:44:05+00:00</updated>
<author>
<name>Rob Clark</name>
<email>robdclark@gmail.com</email>
</author>
<published>2013-11-30T22:24:22+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=9e0efa63565511dc75846e6b036a4b80e92b9a98'/>
<id>9e0efa63565511dc75846e6b036a4b80e92b9a98</id>
<content type='text'>
We'll want basically the same thing for mdp5, so refactor it out so it
can be shared.

Signed-off-by: Rob Clark &lt;robdclark@gmail.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
We'll want basically the same thing for mdp5, so refactor it out so it
can be shared.

Signed-off-by: Rob Clark &lt;robdclark@gmail.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drm/msm: split out msm_kms.h</title>
<updated>2014-01-09T19:44:04+00:00</updated>
<author>
<name>Rob Clark</name>
<email>robdclark@gmail.com</email>
</author>
<published>2013-11-30T21:12:10+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=dd2da6e34672100b5fd811fbf2cf97e29c08080f'/>
<id>dd2da6e34672100b5fd811fbf2cf97e29c08080f</id>
<content type='text'>
Signed-off-by: Rob Clark &lt;robdclark@gmail.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Signed-off-by: Rob Clark &lt;robdclark@gmail.com&gt;
</pre>
</div>
</content>
</entry>
</feed>
