linux-toradex.git/drivers/gpu/drm/xe/abi, branch master

drm/xe/guc: Fix kernel-doc warning in GuC scheduler ABI header

2026-02-05T13:03:30+00:00

The GuC scheduler ABI header contains a file-level comment that is not
intended to document a kernel-doc symbol. Using kernel-doc comment
syntax (/** */) triggers kernel-doc warnings.

With "-Werror", this causes the build to fail. Convert the comment to a
regular block comment.

HDRTEST drivers/gpu/drm/xe/abi/guc_scheduler_abi.h
Warning: drivers/gpu/drm/xe/abi/guc_scheduler_abi.h:11 This comment starts with '/**', but isn't a kernel-doc comment. Refer to Documentation/doc-guide/kernel-doc.rst
 * Generic defines required for registration with and submissions to the GuC
1 warnings as errors
make[6]: *** [drivers/gpu/drm/xe/Makefile:377: drivers/gpu/drm/xe/abi/guc_scheduler_abi.hdrtest] Error 3
make[5]: *** [scripts/Makefile.build:544: drivers/gpu/drm/xe] Error 2
make[4]: *** [scripts/Makefile.build:544: drivers/gpu/drm] Error 2
make[3]: *** [scripts/Makefile.build:544: drivers/gpu] Error 2
make[2]: *** [scripts/Makefile.build:544: drivers] Error 2
make[1]: *** [/home/kbuild2/kernel/Makefile:2088: .] Error 2
make: *** [Makefile:248: __sub-make] Error 2

v2:
 - Add Fixes tag (Daniele)

Fixes: b0c5cf4f5917 ("drm/gt/guc: extract scheduler-related defines from guc_fwif.h")
Signed-off-by: Chaitanya Kumar Borah 
Reviewed-by: Shuicheng Lin 
Reviewed-by: Daniele Ceraolo Spurio 
Signed-off-by: Daniele Ceraolo Spurio 
Link: https://patch.msgid.link/20260130135210.2659200-1-chaitanya.kumar.borah@intel.com
(cherry picked from commit f89dbe14a0c8854b7aaf960dd842c10698b3ff19)
Signed-off-by: Rodrigo Vivi

drm/xe/guc: fix struct guc_lfd_file_header kernel-doc

2026-01-09T14:42:38+00:00

Fix kernel-doc warnings on struct guc_lfd_file_header:

Warning: ../drivers/gpu/drm/xe/abi/guc_lfd_abi.h:168 expecting prototype
  for struct guc_logfile_header. Prototype was for struct
  guc_lfd_file_header instead

Fixes: 7eeb0e5408bd ("drm/xe/guc: Add LFD related abi definitions")
Cc: Zhanjun Dong 
Cc: Julia Filipchuk 
Cc: Ashutosh Dixit 
Reviewed-by: Zhanjun Dong 
Reviewed-by: Matt Roper 
Link: https://patch.msgid.link/20260107155401.2379127-1-jani.nikula@intel.com
Signed-off-by: Jani Nikula

drm/xe/pf: Add functions to set preempt timeouts for each group

2025-12-22T18:22:16+00:00

The KLV to set the preemption timeout for each groups works the exact
same way as the one for the exec quantums, so we add similar functions.

Signed-off-by: Daniele Ceraolo Spurio 
Cc: Michal Wajdeczko 
Reviewed-by: Michal Wajdeczko 
Link: https://patch.msgid.link/20251218223846.1146344-25-daniele.ceraolospurio@intel.com

drm/xe/pf: Add functions to set exec quantums for each group

2025-12-22T18:22:14+00:00

The GuC has a new dedicated KLV to set the EQs for the groups. The GuC
always sets the EQs for all the groups (even the ones not enabled). If
we provide fewer values than the max number of groups (8), the GuC will
set the remaining ones to 0 (infinity).

Note that the new KLV can be used even when groups are disabled (as the
GuC always consider group0 to be active), so we can use it when encoding
the SRIOV config.

Signed-off-by: Daniele Ceraolo Spurio 
Cc: Michal Wajdeczko 
Reviewed-by: Michal Wajdeczko 
Link: https://patch.msgid.link/20251218223846.1146344-24-daniele.ceraolospurio@intel.com

drm/xe/pf: Prep for multiple exec quantums and preemption timeouts

2025-12-22T18:22:12+00:00

Each scheduler group can be independently configured with its own exec
quantum and preemption timeouts. The existing KLVs to configure those
parameters will apply the value to all groups (even if they're not
enabled at the moment).

When scheduler groups are disabled, the GuC uses the values from Group 0.

Signed-off-by: Daniele Ceraolo Spurio 
Cc: Michal Wajdeczko 
Reviewed-by: Michal Wajdeczko 
Link: https://patch.msgid.link/20251218223846.1146344-23-daniele.ceraolospurio@intel.com

drm/xe/vf: Check if scheduler groups are enabled

2025-12-22T18:22:07+00:00

VF can check if PF has enabled scheduler groups with a dedicated KLV
query. If scheduler groups are enabled, MLRC queue registrations are
forbidden.

Signed-off-by: Daniele Ceraolo Spurio 
Cc: Michal Wajdeczko 
Reviewed-by: Michal Wajdeczko 
Link: https://patch.msgid.link/20251218223846.1146344-20-daniele.ceraolospurio@intel.com

drm/xe/pf: Add support for enabling scheduler groups

2025-12-22T18:22:02+00:00

Scheduler groups are enabled by sending a specific policy configuration
KLV to the GuC. We don't allow changing this policy if there are VF
active, since the expectation is that the VF will only check if the
feature is enabled during driver initialization.

While the GuC interface supports a maximum of 8 groups, the actual
number of groups that can be enabled can be lower than that and
can be different on different devices. For now, all devices support up
to 2 groups, so we check that we do not have more groups than that.

The functions added by this patch will be used by sysfs/debugfs, coming
in follow up patches.

Signed-off-by: Daniele Ceraolo Spurio 
Cc: Michal Wajdeczko 
Reviewed-by: Michal Wajdeczko 
Link: https://patch.msgid.link/20251218223846.1146344-18-daniele.ceraolospurio@intel.com

drm/xe/pf: Initialize scheduler groups

2025-12-22T18:22:00+00:00

Scheduler groups (a.k.a. Engine Groups Scheduling, or EGS) is a GuC
feature that allows the driver to define groups of engines that are
independently scheduled across VFs, which allows different VFs to be
active on the HW at the same time on different groups. The feature is
available for BMG and newer HW starting on GuC 70.53.0, but some
required fixes have been added to GuC 70.55.1.

This is intended for specific scenarios where the admin knows that the
VFs are not going to fully utilize the HW and therefore assigning all of
it to a single VF would lead to part of it being permanently idle.
We do not allow the admin to decide how to divide the engines across
groups, but we instead support specific configurations that are designed
for specific use-cases. During PF initialization we detect which
configurations are possible on a given GT and create the relevant
groups. Since the GuC expect a mask for each class for each group, that
is what we save when we init the configs.

Right now we only have one use-case on the media GT. If the VFs are
running a frame render + encoding at a not-too-high resolution (e.g.
1080@30fps) the render can produce frames faster than the video engine
can encode them, which means that the maximum number of parallel VFs is
limited by the VCS bandwidth. Since our products can have multiple VCS
engines, allowing multiple VFs to be active on the different VCS engines
at the same time allows us to run more parallel VFs on the same HW.
Given that engines in the same media slice share some resources (e.g.
SFC), we assign each media slice to a different scheduling group. We
refer to this configuration as "media_slices", given that each slice
gets its own group. Since upcoming products have a different number of
video engines per-slice, for now we limit the media_slices mode to BMG,
but we expect to add support for newer HW soon.

Signed-off-by: Daniele Ceraolo Spurio 
Cc: Michal Wajdeczko 
Reviewed-by: Michal Wajdeczko 
Link: https://patch.msgid.link/20251218223846.1146344-17-daniele.ceraolospurio@intel.com

drm/gt/guc: extract scheduler-related defines from guc_fwif.h

2025-12-22T18:21:58+00:00

Some upcoming KLVs are sized based on the engine counts, so we need
those defines to be moved to a separate file to include them from
guc_klv_abi.h (which is already included by guc_fwif.h).
Instead of moving just the engine-related defines, it is cleaner to
move all scheduler-related defines (i.e., everything engine or context
related). Note that the legacy GuC defines have not been moved and have
instead been dropped because Xe doesn't support any GuC old enough to
still use them.

While at it, struct guc_ctxt_registration_info has been moved to
guc_submit.c since it doesn't come from the GuC specs (we added it to
make things simpler in our code).

Signed-off-by: Daniele Ceraolo Spurio 
Cc: Michal Wajdeczko 
Reviewed-by: Michal Wajdeczko 
Link: https://patch.msgid.link/20251218223846.1146344-16-daniele.ceraolospurio@intel.com

drm/xe/pf: Add handling for MLRC adverse event threshold

2025-12-17T22:42:46+00:00

Since it is illegal to register a MLRC context when scheduler groups are
enabled, the GuC consider the VF doing so as an adverse event. Like for
other adverse event, there is a threshold for how many times the event
can happen before the GuC throws an error, which we need to add support
for.

Signed-off-by: Daniele Ceraolo Spurio 
Cc: Michal Wajdeczko 
Reviewed-by: Michal Wajdeczko 
Signed-off-by: Michal Wajdeczko 
Acked-by: Matthew Brost 
Link: https://patch.msgid.link/20251216214902.1429-5-michal.wajdeczko@intel.com