<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-toradex.git/drivers/gpu/host1x/dev.c, branch v4.10-rc7</title>
<subtitle>Linux kernel for Apalis and Colibri modules</subtitle>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/'/>
<entry>
<title>gpu: host1x: Whitespace cleanup for readability</title>
<updated>2016-06-23T09:59:30+00:00</updated>
<author>
<name>Thierry Reding</name>
<email>treding@nvidia.com</email>
</author>
<published>2016-06-23T09:35:50+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=0b8070d12ee2ef62e0b07213d843eb508fba966e'/>
<id>0b8070d12ee2ef62e0b07213d843eb508fba966e</id>
<content type='text'>
Insert a number of blank lines in places where they increase readability
of the code. Also collapse various variable declarations to shorten some
functions and finally rewrite some code for readability.

Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Insert a number of blank lines in places where they increase readability
of the code. Also collapse various variable declarations to shorten some
functions and finally rewrite some code for readability.

Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>gpu: host1x: Fix a couple of checkpatch warnings</title>
<updated>2016-06-23T09:59:28+00:00</updated>
<author>
<name>Thierry Reding</name>
<email>treding@nvidia.com</email>
</author>
<published>2016-06-23T09:33:31+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=6df633d0dc333ffce683f46f2856024479b170b9'/>
<id>6df633d0dc333ffce683f46f2856024479b170b9</id>
<content type='text'>
Fix a couple of occurrences where no blank line was used to separate
variable declarations from code or where block comments were wrongly
formatted.

Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Fix a couple of occurrences where no blank line was used to separate
variable declarations from code or where block comments were wrongly
formatted.

Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>gpu: host1x: Set DMA mask</title>
<updated>2016-03-04T15:24:56+00:00</updated>
<author>
<name>Alexandre Courbot</name>
<email>acourbot@nvidia.com</email>
</author>
<published>2016-02-26T09:06:52+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=097452e61366a939a4772332181cea7cdcc74760'/>
<id>097452e61366a939a4772332181cea7cdcc74760</id>
<content type='text'>
The default DMA mask covers a 32 bits address range, but host1x devices
can address a larger range on TK1 and TX1. Set the DMA mask to the range
addressable when we use the IOMMU to prevent the use of bounce buffers.

Signed-off-by: Alexandre Courbot &lt;acourbot@nvidia.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The default DMA mask covers a 32 bits address range, but host1x devices
can address a larger range on TK1 and TX1. Set the DMA mask to the range
addressable when we use the IOMMU to prevent the use of bounce buffers.

Signed-off-by: Alexandre Courbot &lt;acourbot@nvidia.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>gpu: host1x: Add Tegra210 support</title>
<updated>2015-12-14T09:50:33+00:00</updated>
<author>
<name>Thierry Reding</name>
<email>treding@nvidia.com</email>
</author>
<published>2015-03-23T09:46:28+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=a134789a67480e6cc7e50c9dfcbc7adca5016010'/>
<id>a134789a67480e6cc7e50c9dfcbc7adca5016010</id>
<content type='text'>
The host1x unit found in Tegra210 SoCs is very similar to the unit in
Tegra124, but it has 2 additional channels for a total of 14 channels.

Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The host1x unit found in Tegra210 SoCs is very similar to the unit in
Tegra124, but it has 2 additional channels for a total of 14 channels.

Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>gpu: host1x: Use platform_register/unregister_drivers()</title>
<updated>2015-12-14T09:50:32+00:00</updated>
<author>
<name>Thierry Reding</name>
<email>treding@nvidia.com</email>
</author>
<published>2015-12-02T16:24:20+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=28fae81f93d5482f25bb8e9881104ad1157c2cfd'/>
<id>28fae81f93d5482f25bb8e9881104ad1157c2cfd</id>
<content type='text'>
These new helpers simplify implementing multi-driver modules and
properly handle failure to register one driver by unregistering all
previously registered drivers.

Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
These new helpers simplify implementing multi-driver modules and
properly handle failure to register one driver by unregistering all
previously registered drivers.

Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>gpu: host1x: Provide a proper struct bus_type</title>
<updated>2015-01-27T09:09:14+00:00</updated>
<author>
<name>Thierry Reding</name>
<email>treding@nvidia.com</email>
</author>
<published>2014-12-18T14:29:14+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=f4c5cf88fbd50e4779042268947b2e2f90c20484'/>
<id>f4c5cf88fbd50e4779042268947b2e2f90c20484</id>
<content type='text'>
Previously the struct bus_type exported by the host1x infrastructure was
only a very basic skeleton. Turn that implementation into a more full-
fledged bus to support proper probe ordering and power management.

Note that the bus infrastructure needs to be available before any of the
drivers can be registered. This is automatically ensured if all drivers
are built as loadable modules (via symbol dependencies). If all drivers
are built-in there are no such guarantees and the link order determines
the initcall ordering. Adjust drivers/gpu/Makefile to make sure that the
host1x bus infrastructure is initialized prior to any of its users (only
drm/tegra currently).

v2: Fix building host1x and tegra-drm as modules
    Reported-by: Dave Airlie &lt;airlied@gmail.com&gt;

Reviewed-by: Sean Paul &lt;seanpaul@chromium.org&gt;
Reviewed-by: Mark Zhang &lt;markz@nvidia.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Previously the struct bus_type exported by the host1x infrastructure was
only a very basic skeleton. Turn that implementation into a more full-
fledged bus to support proper probe ordering and power management.

Note that the bus infrastructure needs to be available before any of the
drivers can be registered. This is automatically ensured if all drivers
are built as loadable modules (via symbol dependencies). If all drivers
are built-in there are no such guarantees and the link order determines
the initcall ordering. Adjust drivers/gpu/Makefile to make sure that the
host1x bus infrastructure is initialized prior to any of its users (only
drm/tegra currently).

v2: Fix building host1x and tegra-drm as modules
    Reported-by: Dave Airlie &lt;airlied@gmail.com&gt;

Reviewed-by: Sean Paul &lt;seanpaul@chromium.org&gt;
Reviewed-by: Mark Zhang &lt;markz@nvidia.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>gpu: host1x: Add Tegra124 support</title>
<updated>2013-12-19T08:29:52+00:00</updated>
<author>
<name>Thierry Reding</name>
<email>treding@nvidia.com</email>
</author>
<published>2013-11-15T13:58:05+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=e6fff4aaf99763da8a68b237e09cb8d47730f118'/>
<id>e6fff4aaf99763da8a68b237e09cb8d47730f118</id>
<content type='text'>
Tegra124 has 192 syncpoints whereas its predecessors had 32 syncpoints.
This required changes to the hardware register layout.

Signed-off-by: Arto Merilainen &lt;amerilainen@nvidia.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Tegra124 has 192 syncpoints whereas its predecessors had 32 syncpoints.
This required changes to the hardware register layout.

Signed-off-by: Arto Merilainen &lt;amerilainen@nvidia.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>gpu: host1x: Add MIPI pad calibration support</title>
<updated>2013-12-19T08:29:43+00:00</updated>
<author>
<name>Thierry Reding</name>
<email>treding@nvidia.com</email>
</author>
<published>2013-09-02T07:48:53+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=4de6a2d6acb0e2a840f07db17def7e674b9d2bb4'/>
<id>4de6a2d6acb0e2a840f07db17def7e674b9d2bb4</id>
<content type='text'>
This driver adds support to perform calibration of the MIPI pads for CSI
and DSI.

Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This driver adds support to perform calibration of the MIPI pads for CSI
and DSI.

Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>gpu: host1x: Disable clock on probe failure</title>
<updated>2013-10-31T08:55:46+00:00</updated>
<author>
<name>Wei Yongjun</name>
<email>yongjun_wei@trendmicro.com.cn</email>
</author>
<published>2013-10-21T05:37:31+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=9c78c4c38e2c1889f2514c3c76ef190b99f2524a'/>
<id>9c78c4c38e2c1889f2514c3c76ef190b99f2524a</id>
<content type='text'>
Add a missing clk_disable_unprepare() before returning from the driver's
.probe() function on error.

Signed-off-by: Wei Yongjun &lt;yongjun_wei@trendmicro.com.cn&gt;
Reviewed-by: Terje Bergstrom &lt;tbergstrom@nvidia.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add a missing clk_disable_unprepare() before returning from the driver's
.probe() function on error.

Signed-off-by: Wei Yongjun &lt;yongjun_wei@trendmicro.com.cn&gt;
Reviewed-by: Terje Bergstrom &lt;tbergstrom@nvidia.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>gpu: host1x: Add support for Tegra114</title>
<updated>2013-10-31T08:55:41+00:00</updated>
<author>
<name>Thierry Reding</name>
<email>treding@nvidia.com</email>
</author>
<published>2013-09-30T12:17:39+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=5407f31bd37d1289dfd0a2a23a45c5ff2aec8e58'/>
<id>5407f31bd37d1289dfd0a2a23a45c5ff2aec8e58</id>
<content type='text'>
Tegra114 uses a slightly updated version of host1x with an additional
syncpoint.

Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Tegra114 uses a slightly updated version of host1x with an additional
syncpoint.

Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</pre>
</div>
</content>
</entry>
</feed>
