<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-toradex.git/drivers/gpu/nova-core/falcon, branch master</title>
<subtitle>Linux kernel for Apalis and Colibri modules</subtitle>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/'/>
<entry>
<title>gpu: nova-core: convert falcon registers to kernel register macro</title>
<updated>2026-03-26T06:09:44+00:00</updated>
<author>
<name>Alexandre Courbot</name>
<email>acourbot@nvidia.com</email>
</author>
<published>2026-03-25T02:46:21+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=38f7e5450ebfc6f2e046a249a3f629ea7bec8c31'/>
<id>38f7e5450ebfc6f2e046a249a3f629ea7bec8c31</id>
<content type='text'>
Convert all PFALCON, PFALCON2 and PRISCV registers to use the kernel's
register macro and update the code accordingly.

Because they rely on the same types to implement relative registers,
they need to be updated in lockstep.

nova-core's local register macro is now unused, so remove it.

Reviewed-by: Gary Guo &lt;gary@garyguo.net&gt;
Acked-by: Danilo Krummrich &lt;dakr@kernel.org&gt;
Link: https://patch.msgid.link/20260325-b4-nova-register-v4-8-bdf172f0f6ca@nvidia.com
[acourbot@nvidia.com: remove unused import.]
Signed-off-by: Alexandre Courbot &lt;acourbot@nvidia.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Convert all PFALCON, PFALCON2 and PRISCV registers to use the kernel's
register macro and update the code accordingly.

Because they rely on the same types to implement relative registers,
they need to be updated in lockstep.

nova-core's local register macro is now unused, so remove it.

Reviewed-by: Gary Guo &lt;gary@garyguo.net&gt;
Acked-by: Danilo Krummrich &lt;dakr@kernel.org&gt;
Link: https://patch.msgid.link/20260325-b4-nova-register-v4-8-bdf172f0f6ca@nvidia.com
[acourbot@nvidia.com: remove unused import.]
Signed-off-by: Alexandre Courbot &lt;acourbot@nvidia.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>gpu: nova-core: convert FUSE registers to kernel register macro</title>
<updated>2026-03-26T06:08:28+00:00</updated>
<author>
<name>Alexandre Courbot</name>
<email>acourbot@nvidia.com</email>
</author>
<published>2026-03-25T02:46:19+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=1a8f58c5e125d61c597d420237750d2dcea32ce8'/>
<id>1a8f58c5e125d61c597d420237750d2dcea32ce8</id>
<content type='text'>
Convert all FUSE registers to use the kernel's register macro and update
the code accordingly.

Reviewed-by: Eliot Courtney &lt;ecourtney@nvidia.com&gt;
Reviewed-by: Gary Guo &lt;gary@garyguo.net&gt;
Acked-by: Danilo Krummrich &lt;dakr@kernel.org&gt;
Link: https://patch.msgid.link/20260325-b4-nova-register-v4-6-bdf172f0f6ca@nvidia.com
Signed-off-by: Alexandre Courbot &lt;acourbot@nvidia.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Convert all FUSE registers to use the kernel's register macro and update
the code accordingly.

Reviewed-by: Eliot Courtney &lt;ecourtney@nvidia.com&gt;
Reviewed-by: Gary Guo &lt;gary@garyguo.net&gt;
Acked-by: Danilo Krummrich &lt;dakr@kernel.org&gt;
Link: https://patch.msgid.link/20260325-b4-nova-register-v4-6-bdf172f0f6ca@nvidia.com
Signed-off-by: Alexandre Courbot &lt;acourbot@nvidia.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>gpu: nova-core: convert GC6 registers to kernel register macro</title>
<updated>2026-03-26T06:08:28+00:00</updated>
<author>
<name>Alexandre Courbot</name>
<email>acourbot@nvidia.com</email>
</author>
<published>2026-03-25T02:46:18+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=ffabad08e46e425781a5d3a7f9e6a64c12e36de2'/>
<id>ffabad08e46e425781a5d3a7f9e6a64c12e36de2</id>
<content type='text'>
Convert all GC6 registers to use the kernel's register macro and update
the code accordingly.

Reviewed-by: Eliot Courtney &lt;ecourtney@nvidia.com&gt;
Reviewed-by: Gary Guo &lt;gary@garyguo.net&gt;
Acked-by: Danilo Krummrich &lt;dakr@kernel.org&gt;
Link: https://patch.msgid.link/20260325-b4-nova-register-v4-5-bdf172f0f6ca@nvidia.com
Signed-off-by: Alexandre Courbot &lt;acourbot@nvidia.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Convert all GC6 registers to use the kernel's register macro and update
the code accordingly.

Reviewed-by: Eliot Courtney &lt;ecourtney@nvidia.com&gt;
Reviewed-by: Gary Guo &lt;gary@garyguo.net&gt;
Acked-by: Danilo Krummrich &lt;dakr@kernel.org&gt;
Link: https://patch.msgid.link/20260325-b4-nova-register-v4-5-bdf172f0f6ca@nvidia.com
Signed-off-by: Alexandre Courbot &lt;acourbot@nvidia.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>gpu: nova-core: add PIO support for loading firmware images</title>
<updated>2026-03-09T01:39:07+00:00</updated>
<author>
<name>Timur Tabi</name>
<email>ttabi@nvidia.com</email>
</author>
<published>2026-03-06T04:52:43+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=c1d2f7471ba7a21eb3c68b8405365f7e1eac5c9d'/>
<id>c1d2f7471ba7a21eb3c68b8405365f7e1eac5c9d</id>
<content type='text'>
Turing and GA100 use programmed I/O (PIO) instead of DMA to upload
firmware images into Falcon memory.

Signed-off-by: Timur Tabi &lt;ttabi@nvidia.com&gt;
Co-developed-by: Alexandre Courbot &lt;acourbot@nvidia.com&gt;
Signed-off-by: Alexandre Courbot &lt;acourbot@nvidia.com&gt;
Acked-by: Danilo Krummrich &lt;dakr@kernel.org&gt;
Link: https://patch.msgid.link/20260306-turing_prep-v11-6-8f0042c5d026@nvidia.com
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Turing and GA100 use programmed I/O (PIO) instead of DMA to upload
firmware images into Falcon memory.

Signed-off-by: Timur Tabi &lt;ttabi@nvidia.com&gt;
Co-developed-by: Alexandre Courbot &lt;acourbot@nvidia.com&gt;
Signed-off-by: Alexandre Courbot &lt;acourbot@nvidia.com&gt;
Acked-by: Danilo Krummrich &lt;dakr@kernel.org&gt;
Link: https://patch.msgid.link/20260306-turing_prep-v11-6-8f0042c5d026@nvidia.com
</pre>
</div>
</content>
</entry>
<entry>
<title>gpu: nova-core: add Falcon HAL method load_method()</title>
<updated>2026-01-24T01:48:59+00:00</updated>
<author>
<name>Timur Tabi</name>
<email>ttabi@nvidia.com</email>
</author>
<published>2026-01-22T22:28:44+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=ab2aad252fe21347674cf969a5e9d44d69e403bb'/>
<id>ab2aad252fe21347674cf969a5e9d44d69e403bb</id>
<content type='text'>
Some GPUs do not support using DMA to transfer code/data from system
memory to Falcon memory, and instead must use programmed I/O (PIO).
Add a function to the Falcon HAL to indicate whether a given GPU's
Falcons support DMA for this purpose.

Signed-off-by: Timur Tabi &lt;ttabi@nvidia.com&gt;
Reviewed-by: Gary Guo &lt;gary@garyguo.net&gt;
Acked-by: Danilo Krummrich &lt;dakr@kernel.org&gt;
Link: https://patch.msgid.link/20260122222848.2555890-10-ttabi@nvidia.com
[acourbot@nvidia.com: add short code to call into the HAL.]
[acourbot@nvidia.com: make `dma_load` private as per feedback.]
Signed-off-by: Alexandre Courbot &lt;acourbot@nvidia.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Some GPUs do not support using DMA to transfer code/data from system
memory to Falcon memory, and instead must use programmed I/O (PIO).
Add a function to the Falcon HAL to indicate whether a given GPU's
Falcons support DMA for this purpose.

Signed-off-by: Timur Tabi &lt;ttabi@nvidia.com&gt;
Reviewed-by: Gary Guo &lt;gary@garyguo.net&gt;
Acked-by: Danilo Krummrich &lt;dakr@kernel.org&gt;
Link: https://patch.msgid.link/20260122222848.2555890-10-ttabi@nvidia.com
[acourbot@nvidia.com: add short code to call into the HAL.]
[acourbot@nvidia.com: make `dma_load` private as per feedback.]
Signed-off-by: Alexandre Courbot &lt;acourbot@nvidia.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>gpu: nova-core: add NV_PFALCON_FALCON_ENGINE::reset_engine()</title>
<updated>2026-01-23T23:45:13+00:00</updated>
<author>
<name>Timur Tabi</name>
<email>ttabi@nvidia.com</email>
</author>
<published>2026-01-22T22:28:43+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=a75718afc9a5c61d9266d5d0010228a6a3bb7233'/>
<id>a75718afc9a5c61d9266d5d0010228a6a3bb7233</id>
<content type='text'>
Add a method for the NV_PFALCON_FALCON_ENGINE register that reset the
Falcon, and update the reset_eng() HAL functions to use it.

Signed-off-by: Timur Tabi &lt;ttabi@nvidia.com&gt;
Reviewed-by: Gary Guo &lt;gary@garyguo.net&gt;
Acked-by: Danilo Krummrich &lt;dakr@kernel.org&gt;
Link: https://patch.msgid.link/20260122222848.2555890-9-ttabi@nvidia.com
Signed-off-by: Alexandre Courbot &lt;acourbot@nvidia.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add a method for the NV_PFALCON_FALCON_ENGINE register that reset the
Falcon, and update the reset_eng() HAL functions to use it.

Signed-off-by: Timur Tabi &lt;ttabi@nvidia.com&gt;
Reviewed-by: Gary Guo &lt;gary@garyguo.net&gt;
Acked-by: Danilo Krummrich &lt;dakr@kernel.org&gt;
Link: https://patch.msgid.link/20260122222848.2555890-9-ttabi@nvidia.com
Signed-off-by: Alexandre Courbot &lt;acourbot@nvidia.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>gpu: nova-core: Add basic Turing HAL</title>
<updated>2026-01-23T23:45:13+00:00</updated>
<author>
<name>Timur Tabi</name>
<email>ttabi@nvidia.com</email>
</author>
<published>2026-01-22T22:28:42+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=954b38fd0a8f5feaa44a9c5c05ed771815949d95'/>
<id>954b38fd0a8f5feaa44a9c5c05ed771815949d95</id>
<content type='text'>
Add the basic HAL for recognizing Turing GPUs.  This isn't enough
to support booting GSP-RM on Turing, but it's a start.

Note that GA100, which boots using the same method as Turing, is not
supported yet.

Signed-off-by: Timur Tabi &lt;ttabi@nvidia.com&gt;
Reviewed-by: John Hubbard &lt;jhubbard@nvidia.com&gt;
Reviewed-by: Gary Guo &lt;gary@garyguo.net&gt;
Acked-by: Danilo Krummrich &lt;dakr@kernel.org&gt;
Link: https://patch.msgid.link/20260122222848.2555890-8-ttabi@nvidia.com
Signed-off-by: Alexandre Courbot &lt;acourbot@nvidia.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add the basic HAL for recognizing Turing GPUs.  This isn't enough
to support booting GSP-RM on Turing, but it's a start.

Note that GA100, which boots using the same method as Turing, is not
supported yet.

Signed-off-by: Timur Tabi &lt;ttabi@nvidia.com&gt;
Reviewed-by: John Hubbard &lt;jhubbard@nvidia.com&gt;
Reviewed-by: Gary Guo &lt;gary@garyguo.net&gt;
Acked-by: Danilo Krummrich &lt;dakr@kernel.org&gt;
Link: https://patch.msgid.link/20260122222848.2555890-8-ttabi@nvidia.com
Signed-off-by: Alexandre Courbot &lt;acourbot@nvidia.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>gpu: nova-core: move some functions into the HAL</title>
<updated>2026-01-23T23:45:13+00:00</updated>
<author>
<name>Timur Tabi</name>
<email>ttabi@nvidia.com</email>
</author>
<published>2026-01-22T22:28:41+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=82ed3243219d160601fdb98742633bee7dc6f360'/>
<id>82ed3243219d160601fdb98742633bee7dc6f360</id>
<content type='text'>
A few Falcon methods are actually GPU-specific, so move them
into the HAL.

Signed-off-by: Timur Tabi &lt;ttabi@nvidia.com&gt;
Reviewed-by: John Hubbard &lt;jhubbard@nvidia.com&gt;
Reviewed-by: Gary Guo &lt;gary@garyguo.net&gt;
Acked-by: Danilo Krummrich &lt;dakr@kernel.org&gt;
Link: https://patch.msgid.link/20260122222848.2555890-7-ttabi@nvidia.com
Signed-off-by: Alexandre Courbot &lt;acourbot@nvidia.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
A few Falcon methods are actually GPU-specific, so move them
into the HAL.

Signed-off-by: Timur Tabi &lt;ttabi@nvidia.com&gt;
Reviewed-by: John Hubbard &lt;jhubbard@nvidia.com&gt;
Reviewed-by: Gary Guo &lt;gary@garyguo.net&gt;
Acked-by: Danilo Krummrich &lt;dakr@kernel.org&gt;
Link: https://patch.msgid.link/20260122222848.2555890-7-ttabi@nvidia.com
Signed-off-by: Alexandre Courbot &lt;acourbot@nvidia.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>gpu: nova-core: add missing newlines to several print strings</title>
<updated>2026-01-12T13:44:06+00:00</updated>
<author>
<name>Timur Tabi</name>
<email>ttabi@nvidia.com</email>
</author>
<published>2026-01-07T20:16:47+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=654826aa4a8f25cf825ad9254f37e6cb5092098f'/>
<id>654826aa4a8f25cf825ad9254f37e6cb5092098f</id>
<content type='text'>
Although the dev_xx!() macro calls do not technically require terminating
newlines for the format strings, they should be added anyway to maintain
consistency, both within Rust code and with the C versions.

Signed-off-by: Timur Tabi &lt;ttabi@nvidia.com&gt;
Reviewed-by: John Hubbard &lt;jhubbard@nvidia.com&gt;
Link: https://patch.msgid.link/20260107201647.2490140-2-ttabi@nvidia.com
Signed-off-by: Danilo Krummrich &lt;dakr@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Although the dev_xx!() macro calls do not technically require terminating
newlines for the format strings, they should be added anyway to maintain
consistency, both within Rust code and with the C versions.

Signed-off-by: Timur Tabi &lt;ttabi@nvidia.com&gt;
Reviewed-by: John Hubbard &lt;jhubbard@nvidia.com&gt;
Link: https://patch.msgid.link/20260107201647.2490140-2-ttabi@nvidia.com
Signed-off-by: Danilo Krummrich &lt;dakr@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>gpu: nova-core: sequencer: Implement core resume operation</title>
<updated>2025-11-15T12:54:18+00:00</updated>
<author>
<name>Joel Fernandes</name>
<email>joelagnelf@nvidia.com</email>
</author>
<published>2025-11-14T19:55:50+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=774109857b70e4af0908ce20d99e913ba5ba611a'/>
<id>774109857b70e4af0908ce20d99e913ba5ba611a</id>
<content type='text'>
Implement core resume operation. This is the last step of the sequencer
resulting in resume of the GSP and proceeding to INIT_DONE stage of GSP
boot.

Signed-off-by: Joel Fernandes &lt;joelagnelf@nvidia.com&gt;
Reviewed-by: Lyude Paul &lt;lyude@redhat.com&gt;
Signed-off-by: Alexandre Courbot &lt;acourbot@nvidia.com&gt;
Message-ID: &lt;20251114195552.739371-12-joelagnelf@nvidia.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Implement core resume operation. This is the last step of the sequencer
resulting in resume of the GSP and proceeding to INIT_DONE stage of GSP
boot.

Signed-off-by: Joel Fernandes &lt;joelagnelf@nvidia.com&gt;
Reviewed-by: Lyude Paul &lt;lyude@redhat.com&gt;
Signed-off-by: Alexandre Courbot &lt;acourbot@nvidia.com&gt;
Message-ID: &lt;20251114195552.739371-12-joelagnelf@nvidia.com&gt;
</pre>
</div>
</content>
</entry>
</feed>
