Pull drm fixes from Dave Airlie:
 "This is the weekly drm fixes, amdgpu leading the way with some i915,
  nouveau and other fixes.

  There should be a bunch of xe fixes, but their tree got screwed up so
  I guess I'll send those next week once they cleanup whatever happened.

  atomic:
   - Fix CRTC dma-fence handling

  drm:
   - Add parsing for additional HDMI 2.2 FRL rates

  bridge:
   - nwl-dsi: Fix LCDIF handling

  dma-buf:
   - Fix IOVA offset
   - Restore the scatter-list entry count before freeing

  dp:
   - Keep MOT set between messages when no_zero_sized is set

  panel:
   - visionox-r66451: Set brightness MSB first; Increase reset waiting time

  panic:
   - Fix display loop
   - Fix line parsing

  sched:
   - Fix out of bounds entity priority check
   - Adjust run-queue when changing priority at runtime

  amdgpu:
   - UALink fixes
   - RAS fixes
   - GEM_OP fix
   - Parse IB fixes
   - CS user fence fix
   - GPU reset fixes
   - Multi-media idle work handler cleanup fixes
   - UserQ fixes
   - CRC fix
   - SR-IOV fixes
   - IP discovery fix
   - HDMI 2.2 FRL fixes
   - DDC pin fix
   - HUBP fix
   - SPM fix
   - DCN 3.2 fixes
   - VRR/freesync fix
   - Seamless boot fix
   - SMU 13.0.7 fix
   - Backlight fix
   - dma-buf fixes
   - GPUVM fixes
   - Move DMCUB back to VRAM
   - Non-DC audio fix
   - BACO fix

  amdkfd:
   - Fix WPTR BO eviction fence handling
   - GPUVM locking fix

  i915:
   - Fix GitLab #8991 where tiled displays (LG UltraFine 5K) broken on PTL
   - Limit NVL TRANS_VTOTAL.Vtotal skip display workaround to A-step
   - Single scaler per pipe number to 1 and disable pipe joiner on WCL
   - Add quirk to force backlight type on some TUXEDO devices
   - Fix "CMTG: A disable timeout" splat
   - Fix intel_vrr_dcb_vmin_vblank_start
   - Bunch of PSR fixes
   - Static checker fixes

  etnaviv:
   - Fix NULL dereference in etnaviv_unbind()
   - Flush the tile status cache through both the PE and BLT

  imagination:
   - Align rogue_fwif_hwrtdata to 64 bytes

  loongson:
   - Fix BO handling in several places

  nouveau:
   - Map Kepler video engine contexts non-privileged
   - Clear use.enabled when subdev init fails
   - Avoid running VBIOS twice
   - Fix CE channel creation on pre-Kepler GPUs

  v3d:
   - Initialize job timedout_batches
   - Fix cache_clean_lock

  vc4:
   - Move output fence and BO unreserve out of job_lock
   - Power down PYH when output is disabled
   - hdmi: Fix scrambling"

* tag 'drm-fixes-2026-11-07' of https://gitlab.freedesktop.org/drm/kernel: (91 commits)
  drm/sched: Adjust run-queue when changing priority at runtime
  drm/sched: Fix out of bounds entity priority check
  drm/etnaviv: Flush the tile status cache through both the PE and BLT
  drm/etnaviv: Fix NULL dereference on unbind without PPU flop reset
  drm/nouveau: Fix CE channel creation on pre-Kepler GPUs
  drm/nouveau/devinit/gf100-: try to avoid double-running vbios scripts
  drm/dp: keep MOT set between messages when no_zero_sized is set
  drm/nouveau/nvkm: clear use.enabled when subdev init fails
  drm/nouveau/fifo: map Kepler video engine contexts non-privileged
  drm/amdgpu: don't drop the gang dependency fence twice
  drm/amdgpu: stop GPU recovery wait for the JPEG/VCN idle work
  drm/amd/pm: track BACO state in the SMU v11 ArmD3 sequence
  drm/amdgpu: Only enable HDMI audio if display supports it
  Revert "drm/amd/display: Allocate DCN32/1 dmub memory to GTT"
  drm/amdgpu: don't walk the CS chunks when allocating them failed
  drm/amdgpu/vce: don't allocate a scheduler fence in the direct IB test
  drm/amdgpu: rewrite all PTEs of the BOs after a VM reset
  drm/amdgpu: unlock the VM and BO when attaching a KFD BO fails
  drm/amdgpu: drop the dma-buf reference when a KFD import fails
  drm/amdgpu: Clamp the ATIF backlight curve to its 99 points
  ...

PerfOpt is usable by integrated GPUs in identity mode. Enable it from
the IOMMU driver's domain attachment paths instead of requiring an
amdgpu policy knob and exported enable/disable interfaces.

Mark supported integrated GPUs as PerfOpt-eligible when selecting their
default identity domain. Skip GCR3 setup and ATS/PRI/PASID enablement for
these identity attachments, then enable PerfOpt after installing the DTE.
Clear PerfOpt before attaching an eligible GPU to a translated or blocked
domain, including unmanaged domains used by VFIO. Propagate failures to
clear bypass, but keep a completed identity attachment successful if the
optional PerfOpt enable fails.

Clear inherited PerfOpt state during initialization, including when a crash
kernel reuses device tables. Read feature support directly from hardware
because cached features may not be available yet, and stop initialization
if the initial clear fails.

Each IOMMU has at most one PerfOpt-eligible GPU, so track activation with a
boolean under the IOMMU lock. Preserve this state while clearing hardware
at suspend and shutdown, and restore the bit on resume only where it was
active. Do not enable PerfOpt unconditionally during early IOMMU
initialization.

Remove the amdgpu parameter, driver callbacks, and exported interfaces.
Translated attachments retain their normal device capability setup.

Suggested-by: Jason Gunthorpe <jgg@ziepe.ca>
Signed-off-by: Mario Limonciello (AMD) <superm1@kernel.org>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Vasant Hegde <vasant.hegde@amd.com>
Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>

amd-drm-fixes-7.4-2026-11-05:

amdgpu:
- UALink fixes
- RAS fixes
- GEM_OP fix
- Parse IB fixes
- CS user fence fix
- GPU reset fixes
- Multi-media idle work handler cleanup fixes
- UserQ fixes
- CRC fix
- SR-IOV fixes
- IP discovery fix
- HDMI 2.2 FRL fixes
- DDC pin fix
- HUBP fix
- SPM fix
- DCN 3.2 fixes
- VRR/freesync fix
- Seamless boot fix
- SMU 13.0.7 fix
- Backlight fix
- dma-buf fixes
- GPUVM fixes
- Move DMCUB back to VRAM
- Non-DC audio fix
- BACO fix

amdkfd:
- Fix WPTR BO eviction fence handling
- GPUVM locking fix

drm:
- Add parsing for additional HDMI 2.2 FRL rates

Signed-off-by: Dave Airlie <airlied@redhat.com>

From: Alex Deucher <alexander.deucher@amd.com>
Link: https://patch.msgid.link/20261105212000.2846044-1-alexander.deucher@amd.com

Short summary of fixes pull:

atomic:
- Fix CRTC dma-fence handling

bridge:
- nwl-dsi: Fix LCDIF handling

dma-buf:
- Fix IOVA offset
- Restore the scatter-list entry count before freeing

dp:
- Keep MOT set between messages when no_zero_sized is set

etnaviv:
- Fix NULL dereference in etnaviv_unbind()
- Flush the tile status cache through both the PE and BLT

imagination:
- Align rogue_fwif_hwrtdata to 64 bytes

loongson:
- Fix BO handling in several places

nouveau:
- Map Kepler video engine contexts non-privileged
- Clear use.enabled when subdev init fails
- Avoid running VBIOS twice
- Fix CE channel creation on pre-Kepler GPUs

panel:
- visionox-r66451: Set brightness MSB first; Increase reset waiting time

panic:
- Fix display loop
- Fix line parsing

sched:
- Fix out of bounds entity priority check
- Adjust run-queue when changing priority at runtime

v3d:
- Initialize job timedout_batches
- Fix cache_clean_lock

vc4:
- Move output fence and BO unreserve out of job_lock
- Power down PYH when output is disabled
- hdmi: Fix scrambling

Signed-off-by: Dave Airlie <airlied@redhat.com>

From: Thomas Zimmermann <tzimmermann@suse.de>
Link: https://patch.msgid.link/20261105143915.GA896462@linux.fritz.box

Another consequence of the recent revert of

commit 77a6809f1dc3 ("drm/sched: Remove FIFO and RR and simplify to a single run queue")

is that after the revert we need to adjust entity->rq_priority when
runtime priority changes are requested.

Only amdgpu does that so the impact is minimal. Also considering dynamic
priority changes are largely broken there, due currently broken entity
scheduler list handling where the special case of a single scheduler can
never change it's run-queue. And coupled with the fact for the rest a two-
tier approach of drm_sched_entity_set_priority() and
drm_sched_entity_modify_sched() is used, where later directly maps to
different hardware queue priority by replacing the set of schedulers
completely.

Hence the regression is limited to rings which have multiple instances
other than compute and graphics, which would be SDMA only, for which I am
not sure any userspace actually does dynamic priority changes in the first
place.

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@igalia.com>
Fixes: 2fa4d8e2c109 ("drm/sched: Add fair scheduling policy")
Cc: Christian König <christian.koenig@amd.com>
Cc: Danilo Krummrich <dakr@kernel.org>
Cc: Matthew Brost <matthew.brost@intel.com>
Cc: Philipp Stanner <phasta@kernel.org>
Cc: stable@vger.kernel.org # v7.2+
[phasta: fix checkpatch error]
Signed-off-by: Philipp Stanner <phasta@kernel.org>
Link: https://patch.msgid.link/20261021094227.48034-3-tvrtko.ursulin@igalia.com

When the out of range priority at entity init time is clamped to the
number of run queues in the supplied scheduler the internal run-queue
priority needs to be adjusted as well.

There is no impact since none of the drivers hit the clamping path, but
we still need to address it by moving the entity->rq_priority assignment
to after the clamping is done.

Note that a lot of this will hopefully get removed once again when the
single run-queue simplification lands.

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@igalia.com>
Fixes: 2fa4d8e2c109 ("drm/sched: Add fair scheduling policy")
Cc: Christian König <christian.koenig@amd.com>
Cc: Danilo Krummrich <dakr@kernel.org>
Cc: Matthew Brost <matthew.brost@intel.com>
Cc: Philipp Stanner <phasta@kernel.org>
Cc: stable@vger.kernel.org # v7.2+
Signed-off-by: Philipp Stanner <phasta@kernel.org>
Link: https://patch.msgid.link/20261021094227.48034-2-tvrtko.ursulin@igalia.com

Since commit f232d9ec029c ("drm/etnaviv: fix TS cache flushing on GPUs
with BLT engine"), jobs on GPUs with a BLT engine use a BLT command to
flush the tile status cache instead of TS_FLUSH_CACHE, which is broken
on most of these GPUs.

GC7000 r6008/r6009 and GC8200 r6401 are the other way around:
TS_FLUSH_CACHE works, but the BLT command does not flush the cache.
The vendor driver handles these GPUs using TS_FLUSH_CACHE, but the
etnaviv kernel driver has no way to identify them.

As a result, dirty tile status cache lines survive the end of a job.
They are written back by the next cache flush, using the page table of
the job issuing it. If that job belongs to another process, the write
goes to the wrong address space.

On GC7000 r6009 this causes MMU faults and GPU recoveries blamed on an
innocent process. I see around 1100 per run of a multisample
depth/stencil test running alongside two other GPU clients.

Emit both flushes at the end of every job on GPUs with a BLT engine.
Whichever does not work on a given GPU is a no-op. Since dirty lines
are only written back once, this costs one additional state load per
job.

Fixes: f232d9ec029c ("drm/etnaviv: fix TS cache flushing on GPUs with BLT engine")
Cc: stable@vger.kernel.org
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Link: https://patch.msgid.link/20261102-etna-pe-ts-flush-v1-1-e4454ed86f85@igalia.com
Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>

flop_reset_data_ppu is only allocated on GPUs that need the PPU flop
reset. However, etnaviv_unbind(..) frees it unconditionally, and
etnaviv_cmdbuf_free(..) dereferences cmdbuf->suballoc before checking
whether cmdbuf is NULL.

As a result, unloading the driver on GPUs that do not need the PPU
flop reset causes a NULL pointer dereference at address 0.

Fixes: 85ba57ad88cf ("drm/etnaviv: Add PPU flop reset")
Cc: stable@vger.kernel.org
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Link: https://patch.msgid.link/20261102-etnaviv-unbind-flop-fix-v1-1-588fd16f6768@igalia.com
Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>

Commit 04e0481526e3 ("nouveau/dmem: Fix privileged error in copy engine
channel") changed nouveau_accel_ce_init() to unconditionally request a
privileged channel (priv = true) when calling nouveau_channel_new().

However, privileged channels (func->ramfc->priv) are only supported on
Kepler (gk104_chan_ramfc) and newer FIFO implementations. On pre-Kepler
GPUs that expose a Copy Engine runlist, func->ramfc->priv is false,
which causes nvkm_chan_new_() to reject the channel creation with
-EINVAL:

  nouveau 0000:01:00.0: DRM: failed to create ce channel, -22

Only request a privileged CE channel when device->info.family >=
NV_DEVICE_INFO_V0_KEPLER.

Fixes: 04e0481526e3 ("nouveau/dmem: Fix privileged error in copy engine channel")
Signed-off-by: Munique Feitoza <muniquefeitoz4@gmail.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Link: https://patch.msgid.link/20261030202809.28723-1-muniquefeitoz4@gmail.com

Turns out some VBIOSes don't actually set the bit in question in 2240c.
Use the nv50-style detection to try avoiding running the vbios twice.

Fixes: a6a0f67ca7aa ("drm/nouveau/devinit/gf100-: detect if BIOS invoked devinit")
Link: https://bugs.freedesktop.org/show_bug.cgi?id=97620
Cc: <stable@vger.kernel.org> # v4.6+
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Link: https://patch.msgid.link/20170128205347.17453-1-imirkin@alum.mit.edu