<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-toradex.git/drivers/i2c, branch v3.18.13</title>
<subtitle>Linux kernel for Apalis and Colibri modules</subtitle>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/'/>
<entry>
<title>Revert "i2c: core: Dispose OF IRQ mapping at client removal time"</title>
<updated>2015-03-28T13:53:02+00:00</updated>
<author>
<name>Jakub Kicinski</name>
<email>kubakici@wp.pl</email>
</author>
<published>2015-03-11T17:35:36+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=9297c326266dd08af2c7be30cbab32787eef9b9f'/>
<id>9297c326266dd08af2c7be30cbab32787eef9b9f</id>
<content type='text'>
[ Upstream commit a49445727014216703a3c28ccee4cef36d41571e ]

This reverts commit e4df3a0b6228
("i2c: core: Dispose OF IRQ mapping at client removal time")

Calling irq_dispose_mapping() will destroy the mapping and disassociate
the IRQ from the IRQ chip to which it belongs. Keeping it is OK, because
existent mappings are reused properly.

Also, this commit breaks drivers using devm* for IRQ management on
OF-based systems because devm* cleanup happens in device code, after
bus's remove() method returns.

Signed-off-by: Jakub Kicinski &lt;kubakici@wp.pl&gt;
Reported-by: Sébastien Szymanski &lt;sebastien.szymanski@armadeus.com&gt;
Acked-by: Laurent Pinchart &lt;laurent.pinchart@ideasonboard.com&gt;
Acked-by: Dmitry Torokhov &lt;dmitry.torokhov@gmail.com&gt;
[wsa: updated the commit message with findings fromt the other bug report]
Signed-off-by: Wolfram Sang &lt;wsa@the-dreams.de&gt;
Cc: stable@kernel.org
Fixes: e4df3a0b6228

Signed-off-by: Sasha Levin &lt;sasha.levin@oracle.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
[ Upstream commit a49445727014216703a3c28ccee4cef36d41571e ]

This reverts commit e4df3a0b6228
("i2c: core: Dispose OF IRQ mapping at client removal time")

Calling irq_dispose_mapping() will destroy the mapping and disassociate
the IRQ from the IRQ chip to which it belongs. Keeping it is OK, because
existent mappings are reused properly.

Also, this commit breaks drivers using devm* for IRQ management on
OF-based systems because devm* cleanup happens in device code, after
bus's remove() method returns.

Signed-off-by: Jakub Kicinski &lt;kubakici@wp.pl&gt;
Reported-by: Sébastien Szymanski &lt;sebastien.szymanski@armadeus.com&gt;
Acked-by: Laurent Pinchart &lt;laurent.pinchart@ideasonboard.com&gt;
Acked-by: Dmitry Torokhov &lt;dmitry.torokhov@gmail.com&gt;
[wsa: updated the commit message with findings fromt the other bug report]
Signed-off-by: Wolfram Sang &lt;wsa@the-dreams.de&gt;
Cc: stable@kernel.org
Fixes: e4df3a0b6228

Signed-off-by: Sasha Levin &lt;sasha.levin@oracle.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>i2c: s3c2410: fix ABBA deadlock by keeping clock prepared</title>
<updated>2015-02-06T06:36:04+00:00</updated>
<author>
<name>Paul Osmialowski</name>
<email>p.osmialowsk@samsung.com</email>
</author>
<published>2015-01-19T16:03:33+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=5e1b35cfd680fe9d67bb2754393ff8e1e8ddf713'/>
<id>5e1b35cfd680fe9d67bb2754393ff8e1e8ddf713</id>
<content type='text'>
commit 34e81ad5f0b60007c95995eb7803da7e00c6c611 upstream.

This patch solves deadlock between clock prepare mutex and regmap mutex reported
by Tomasz Figa in [1] by implementing solution from [2]: "always leave the clock
of the i2c controller in a prepared state".

[1] https://lkml.org/lkml/2014/7/2/171
[2] https://lkml.org/lkml/2014/7/2/207

On each i2c transfer handled by s3c24xx_i2c_xfer(), clk_prepare_enable() was
called, which calls clk_prepare() then clk_enable(). clk_prepare() takes
prepare_lock mutex before proceeding. Note that i2c transfer functions are
invoked from many places in kernel, typically with some other additional lock
held.

It may happen that function on CPU1 (e.g. regmap_update_bits()) has taken a
mutex (i.e. regmap lock mutex) then it attempts i2c communication in order to
proceed (so it needs to obtain clock related prepare_lock mutex during transfer
preparation stage due to clk_prepare() call). At the same time other task on
CPU0 wants to operate on clock (e.g. to (un)prepare clock for some other reason)
so it has taken prepare_lock mutex.

CPU0:                        CPU1:
clk_disable_unused()         regulator_disable()
  clk_prepare_lock()           map-&gt;lock(map-&gt;lock_arg)
  regmap_read()                s3c24xx_i2c_xfer()
    map-&gt;lock(map-&gt;lock_arg)     clk_prepare_lock()

Implemented solution from [2] leaves i2c clock prepared. Preparation is done in
s3c24xx_i2c_probe() function. Without this patch, it is immediately unprepared
by clk_disable_unprepare() call. I've replaced this call with clk_disable() and
I've added clk_unprepare() call in s3c24xx_i2c_remove().

The s3c24xx_i2c_xfer() function now uses clk_enable() instead of
clk_prepare_enable() (and clk_disable() instead of clk_unprepare_disable()).

Signed-off-by: Paul Osmialowski &lt;p.osmialowsk@samsung.com&gt;
Reviewed-by: Krzysztof Kozlowski &lt;k.kozlowski@samsung.com&gt;
Signed-off-by: Wolfram Sang &lt;wsa@the-dreams.de&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;

</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
commit 34e81ad5f0b60007c95995eb7803da7e00c6c611 upstream.

This patch solves deadlock between clock prepare mutex and regmap mutex reported
by Tomasz Figa in [1] by implementing solution from [2]: "always leave the clock
of the i2c controller in a prepared state".

[1] https://lkml.org/lkml/2014/7/2/171
[2] https://lkml.org/lkml/2014/7/2/207

On each i2c transfer handled by s3c24xx_i2c_xfer(), clk_prepare_enable() was
called, which calls clk_prepare() then clk_enable(). clk_prepare() takes
prepare_lock mutex before proceeding. Note that i2c transfer functions are
invoked from many places in kernel, typically with some other additional lock
held.

It may happen that function on CPU1 (e.g. regmap_update_bits()) has taken a
mutex (i.e. regmap lock mutex) then it attempts i2c communication in order to
proceed (so it needs to obtain clock related prepare_lock mutex during transfer
preparation stage due to clk_prepare() call). At the same time other task on
CPU0 wants to operate on clock (e.g. to (un)prepare clock for some other reason)
so it has taken prepare_lock mutex.

CPU0:                        CPU1:
clk_disable_unused()         regulator_disable()
  clk_prepare_lock()           map-&gt;lock(map-&gt;lock_arg)
  regmap_read()                s3c24xx_i2c_xfer()
    map-&gt;lock(map-&gt;lock_arg)     clk_prepare_lock()

Implemented solution from [2] leaves i2c clock prepared. Preparation is done in
s3c24xx_i2c_probe() function. Without this patch, it is immediately unprepared
by clk_disable_unprepare() call. I've replaced this call with clk_disable() and
I've added clk_unprepare() call in s3c24xx_i2c_remove().

The s3c24xx_i2c_xfer() function now uses clk_enable() instead of
clk_prepare_enable() (and clk_disable() instead of clk_unprepare_disable()).

Signed-off-by: Paul Osmialowski &lt;p.osmialowsk@samsung.com&gt;
Reviewed-by: Krzysztof Kozlowski &lt;k.kozlowski@samsung.com&gt;
Signed-off-by: Wolfram Sang &lt;wsa@the-dreams.de&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;

</pre>
</div>
</content>
</entry>
<entry>
<title>i2c: cadence: Set the hardware time-out register to maximum value</title>
<updated>2014-12-04T18:25:41+00:00</updated>
<author>
<name>Vishnu Motghare</name>
<email>vishnum@xilinx.com</email>
</author>
<published>2014-12-03T12:35:25+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=681d15a0f527af7ab3a783e1037de86fbcb136ac'/>
<id>681d15a0f527af7ab3a783e1037de86fbcb136ac</id>
<content type='text'>
Cadence I2C controller has bug wherein it generates invalid read transactions
after timeout in master receiver mode. This driver does not use the HW
timeout and this interrupt is disabled but the feature itself cannot be
disabled. Hence, this patch writes the maximum value (0xFF) to this register.
This is one of the workarounds to this bug and it will not avoid the issue
completely but reduces the chances of error.

Signed-off-by: Vishnu Motghare &lt;vishnum@xilinx.com&gt;
Signed-off-by: Harini Katakam &lt;harinik@xilinx.com&gt;
Signed-off-by: Wolfram Sang &lt;wsa@the-dreams.de&gt;
Cc: stable@kernel.org
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Cadence I2C controller has bug wherein it generates invalid read transactions
after timeout in master receiver mode. This driver does not use the HW
timeout and this interrupt is disabled but the feature itself cannot be
disabled. Hence, this patch writes the maximum value (0xFF) to this register.
This is one of the workarounds to this bug and it will not avoid the issue
completely but reduces the chances of error.

Signed-off-by: Vishnu Motghare &lt;vishnum@xilinx.com&gt;
Signed-off-by: Harini Katakam &lt;harinik@xilinx.com&gt;
Signed-off-by: Wolfram Sang &lt;wsa@the-dreams.de&gt;
Cc: stable@kernel.org
</pre>
</div>
</content>
</entry>
<entry>
<title>i2c: davinci: generate STP always when NACK is received</title>
<updated>2014-12-04T18:25:31+00:00</updated>
<author>
<name>Grygorii Strashko</name>
<email>grygorii.strashko@ti.com</email>
</author>
<published>2014-12-01T15:34:04+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=9ea359f7314132cbcb5a502d2d8ef095be1f45e4'/>
<id>9ea359f7314132cbcb5a502d2d8ef095be1f45e4</id>
<content type='text'>
According to I2C specification the NACK should be handled as follows:
"When SDA remains HIGH during this ninth clock pulse, this is defined as the Not
Acknowledge signal. The master can then generate either a STOP condition to
abort the transfer, or a repeated START condition to start a new transfer."
[I2C spec Rev. 6, 3.1.6: http://www.nxp.com/documents/user_manual/UM10204.pdf]

Currently the Davinci i2c driver interrupts the transfer on receipt of a
NACK but fails to send a STOP in some situations and so makes the bus
stuck until next I2C IP reset (idle/enable).

For example, the issue will happen during SMBus read transfer which
consists from two i2c messages write command/address and read data:

S Slave Address Wr A Command Code A Sr Slave Address Rd A D1..Dn A P
&lt;--- write -----------------------&gt; &lt;--- read ---------------------&gt;

The I2C client device will send NACK if it can't recognize "Command Code"
and it's expected from I2C master to generate STP in this case.
But now, Davinci i2C driver will just exit with -EREMOTEIO and STP will
not be generated.

Hence, fix it by generating Stop condition (STP) always when NACK is received.

This patch fixes Davinci I2C in the same way it was done for OMAP I2C
commit cda2109a26eb ("i2c: omap: query STP always when NACK is received").

Reviewed-by: Uwe Kleine-König &lt;u.kleine-koenig@pengutronix.de&gt;
Reported-by: Hein Tibosch &lt;hein_tibosch@yahoo.es&gt;
Signed-off-by: Grygorii Strashko &lt;grygorii.strashko@ti.com&gt;
Signed-off-by: Wolfram Sang &lt;wsa@the-dreams.de&gt;
Cc: stable@kernel.org
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
According to I2C specification the NACK should be handled as follows:
"When SDA remains HIGH during this ninth clock pulse, this is defined as the Not
Acknowledge signal. The master can then generate either a STOP condition to
abort the transfer, or a repeated START condition to start a new transfer."
[I2C spec Rev. 6, 3.1.6: http://www.nxp.com/documents/user_manual/UM10204.pdf]

Currently the Davinci i2c driver interrupts the transfer on receipt of a
NACK but fails to send a STOP in some situations and so makes the bus
stuck until next I2C IP reset (idle/enable).

For example, the issue will happen during SMBus read transfer which
consists from two i2c messages write command/address and read data:

S Slave Address Wr A Command Code A Sr Slave Address Rd A D1..Dn A P
&lt;--- write -----------------------&gt; &lt;--- read ---------------------&gt;

The I2C client device will send NACK if it can't recognize "Command Code"
and it's expected from I2C master to generate STP in this case.
But now, Davinci i2C driver will just exit with -EREMOTEIO and STP will
not be generated.

Hence, fix it by generating Stop condition (STP) always when NACK is received.

This patch fixes Davinci I2C in the same way it was done for OMAP I2C
commit cda2109a26eb ("i2c: omap: query STP always when NACK is received").

Reviewed-by: Uwe Kleine-König &lt;u.kleine-koenig@pengutronix.de&gt;
Reported-by: Hein Tibosch &lt;hein_tibosch@yahoo.es&gt;
Signed-off-by: Grygorii Strashko &lt;grygorii.strashko@ti.com&gt;
Signed-off-by: Wolfram Sang &lt;wsa@the-dreams.de&gt;
Cc: stable@kernel.org
</pre>
</div>
</content>
</entry>
<entry>
<title>i2c: omap: fix i207 errata handling</title>
<updated>2014-11-22T21:07:40+00:00</updated>
<author>
<name>Alexander Kochetkov</name>
<email>al.kochet@gmail.com</email>
</author>
<published>2014-11-21T00:16:51+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=ccfc866356674cb3a61829d239c685af6e85f197'/>
<id>ccfc866356674cb3a61829d239c685af6e85f197</id>
<content type='text'>
commit 6d9939f651419a63e091105663821f9c7d3fec37 (i2c: omap: split out [XR]DR
and [XR]RDY) changed the way how errata i207 (I2C: RDR Flag May Be Incorrectly
Set) get handled. 6d9939f6514 code doesn't correspond to workaround provided by
errata.

According to errata ISR must filter out spurious RDR before data read not after.
ISR must read RXSTAT to get number of bytes available to read. Because RDR
could be set while there could no data in the receive FIFO.

Restored pre 6d9939f6514 way of handling errata.

Found by code review. Real impact haven't seen.
Tested on Beagleboard XM C.

Signed-off-by: Alexander Kochetkov &lt;al.kochet@gmail.com&gt;
Fixes: 6d9939f651419a63e09110 i2c: omap: split out [XR]DR and [XR]RDY
Tested-by: Felipe Balbi &lt;balbi@ti.com&gt;
Reviewed-by: Felipe Balbi &lt;balbi@ti.com&gt;
Signed-off-by: Wolfram Sang &lt;wsa@the-dreams.de&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
commit 6d9939f651419a63e091105663821f9c7d3fec37 (i2c: omap: split out [XR]DR
and [XR]RDY) changed the way how errata i207 (I2C: RDR Flag May Be Incorrectly
Set) get handled. 6d9939f6514 code doesn't correspond to workaround provided by
errata.

According to errata ISR must filter out spurious RDR before data read not after.
ISR must read RXSTAT to get number of bytes available to read. Because RDR
could be set while there could no data in the receive FIFO.

Restored pre 6d9939f6514 way of handling errata.

Found by code review. Real impact haven't seen.
Tested on Beagleboard XM C.

Signed-off-by: Alexander Kochetkov &lt;al.kochet@gmail.com&gt;
Fixes: 6d9939f651419a63e09110 i2c: omap: split out [XR]DR and [XR]RDY
Tested-by: Felipe Balbi &lt;balbi@ti.com&gt;
Reviewed-by: Felipe Balbi &lt;balbi@ti.com&gt;
Signed-off-by: Wolfram Sang &lt;wsa@the-dreams.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>i2c: designware: prevent early stop on TX FIFO empty</title>
<updated>2014-11-21T07:06:32+00:00</updated>
<author>
<name>Andrew Jackson</name>
<email>Andrew.Jackson@arm.com</email>
</author>
<published>2014-11-07T12:10:44+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=d39f77b06a712fcba6185a20bb209e357923d980'/>
<id>d39f77b06a712fcba6185a20bb209e357923d980</id>
<content type='text'>
If the Designware core is configured with IC_EMPTYFIFO_HOLD_MASTER_EN
set to zero, allowing the TX FIFO to become empty causes a STOP
condition to be generated on the I2C bus. If the transmit FIFO
threshold is set too high, an erroneous STOP condition can be
generated on long transfers - particularly where the interrupt
latency is extended.

Signed-off-by: Andrew Jackson &lt;Andrew.Jackson@arm.com&gt;
Signed-off-by: Liviu Dudau &lt;Liviu.Dudau@arm.com&gt;
Tested-by: Mika Westerberg &lt;mika.westerberg@linux.intel.com&gt;
Signed-off-by: Wolfram Sang &lt;wsa@the-dreams.de&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
If the Designware core is configured with IC_EMPTYFIFO_HOLD_MASTER_EN
set to zero, allowing the TX FIFO to become empty causes a STOP
condition to be generated on the I2C bus. If the transmit FIFO
threshold is set too high, an erroneous STOP condition can be
generated on long transfers - particularly where the interrupt
latency is extended.

Signed-off-by: Andrew Jackson &lt;Andrew.Jackson@arm.com&gt;
Signed-off-by: Liviu Dudau &lt;Liviu.Dudau@arm.com&gt;
Tested-by: Mika Westerberg &lt;mika.westerberg@linux.intel.com&gt;
Signed-off-by: Wolfram Sang &lt;wsa@the-dreams.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>i2c: omap: fix NACK and Arbitration Lost irq handling</title>
<updated>2014-11-21T07:06:31+00:00</updated>
<author>
<name>Alexander Kochetkov</name>
<email>al.kochet@gmail.com</email>
</author>
<published>2014-11-18T17:00:58+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=27caca9d2e01c92b26d0690f065aad093fea01c7'/>
<id>27caca9d2e01c92b26d0690f065aad093fea01c7</id>
<content type='text'>
commit 1d7afc95946487945cc7f5019b41255b72224b70 (i2c: omap: ack IRQ in parts)
changed the interrupt handler to complete transfers without clearing
XRDY (AL case) and ARDY (NACK case) flags. XRDY or ARDY interrupts will be
fired again. As a result, ISR keep processing transfer after it was already
complete (from the driver code point of view).

A didn't see real impacts of the 1d7afc9, but it is really bad idea to
have ISR running on user data after transfer was complete.

It looks, what 1d7afc9 violate TI specs in what how AL and NACK should be
handled (see Note 1, sprugn4r, Figure 17-31 and Figure 17-32).

According to specs (if I understood correctly), in case of NACK and AL driver
must reset NACK, AL, ARDY, RDR, and RRDY (Master Receive Mode), and
NACK, AL, ARDY, and XDR (Master Transmitter Mode).

All that is done down the code under the if condition:
if (stat &amp; (OMAP_I2C_STAT_ARDY | OMAP_I2C_STAT_NACK | OMAP_I2C_STAT_AL)) ...

The patch restore pre 1d7afc9 logic of handling NACK and AL interrupts, so
no interrupts is fired after ISR informs the rest of driver what transfer
complete.

Note: instead of removing break under NACK case, we could just replace 'break'
with 'continue' and allow NACK transfer to finish using ARDY event. I found
that NACK and ARDY bits usually set together. That case confirm TI wiki:
http://processors.wiki.ti.com/index.php/I2C_Tips#Detecting_and_handling_NACK

In order if someone interested in the event traces for NACK and AL cases,
I sent them to mailing list.

Tested on Beagleboard XM C.

Signed-off-by: Alexander Kochetkov &lt;al.kochet@gmail.com&gt;
Fixes: 1d7afc9 i2c: omap: ack IRQ in parts
Cc: &lt;stable@vger.kernel.org&gt; # v3.7+
Acked-by: Felipe Balbi &lt;balbi@ti.com&gt;
Tested-by: Aaro Koskinen &lt;aaro.koskinen@iki.fi&gt;
Signed-off-by: Wolfram Sang &lt;wsa@the-dreams.de&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
commit 1d7afc95946487945cc7f5019b41255b72224b70 (i2c: omap: ack IRQ in parts)
changed the interrupt handler to complete transfers without clearing
XRDY (AL case) and ARDY (NACK case) flags. XRDY or ARDY interrupts will be
fired again. As a result, ISR keep processing transfer after it was already
complete (from the driver code point of view).

A didn't see real impacts of the 1d7afc9, but it is really bad idea to
have ISR running on user data after transfer was complete.

It looks, what 1d7afc9 violate TI specs in what how AL and NACK should be
handled (see Note 1, sprugn4r, Figure 17-31 and Figure 17-32).

According to specs (if I understood correctly), in case of NACK and AL driver
must reset NACK, AL, ARDY, RDR, and RRDY (Master Receive Mode), and
NACK, AL, ARDY, and XDR (Master Transmitter Mode).

All that is done down the code under the if condition:
if (stat &amp; (OMAP_I2C_STAT_ARDY | OMAP_I2C_STAT_NACK | OMAP_I2C_STAT_AL)) ...

The patch restore pre 1d7afc9 logic of handling NACK and AL interrupts, so
no interrupts is fired after ISR informs the rest of driver what transfer
complete.

Note: instead of removing break under NACK case, we could just replace 'break'
with 'continue' and allow NACK transfer to finish using ARDY event. I found
that NACK and ARDY bits usually set together. That case confirm TI wiki:
http://processors.wiki.ti.com/index.php/I2C_Tips#Detecting_and_handling_NACK

In order if someone interested in the event traces for NACK and AL cases,
I sent them to mailing list.

Tested on Beagleboard XM C.

Signed-off-by: Alexander Kochetkov &lt;al.kochet@gmail.com&gt;
Fixes: 1d7afc9 i2c: omap: ack IRQ in parts
Cc: &lt;stable@vger.kernel.org&gt; # v3.7+
Acked-by: Felipe Balbi &lt;balbi@ti.com&gt;
Tested-by: Aaro Koskinen &lt;aaro.koskinen@iki.fi&gt;
Signed-off-by: Wolfram Sang &lt;wsa@the-dreams.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>i2c: core: Dispose OF IRQ mapping at client removal time</title>
<updated>2014-11-07T18:03:18+00:00</updated>
<author>
<name>Laurent Pinchart</name>
<email>laurent.pinchart+renesas@ideasonboard.com</email>
</author>
<published>2014-10-30T13:59:37+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=e4df3a0b62285130ac0a35cf07678c154ffb649d'/>
<id>e4df3a0b62285130ac0a35cf07678c154ffb649d</id>
<content type='text'>
Clients instantiated from OF get an IRQ mapping created at device
registration time. Dispose the mapping when the client is removed.

Signed-off-by: Laurent Pinchart &lt;laurent.pinchart+renesas@ideasonboard.com&gt;
Signed-off-by: Wolfram Sang &lt;wsa@the-dreams.de&gt;
Cc: stable@kernel.org
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Clients instantiated from OF get an IRQ mapping created at device
registration time. Dispose the mapping when the client is removed.

Signed-off-by: Laurent Pinchart &lt;laurent.pinchart+renesas@ideasonboard.com&gt;
Signed-off-by: Wolfram Sang &lt;wsa@the-dreams.de&gt;
Cc: stable@kernel.org
</pre>
</div>
</content>
</entry>
<entry>
<title>i2c: at91: don't account as iowait</title>
<updated>2014-11-07T17:56:31+00:00</updated>
<author>
<name>Wolfram Sang</name>
<email>wsa@the-dreams.de</email>
</author>
<published>2014-11-03T20:16:16+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=11cfbfb098b22d3e57f1f2be217cad20e2d48463'/>
<id>11cfbfb098b22d3e57f1f2be217cad20e2d48463</id>
<content type='text'>
iowait is for blkio [1]. I2C shouldn't use it.

[1] https://lkml.org/lkml/2014/11/3/317

Signed-off-by: Wolfram Sang &lt;wsa@the-dreams.de&gt;
Acked-by: Ludovic Desroches &lt;ludovic.desroches@atmel.com&gt;
Cc: stable@kernel.org
</content>
<content type='xhtml'>
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<pre>
iowait is for blkio [1]. I2C shouldn't use it.

[1] https://lkml.org/lkml/2014/11/3/317

Signed-off-by: Wolfram Sang &lt;wsa@the-dreams.de&gt;
Acked-by: Ludovic Desroches &lt;ludovic.desroches@atmel.com&gt;
Cc: stable@kernel.org
</pre>
</div>
</content>
</entry>
<entry>
<title>i2c: remove FSF address</title>
<updated>2014-11-07T17:35:33+00:00</updated>
<author>
<name>Wolfram Sang</name>
<email>wsa+renesas@sang-engineering.com</email>
</author>
<published>2014-11-04T22:46:27+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=ca1f8da9ac5ce6e63d8f6933f83fabc1f3f961f4'/>
<id>ca1f8da9ac5ce6e63d8f6933f83fabc1f3f961f4</id>
<content type='text'>
We have a central copy of the GPL for that. Some addresses were already
outdated.

Signed-off-by: Wolfram Sang &lt;wsa+renesas@sang-engineering.com&gt;
</content>
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<pre>
We have a central copy of the GPL for that. Some addresses were already
outdated.

Signed-off-by: Wolfram Sang &lt;wsa+renesas@sang-engineering.com&gt;
</pre>
</div>
</content>
</entry>
</feed>
