<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-toradex.git/drivers/i3c, branch v6.16</title>
<subtitle>Linux kernel for Apalis and Colibri modules</subtitle>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/'/>
<entry>
<title>i3c: controllers do not need to depend on I3C</title>
<updated>2025-05-24T20:49:07+00:00</updated>
<author>
<name>Wolfram Sang</name>
<email>wsa+renesas@sang-engineering.com</email>
</author>
<published>2025-05-06T07:52:11+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=00286d7d643d3c98e48d9cc3a9f471b37154f462'/>
<id>00286d7d643d3c98e48d9cc3a9f471b37154f462</id>
<content type='text'>
The Kconfig file for controller drivers is only sourced if the I3C
symbol is enabled. No need to check for that in individual drivers.

Signed-off-by: Wolfram Sang &lt;wsa+renesas@sang-engineering.com&gt;
Link: https://lore.kernel.org/r/20250506075247.1545-2-wsa+renesas@sang-engineering.com
Signed-off-by: Alexandre Belloni &lt;alexandre.belloni@bootlin.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The Kconfig file for controller drivers is only sourced if the I3C
symbol is enabled. No need to check for that in individual drivers.

Signed-off-by: Wolfram Sang &lt;wsa+renesas@sang-engineering.com&gt;
Link: https://lore.kernel.org/r/20250506075247.1545-2-wsa+renesas@sang-engineering.com
Signed-off-by: Alexandre Belloni &lt;alexandre.belloni@bootlin.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>i3c: master: svc: switch to bulk clk API for flexible clock support</title>
<updated>2025-05-24T20:45:37+00:00</updated>
<author>
<name>Carlos Song</name>
<email>carlos.song@nxp.com</email>
</author>
<published>2025-04-27T08:32:29+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=cd1a6a0c69e75bf64b44b00186136e563f392b50'/>
<id>cd1a6a0c69e75bf64b44b00186136e563f392b50</id>
<content type='text'>
Use the clk_bulk API to handle clocks, so the code can support different
numbers of clocks more easily. Make the code cleaner and more flexible.

No change in functionality.

Signed-off-by: Carlos Song &lt;carlos.song@nxp.com&gt;
Reviewed-by: Frank Li &lt;Frank.Li@nxp.com&gt;
Link: https://lore.kernel.org/r/20250427083230.3325700-3-carlos.song@nxp.com
Signed-off-by: Alexandre Belloni &lt;alexandre.belloni@bootlin.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Use the clk_bulk API to handle clocks, so the code can support different
numbers of clocks more easily. Make the code cleaner and more flexible.

No change in functionality.

Signed-off-by: Carlos Song &lt;carlos.song@nxp.com&gt;
Reviewed-by: Frank Li &lt;Frank.Li@nxp.com&gt;
Link: https://lore.kernel.org/r/20250427083230.3325700-3-carlos.song@nxp.com
Signed-off-by: Alexandre Belloni &lt;alexandre.belloni@bootlin.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>i3c: master: svc: skip address resend on repeat START</title>
<updated>2025-05-15T09:56:09+00:00</updated>
<author>
<name>Frank Li</name>
<email>Frank.Li@nxp.com</email>
</author>
<published>2025-04-29T05:42:34+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=12cbd157344848b1bd726ecadce27532d79b785a'/>
<id>12cbd157344848b1bd726ecadce27532d79b785a</id>
<content type='text'>
According to the I3C specification, address arbitration only happens during
the START. Repeated START do not initiate arbitration, and In-Band
Interrupts (IBIs) cannot occur at this stage.

Resending the address upon a NACK in a repeat START is therefore redundant
and unnecessary. Avoid redundant retries, improving efficiency and ensuring
protocol compliance.

Signed-off-by: Frank Li &lt;Frank.Li@nxp.com&gt;
Reviewed-by: Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;
Link: https://lore.kernel.org/r/20250429054234.4013929-1-Frank.Li@nxp.com
Signed-off-by: Alexandre Belloni &lt;alexandre.belloni@bootlin.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
According to the I3C specification, address arbitration only happens during
the START. Repeated START do not initiate arbitration, and In-Band
Interrupts (IBIs) cannot occur at this stage.

Resending the address upon a NACK in a repeat START is therefore redundant
and unnecessary. Avoid redundant retries, improving efficiency and ensuring
protocol compliance.

Signed-off-by: Frank Li &lt;Frank.Li@nxp.com&gt;
Reviewed-by: Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;
Link: https://lore.kernel.org/r/20250429054234.4013929-1-Frank.Li@nxp.com
Signed-off-by: Alexandre Belloni &lt;alexandre.belloni@bootlin.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>i3c: master: svc: Emit STOP asap in the IBI transaction</title>
<updated>2025-05-15T09:53:01+00:00</updated>
<author>
<name>Stanley Chu</name>
<email>yschu@nuvoton.com</email>
</author>
<published>2025-04-15T05:18:08+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=81f2a9af982120104d5e9211b15f3a83281972c1'/>
<id>81f2a9af982120104d5e9211b15f3a83281972c1</id>
<content type='text'>
Queuing the IBI request does not need to be done earlier than emitting
the STOP. Emitting STOP immediately after receiving the IBI request can
complete the IBI transaction earlier and return the bus to idle.

Signed-off-by: Stanley Chu &lt;yschu@nuvoton.com&gt;
Reviewed-by: Frank Li &lt;Frank.Li@nxp.com&gt;
Acked-by: Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;
Link: https://lore.kernel.org/r/20250415051808.88091-3-yschu@nuvoton.com
Signed-off-by: Alexandre Belloni &lt;alexandre.belloni@bootlin.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Queuing the IBI request does not need to be done earlier than emitting
the STOP. Emitting STOP immediately after receiving the IBI request can
complete the IBI transaction earlier and return the bus to idle.

Signed-off-by: Stanley Chu &lt;yschu@nuvoton.com&gt;
Reviewed-by: Frank Li &lt;Frank.Li@nxp.com&gt;
Acked-by: Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;
Link: https://lore.kernel.org/r/20250415051808.88091-3-yschu@nuvoton.com
Signed-off-by: Alexandre Belloni &lt;alexandre.belloni@bootlin.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>i3c: master: svc: Receive IBI requests in interrupt context</title>
<updated>2025-05-15T09:53:01+00:00</updated>
<author>
<name>Stanley Chu</name>
<email>yschu@nuvoton.com</email>
</author>
<published>2025-04-15T05:18:07+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=8d29fa6d921ca4f9f63f73598833e53ece1d3b4e'/>
<id>8d29fa6d921ca4f9f63f73598833e53ece1d3b4e</id>
<content type='text'>
Moving the job from workqueue to ISR for two reasons.

1. Improve bus utilization.
If the requests are postponed to be received in the workqueue thread,
the SDA line remains low for a long time while the system loading is
high. During this period, the bus is not available for other targets
to raise requests.

2. Ensure prompt response to requests.
For timing-critical requests, the target may encouter a failure or the
event is missed if the request is not received in time.

IBI request is short, ISR can receive the data quickly and then queue a
work to handle it in the bottom half.

Signed-off-by: Stanley Chu &lt;yschu@nuvoton.com&gt;
Reviewed-by: Frank Li &lt;Frank.Li@nxp.com&gt;
Acked-by: Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;
Link: https://lore.kernel.org/r/20250415051808.88091-2-yschu@nuvoton.com
Signed-off-by: Alexandre Belloni &lt;alexandre.belloni@bootlin.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Moving the job from workqueue to ISR for two reasons.

1. Improve bus utilization.
If the requests are postponed to be received in the workqueue thread,
the SDA line remains low for a long time while the system loading is
high. During this period, the bus is not available for other targets
to raise requests.

2. Ensure prompt response to requests.
For timing-critical requests, the target may encouter a failure or the
event is missed if the request is not received in time.

IBI request is short, ISR can receive the data quickly and then queue a
work to handle it in the bottom half.

Signed-off-by: Stanley Chu &lt;yschu@nuvoton.com&gt;
Reviewed-by: Frank Li &lt;Frank.Li@nxp.com&gt;
Acked-by: Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;
Link: https://lore.kernel.org/r/20250415051808.88091-2-yschu@nuvoton.com
Signed-off-by: Alexandre Belloni &lt;alexandre.belloni@bootlin.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>i3c: mipi-i3c-hci: Move unexpected INTR_STATUS print before IO handler</title>
<updated>2025-05-15T09:41:13+00:00</updated>
<author>
<name>Jarkko Nikula</name>
<email>jarkko.nikula@linux.intel.com</email>
</author>
<published>2025-04-09T14:04:01+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=bd916806632d1a22a10a30d5ab7cce549791a563'/>
<id>bd916806632d1a22a10a30d5ab7cce549791a563</id>
<content type='text'>
Move "unexpected INTR_STATUS" error print before calling the IO handler
as it is more consistent that way. Otherwise it may be confusing if
generic interrupt related prints are mixed with IO handler prints.

Since this error print is more indication of missing code rather than
runtime error downgrade it to dev_warn_once().

Reviewed-by: Frank Li &lt;Frank.Li@nxp.com&gt;
Signed-off-by: Jarkko Nikula &lt;jarkko.nikula@linux.intel.com&gt;
Link: https://lore.kernel.org/r/20250409140401.299251-5-jarkko.nikula@linux.intel.com
Signed-off-by: Alexandre Belloni &lt;alexandre.belloni@bootlin.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Move "unexpected INTR_STATUS" error print before calling the IO handler
as it is more consistent that way. Otherwise it may be confusing if
generic interrupt related prints are mixed with IO handler prints.

Since this error print is more indication of missing code rather than
runtime error downgrade it to dev_warn_once().

Reviewed-by: Frank Li &lt;Frank.Li@nxp.com&gt;
Signed-off-by: Jarkko Nikula &lt;jarkko.nikula@linux.intel.com&gt;
Link: https://lore.kernel.org/r/20250409140401.299251-5-jarkko.nikula@linux.intel.com
Signed-off-by: Alexandre Belloni &lt;alexandre.belloni@bootlin.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>i3c: mipi-i3c-hci: Change name of INTR_STATUS bit 11</title>
<updated>2025-05-15T09:41:13+00:00</updated>
<author>
<name>Jarkko Nikula</name>
<email>jarkko.nikula@linux.intel.com</email>
</author>
<published>2025-04-09T14:04:00+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=7479d2675c50a53ff802fad2e8176f830e342bb1'/>
<id>7479d2675c50a53ff802fad2e8176f830e342bb1</id>
<content type='text'>
INTR_STATUS bit 11 INTR_HC_RESET_CANCEL was probably projected for the
MIPI I3C HCI specification version 2 but was not ever implemented.

This bit is first time specified in the v1.2 as HC_SEQ_CANCEL_STAT
"Host Controller Cancelled Transaction Sequence". Update the definition
and debug print of it accordingly.

While at it, change DBG() print to dev_dbg().

Reviewed-by: Frank Li &lt;Frank.Li@nxp.com&gt;
Signed-off-by: Jarkko Nikula &lt;jarkko.nikula@linux.intel.com&gt;
Link: https://lore.kernel.org/r/20250409140401.299251-4-jarkko.nikula@linux.intel.com
Signed-off-by: Alexandre Belloni &lt;alexandre.belloni@bootlin.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
INTR_STATUS bit 11 INTR_HC_RESET_CANCEL was probably projected for the
MIPI I3C HCI specification version 2 but was not ever implemented.

This bit is first time specified in the v1.2 as HC_SEQ_CANCEL_STAT
"Host Controller Cancelled Transaction Sequence". Update the definition
and debug print of it accordingly.

While at it, change DBG() print to dev_dbg().

Reviewed-by: Frank Li &lt;Frank.Li@nxp.com&gt;
Signed-off-by: Jarkko Nikula &lt;jarkko.nikula@linux.intel.com&gt;
Link: https://lore.kernel.org/r/20250409140401.299251-4-jarkko.nikula@linux.intel.com
Signed-off-by: Alexandre Belloni &lt;alexandre.belloni@bootlin.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>i3c: mipi-i3c-hci: Clear INTR_STATUS unconditionally</title>
<updated>2025-05-15T09:41:13+00:00</updated>
<author>
<name>Jarkko Nikula</name>
<email>jarkko.nikula@linux.intel.com</email>
</author>
<published>2025-04-09T14:03:59+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=a7035a8ee96648bfbd2cd747308bca41122500ab'/>
<id>a7035a8ee96648bfbd2cd747308bca41122500ab</id>
<content type='text'>
Status fields in INTR_STATUS register are write 1 to clear so do it
unconditionally and move clearing of them out of an if block.

Suggested-by: Frank Li &lt;Frank.Li@nxp.com&gt;
Signed-off-by: Jarkko Nikula &lt;jarkko.nikula@linux.intel.com&gt;
Reviewed-by: Frank Li &lt;Frank.Li@nxp.com&gt;
Link: https://lore.kernel.org/r/20250409140401.299251-3-jarkko.nikula@linux.intel.com
Signed-off-by: Alexandre Belloni &lt;alexandre.belloni@bootlin.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Status fields in INTR_STATUS register are write 1 to clear so do it
unconditionally and move clearing of them out of an if block.

Suggested-by: Frank Li &lt;Frank.Li@nxp.com&gt;
Signed-off-by: Jarkko Nikula &lt;jarkko.nikula@linux.intel.com&gt;
Reviewed-by: Frank Li &lt;Frank.Li@nxp.com&gt;
Link: https://lore.kernel.org/r/20250409140401.299251-3-jarkko.nikula@linux.intel.com
Signed-off-by: Alexandre Belloni &lt;alexandre.belloni@bootlin.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>i3c: mipi-i3c-hci: Fix handling status of i3c_hci_irq_handler()</title>
<updated>2025-05-15T09:41:13+00:00</updated>
<author>
<name>Jarkko Nikula</name>
<email>jarkko.nikula@linux.intel.com</email>
</author>
<published>2025-04-09T14:03:58+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=279c24021b838e76ca8441e9446e0ab45271153a'/>
<id>279c24021b838e76ca8441e9446e0ab45271153a</id>
<content type='text'>
Return IRQ_HANDLED from the i3c_hci_irq_handler() only if some
INTR_STATUS bit was set or if DMA/PIO handler handled it.

Currently it returns IRQ_HANDLED in case INTR_STATUS is zero and IO
handler returns false. Which could be the case if interrupt comes from
other device or is spurious.

Reviewed-by: Frank Li &lt;Frank.Li@nxp.com&gt;
Signed-off-by: Jarkko Nikula &lt;jarkko.nikula@linux.intel.com&gt;
Link: https://lore.kernel.org/r/20250409140401.299251-2-jarkko.nikula@linux.intel.com
Signed-off-by: Alexandre Belloni &lt;alexandre.belloni@bootlin.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Return IRQ_HANDLED from the i3c_hci_irq_handler() only if some
INTR_STATUS bit was set or if DMA/PIO handler handled it.

Currently it returns IRQ_HANDLED in case INTR_STATUS is zero and IO
handler returns false. Which could be the case if interrupt comes from
other device or is spurious.

Reviewed-by: Frank Li &lt;Frank.Li@nxp.com&gt;
Signed-off-by: Jarkko Nikula &lt;jarkko.nikula@linux.intel.com&gt;
Link: https://lore.kernel.org/r/20250409140401.299251-2-jarkko.nikula@linux.intel.com
Signed-off-by: Alexandre Belloni &lt;alexandre.belloni@bootlin.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>i3c: mipi-i3c-hci: Allow only relevant INTR_STATUS bit updates</title>
<updated>2025-05-15T09:41:13+00:00</updated>
<author>
<name>Jarkko Nikula</name>
<email>jarkko.nikula@linux.intel.com</email>
</author>
<published>2025-04-09T14:03:57+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=eeeec6c5475e914157feab00bdcaed79132e47a2'/>
<id>eeeec6c5475e914157feab00bdcaed79132e47a2</id>
<content type='text'>
Since MIPI I3C HCI specification version v0.8 INTR_STATUS bits 9:0 are
reserved. Version v0.5 has bits 9 and 5:0 in use but not handled by the
current driver code and not needed in DMA transfers.

PIO transfers with v0.5 would require changes to both
core.c: i3c_hci_irq_handler() and pio.c: hci_pio_irq_handler() though.

For these reasons don't enable signal updates from INTR_STATUS bits 9:0.

It allow to get rid of "unexpected INTR_STATUS" error messages on old
v0.5 IP version and is a no-op for later versions starting from v0.8.

Signed-off-by: Jarkko Nikula &lt;jarkko.nikula@linux.intel.com&gt;
Reviewed-by: Frank Li &lt;Frank.Li@nxp.com&gt;
Link: https://lore.kernel.org/r/20250409140401.299251-1-jarkko.nikula@linux.intel.com
Signed-off-by: Alexandre Belloni &lt;alexandre.belloni@bootlin.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Since MIPI I3C HCI specification version v0.8 INTR_STATUS bits 9:0 are
reserved. Version v0.5 has bits 9 and 5:0 in use but not handled by the
current driver code and not needed in DMA transfers.

PIO transfers with v0.5 would require changes to both
core.c: i3c_hci_irq_handler() and pio.c: hci_pio_irq_handler() though.

For these reasons don't enable signal updates from INTR_STATUS bits 9:0.

It allow to get rid of "unexpected INTR_STATUS" error messages on old
v0.5 IP version and is a no-op for later versions starting from v0.8.

Signed-off-by: Jarkko Nikula &lt;jarkko.nikula@linux.intel.com&gt;
Reviewed-by: Frank Li &lt;Frank.Li@nxp.com&gt;
Link: https://lore.kernel.org/r/20250409140401.299251-1-jarkko.nikula@linux.intel.com
Signed-off-by: Alexandre Belloni &lt;alexandre.belloni@bootlin.com&gt;
</pre>
</div>
</content>
</entry>
</feed>
