linux-toradex.git/drivers/iio/trigger/stm32-timer-trigger.c, branch v4.14

Merge tag 'iio-fixes-for-4.14a' of git://git.kernel.org/pub/scm/linux/kernel/git/jic23/iio into staging-linus

2017-09-25T08:58:22+00:00

Jonathan writes:

First round of IIO fixes for the 4.14 cycle

Note this includes fixes from recent merge window.  As such the tree
is based on top of a prior staging/staging-next tree.

* iio core
  - return and error for a failed read_reg debugfs call rather than
    eating the error.
* ad7192
  - Use the dedicated reset function in the ad_sigma_delta library
    instead of an spi transfer with the data on the stack which
    could cause problems with DMA.
* ad7793
  - Implement a dedicate reset function in the ad_sigma_delta library
    and use it to correctly reset this part.
* bme280
  - ctrl_reg write must occur after any register writes
  for updates to take effect.
* mcp320x
  - negative voltage readout was broken.
  - Fix an oops on module unload due to spi_set_drvdata not being called
    in probe.
* st_magn
  - Fix the data ready line configuration for the lis3mdl. It is not
    configurable so the st_magn core was assuming it didn't exist
    and so wasn't consuming interrupts resulting in an unhandled
    interrupt.
* stm32-adc
  - off by one error on max channels checking.
* stm32-timer
  - preset should not be buffered - reorganising register writes avoids
  this.
  - fix a corner case in which write preset goes wrong when a timer is
  used first as a trigger then as a counter with preset. Odd case but
  you never know.
* ti-ads1015
  - Fix setting of comparator polarity by fixing bitfield definition.
* twl4030
  - Error path handling fix to cleanup in event of regulator
    registration failure.
  - Disable the vusb3v1 regulator correctly in error handling
  - Don't paper over a regulator enable failure.

iio: trigger: stm32-timer: fix a corner case to write preset

2017-09-24T12:09:57+00:00

Balance timer start routine that sets ARPE: clear it in stop routine.
This fixes a corner case, when timer is used successively as trigger
(with sampling_frequency start/stop routines), then as a counter
(with preset).

Fixes: 93fbe91b5521 ("iio: Add STM32 timer trigger driver")
Signed-off-by: Fabrice Gasnier 
Cc: 
Signed-off-by: Jonathan Cameron

iio: trigger: stm32-timer: preset shouldn't be buffered

2017-09-24T12:08:48+00:00

Currently, setting preset value (ARR) will update directly 'Auto reload
value' only on 1st write access. But then, ARPE is set. This makes
ARR a shadow register. Preset value should be updated upon each
write request: ensure ARPE is 0. This fixes successive writes to
preset attribute.

Fixes: 4adec7da0536 ("iio: stm32 trigger: Add quadrature encoder device")
Signed-off-by: Fabrice Gasnier 
Cc: 
Signed-off-by: Jonathan Cameron

Merge 4.13-rc7 into staging-next

2017-08-28T13:26:48+00:00

We want the staging and iio fixes in here to handle the merge issues.

Signed-off-by: Greg Kroah-Hartman

iio: trigger: stm32-timer: fix get trigger mode

2017-08-20T14:21:47+00:00

Fix reading trigger mode, when other bit-fields are set. SMCR register
value must be masked to read SMS (slave mode selection) only.

Fixes: 9eba381 ("iio: make stm32 trigger driver use
INDIO_HARDWARE_TRIGGERED mode")

Signed-off-by: Fabrice Gasnier 
Cc: 
Signed-off-by: Jonathan Cameron

iio: trigger: stm32-timer: add output compare triggers

2017-08-12T12:05:27+00:00

Add output compare trigger sources available on some instances.

Signed-off-by: Fabrice Gasnier 
Signed-off-by: Jonathan Cameron

iio: trigger: stm32-timer: add support for STM32H7

2017-08-12T12:05:26+00:00

Add support for STM32H7 timer triggers:
- Add new valids_table
- Introduce compatible, with configuration data
- Extend up to 15 timers, available on STM32H7

Signed-off-by: Fabrice Gasnier 
Signed-off-by: Jonathan Cameron

iio: trigger: stm32-timer: add enable attribute

2017-07-30T13:48:14+00:00

In order to use encoder mode, timers needs to be enabled (e.g. CEN bit)
along with peripheral clock.
Add IIO_CHAN_INFO_ENABLE attribute to handle this.
Also, in triggered mode, CEN bit is set automatically in hardware.
Then clock must be enabled before starting triggered mode.

Signed-off-by: Fabrice Gasnier 
Acked-by: Benjamin Gaignard 
Signed-off-by: Jonathan Cameron

iio: trigger: stm32-timer: fix get/set down count direction

2017-07-30T13:46:02+00:00

Fixes: 4adec7da0536 ("iio: stm32 trigger: Add quadrature encoder device")

This fixes two issues:
- stm32_set_count_direction: to set down direction
- stm32_get_count_direction: to get down direction

IIO core provides/expects value to be an index of iio_enum items array.
This needs to be turned by these routines into TIM_CR1_DIR (e.g. BIT(4))
value.
Also, report error when attempting to write direction, when in encoder
mode: in this case, direction is read only (given by encoder inputs).

Signed-off-by: Fabrice Gasnier 
Acked-by: Benjamin Gaignard 
Signed-off-by: Jonathan Cameron

iio: trigger: stm32-timer: fix write_raw return value

2017-07-30T13:44:28+00:00

Fixes: 4adec7da0536 ("iio: stm32 trigger: Add quadrature encoder device")

IIO core expects zero as return value for write_raw() callback
in case of success.

Signed-off-by: Fabrice Gasnier 
Acked-by: Benjamin Gaignard 
Signed-off-by: Jonathan Cameron