linux-toradex.git/drivers/memory/tegra, branch v4.20-rc6

Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

2018-08-23T20:52:46+00:00

Pull ARM SoC driver updates from Olof Johansson:
 "Some of the larger changes this merge window:

   - Removal of drivers for Exynos5440, a Samsung SoC that never saw
     widespread use.

   - Uniphier support for USB3 and SPI reset handling

   - Syste control and SRAM drivers and bindings for Allwinner platforms

   - Qualcomm AOSS (Always-on subsystem) reset controller drivers

   - Raspberry Pi hwmon driver for voltage

   - Mediatek pwrap (pmic) support for MT6797 SoC"

* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (52 commits)
  drivers/firmware: psci_checker: stash and use topology_core_cpumask for hotplug tests
  soc: fsl: cleanup Kconfig menu
  soc: fsl: dpio: Convert DPIO documentation to .rst
  staging: fsl-mc: Remove remaining files
  staging: fsl-mc: Move DPIO from staging to drivers/soc/fsl
  staging: fsl-dpaa2: eth: move generic FD defines to DPIO
  soc: fsl: qe: gpio: Add qe_gpio_set_multiple
  usb: host: exynos: Remove support for Exynos5440
  clk: samsung: Remove support for Exynos5440
  soc: sunxi: Add the A13, A23 and H3 system control compatibles
  reset: uniphier: add reset control support for SPI
  cpufreq: exynos: Remove support for Exynos5440
  ata: ahci-platform: Remove support for Exynos5440
  soc: imx6qp: Use GENPD_FLAG_ALWAYS_ON for PU errata
  soc: mediatek: pwrap: add mt6351 driver for mt6797 SoCs
  soc: mediatek: pwrap: add pwrap driver for mt6797 SoCs
  soc: mediatek: pwrap: fix cipher init setting error
  dt-bindings: pwrap: mediatek: add pwrap support for MT6797
  reset: uniphier: add USB3 core reset control
  dt-bindings: reset: uniphier: add USB3 core reset support
  ...

memory: tegra: Correct driver probe order

2018-07-10T15:29:15+00:00

The Reset Controller should be registered in the end of probe, otherwise
Memory Controller device goes away if IRQ requesting fails and the Reset
Controller stays registered. To avoid having to unwind the MC probing in
a case of SMMU probe failure, let's simply print the error message without
failing the MC probe. This allows us to just move the Reset Controller
registering before the SMMU registration, reducing code churning. Also
let's not fail MC probe in a case of Reset Controller registration failure
as it doesn't prevent the MC driver to work.

Signed-off-by: Dmitry Osipenko 
Signed-off-by: Thierry Reding

headers: separate linux/mod_devicetable.h from linux/platform_device.h

2018-07-07T15:52:26+00:00

At over 4000 #includes,  is the 9th most
#included header file in the Linux kernel.  It does not need
, so drop that header and explicitly add
 to source files that need it.

   4146 #include 

After this patch, there are 225 files that use ,
for a reduction of around 3900 times that 
does not have to be read & parsed.

    225 #include 

This patch was build-tested on 20 different arch-es.

It also makes these drivers SubmitChecklist#1 compliant.

Signed-off-by: Randy Dunlap 
Reported-by: kbuild test robot  # drivers/media/platform/vimc/
Reported-by: kbuild test robot  # drivers/pinctrl/pinctrl-u300.c
Signed-off-by: Greg Kroah-Hartman

memory: tegra: Remove Tegra114 SATA and AFI reset definitions

2018-05-18T20:45:01+00:00

Tegra114 doesn't have SATA nor PCIe, but TRM seems erroneously document
them.

Signed-off-by: Dmitry Osipenko 
Signed-off-by: Thierry Reding

memory: tegra: Register SMMU after MC driver became ready

2018-05-18T10:31:55+00:00

Memory Controller driver invokes SMMU driver registration and MC's
registers mapping is shared with SMMU. This mapping goes away if MC
driver probing fails after SMMU registration.

Signed-off-by: Dmitry Osipenko 
Signed-off-by: Thierry Reding

memory: tegra: Add Tegra210 memory controller hot resets

2018-04-30T08:12:21+00:00

Define the table of memory controller hot resets for Tegra210.

Signed-off-by: Thierry Reding

memory: tegra: Add Tegra124 memory controller hot resets

2018-04-30T08:12:21+00:00

Define the table of memory controller hot resets for Tegra124.

Signed-off-by: Dmitry Osipenko 
Signed-off-by: Thierry Reding

memory: tegra: Add Tegra114 memory controller hot resets

2018-04-30T08:12:21+00:00

Define the table of memory controller hot resets for Tegra114.

Signed-off-by: Dmitry Osipenko 
Signed-off-by: Thierry Reding

memory: tegra: Add Tegra30 memory controller hot resets

2018-04-30T08:12:21+00:00

Define the table of memory controller hot resets for Tegra30.

Signed-off-by: Dmitry Osipenko 
Signed-off-by: Thierry Reding

memory: tegra: Add Tegra20 memory controller hot resets

2018-04-30T08:12:21+00:00

Define the table of memory controller hot resets for Tegra20 and add
specific to Tegra20 hot reset operations.

Signed-off-by: Dmitry Osipenko 
Signed-off-by: Thierry Reding