<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-toradex.git/drivers/memory, branch v5.17-rc4</title>
<subtitle>Linux kernel for Apalis and Colibri modules</subtitle>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/'/>
<entry>
<title>Merge tag 'mtd/for-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux</title>
<updated>2022-01-11T19:35:28+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2022-01-11T19:35:28+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=c01d85c2190bf694ccd041e7d19c36eacf005840'/>
<id>c01d85c2190bf694ccd041e7d19c36eacf005840</id>
<content type='text'>
Pull MTD updates from Miquel Raynal:
 "MTD core changes:

   - mtdchar: Prevent unbounded allocation in MEMWRITE ioctl

   - gen_probe: Use bitmap_zalloc() when applicable

   - Introduce an expert mode for forensics and debugging purposes

   - Clear out unregistered devices a bit more

   - Provide unique name for nvmem device

   - Remove unused header file &lt;linux/mtd/latch-addr-flash.h&gt;

   - Fixed breaking list in __mtd_del_partition.

  MTD device changes:

   - Warn about failure to unregister mtd device in sst25l, mchp48l640,
     mchp23k256, and dataflash drivers.

  Raw NAND core changes:

   - Export nand_read_page_hwecc_oob_first()

  GPMC memory controller for OMAP2 NAND controller changes:

   - Add support for AM64 SoC and allow build on K3 platforms

   - Use a compatible match table when checking for NAND controller

   - Use platform_get_irq() to get the interrupt

  Raw NAND controller changes:

   - OMAP2 NAND controller:
      - Document the missing 'rb-gpios' DT property
      - Drop unused variable
      - Fix force_8bit flag behaviour for DMA mode
      - Move to exec_op interface
      - Use platform_get_irq() to get the interrupt

   - Renesas:
      - Add new NAND controller driver with its bindings and MAINTAINERS entry

   - Onenand:
      - Remove redundant variable ooblen

   - MPC5121:
      - Remove unused variable in ads5121_select_chip()

   - GPMI:
      - Add ERR007117 protection for nfc_apply_timings
      - Remove explicit default gpmi clock setting for i.MX6
      - Use platform_get_irq_byname() to get the interrupt
      - Remove unneeded variable

   - Ingenic:
      - JZ4740 needs 'oob_first' read page function

   - Davinci:
      - Rewrite function description
      - Avoid duplicated page read
      - Don't calculate ECC when reading page

  SPI NOR core changes:

   - Add Pratyush as SPI NOR co-maintainer.

   - Flash parameters initialization was done in a spaghetti way. Clean
     flash parameters initialization.

   - Rework the flash_info flags and clarify where one should be used.

   - Initialize all flash parameters based on JESD216 SFDP where
     possible. Flash parameters and settings that are SFDP discoverable
     should not be duplicated via flash_info flags at flash declaration.

   - Remove debugfs entries that duplicate sysfs entries.

  SPI NOR manufacturer driver changes:

   - Use late_init() hook in various drivers to make it clear that those
     flash parameters are either not declared in the JESD216 SFDP
     standard, or the SFDP tables which define those flash parameters
     are not defined by the flash.

   - Fix mtd size for s3an flashes.

   - Write 2 bytes when disabling Octal DTR mode: 1 byte long
     transactions are not allowed in 8D-8D-8D mode.

  Hyperbus changes:

   - Couple of fixes in Renesas hyperbus rpc-if driver to avoid crash on
     module remove and for missing check for error value in probe"

* tag 'mtd/for-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux: (71 commits)
  mtd: spi-nor: Remove debugfs entries that duplicate sysfs entries
  mtd: spi-nor: micron-st: write 2 bytes when disabling Octal DTR mode
  mtd: spi-nor: spansion: write 2 bytes when disabling Octal DTR mode
  mtd: spi-nor: core: use 2 data bytes for template ops
  mtd: spi-nor: Constify part specific fixup hooks
  mtd: spi-nor: core: Remove reference to spi-nor.c
  mtd: rawnand: gpmi: Use platform_get_irq_byname() to get the interrupt
  mtd: rawnand: omap_elm: Use platform_get_irq() to get the interrupt
  mtd: rawnand: omap2: Select GPMC device driver for ARCH_K3
  memory: omap-gpmc: Use a compatible match table when checking for NAND controller
  memory: omap-gpmc: Add support for GPMC on AM64 SoC
  dt-bindings: memory-controllers: ti,gpmc: Add compatible for AM64
  memory: omap-gpmc: Use platform_get_irq() to get the interrupt
  MAINTAINERS: Add an entry for Renesas NAND controller
  mtd: rawnand: renesas: Add new NAND controller driver
  dt-bindings: mtd: renesas: Describe Renesas R-Car Gen3 &amp; RZ/N1 NAND controller
  mtd: rawnand: gpmi: remove unneeded variable
  mtd: rawnand: omap2: drop unused variable
  mtd: rawnand: omap2: fix force_8bit flag behaviour for DMA mode
  mtd: rawnand: omap2: Add compatible for AM64 SoC
  ...
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Pull MTD updates from Miquel Raynal:
 "MTD core changes:

   - mtdchar: Prevent unbounded allocation in MEMWRITE ioctl

   - gen_probe: Use bitmap_zalloc() when applicable

   - Introduce an expert mode for forensics and debugging purposes

   - Clear out unregistered devices a bit more

   - Provide unique name for nvmem device

   - Remove unused header file &lt;linux/mtd/latch-addr-flash.h&gt;

   - Fixed breaking list in __mtd_del_partition.

  MTD device changes:

   - Warn about failure to unregister mtd device in sst25l, mchp48l640,
     mchp23k256, and dataflash drivers.

  Raw NAND core changes:

   - Export nand_read_page_hwecc_oob_first()

  GPMC memory controller for OMAP2 NAND controller changes:

   - Add support for AM64 SoC and allow build on K3 platforms

   - Use a compatible match table when checking for NAND controller

   - Use platform_get_irq() to get the interrupt

  Raw NAND controller changes:

   - OMAP2 NAND controller:
      - Document the missing 'rb-gpios' DT property
      - Drop unused variable
      - Fix force_8bit flag behaviour for DMA mode
      - Move to exec_op interface
      - Use platform_get_irq() to get the interrupt

   - Renesas:
      - Add new NAND controller driver with its bindings and MAINTAINERS entry

   - Onenand:
      - Remove redundant variable ooblen

   - MPC5121:
      - Remove unused variable in ads5121_select_chip()

   - GPMI:
      - Add ERR007117 protection for nfc_apply_timings
      - Remove explicit default gpmi clock setting for i.MX6
      - Use platform_get_irq_byname() to get the interrupt
      - Remove unneeded variable

   - Ingenic:
      - JZ4740 needs 'oob_first' read page function

   - Davinci:
      - Rewrite function description
      - Avoid duplicated page read
      - Don't calculate ECC when reading page

  SPI NOR core changes:

   - Add Pratyush as SPI NOR co-maintainer.

   - Flash parameters initialization was done in a spaghetti way. Clean
     flash parameters initialization.

   - Rework the flash_info flags and clarify where one should be used.

   - Initialize all flash parameters based on JESD216 SFDP where
     possible. Flash parameters and settings that are SFDP discoverable
     should not be duplicated via flash_info flags at flash declaration.

   - Remove debugfs entries that duplicate sysfs entries.

  SPI NOR manufacturer driver changes:

   - Use late_init() hook in various drivers to make it clear that those
     flash parameters are either not declared in the JESD216 SFDP
     standard, or the SFDP tables which define those flash parameters
     are not defined by the flash.

   - Fix mtd size for s3an flashes.

   - Write 2 bytes when disabling Octal DTR mode: 1 byte long
     transactions are not allowed in 8D-8D-8D mode.

  Hyperbus changes:

   - Couple of fixes in Renesas hyperbus rpc-if driver to avoid crash on
     module remove and for missing check for error value in probe"

* tag 'mtd/for-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux: (71 commits)
  mtd: spi-nor: Remove debugfs entries that duplicate sysfs entries
  mtd: spi-nor: micron-st: write 2 bytes when disabling Octal DTR mode
  mtd: spi-nor: spansion: write 2 bytes when disabling Octal DTR mode
  mtd: spi-nor: core: use 2 data bytes for template ops
  mtd: spi-nor: Constify part specific fixup hooks
  mtd: spi-nor: core: Remove reference to spi-nor.c
  mtd: rawnand: gpmi: Use platform_get_irq_byname() to get the interrupt
  mtd: rawnand: omap_elm: Use platform_get_irq() to get the interrupt
  mtd: rawnand: omap2: Select GPMC device driver for ARCH_K3
  memory: omap-gpmc: Use a compatible match table when checking for NAND controller
  memory: omap-gpmc: Add support for GPMC on AM64 SoC
  dt-bindings: memory-controllers: ti,gpmc: Add compatible for AM64
  memory: omap-gpmc: Use platform_get_irq() to get the interrupt
  MAINTAINERS: Add an entry for Renesas NAND controller
  mtd: rawnand: renesas: Add new NAND controller driver
  dt-bindings: mtd: renesas: Describe Renesas R-Car Gen3 &amp; RZ/N1 NAND controller
  mtd: rawnand: gpmi: remove unneeded variable
  mtd: rawnand: omap2: drop unused variable
  mtd: rawnand: omap2: fix force_8bit flag behaviour for DMA mode
  mtd: rawnand: omap2: Add compatible for AM64 SoC
  ...
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge tag 'drivers-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc</title>
<updated>2022-01-10T16:13:52+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2022-01-10T16:13:52+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=e85195d5bf8979f6db3f12cf8f1294887bf6b037'/>
<id>e85195d5bf8979f6db3f12cf8f1294887bf6b037</id>
<content type='text'>
Pull ARM SoC driver updates from Arnd Bergmann:
 "There are cleanups and minor bugfixes across several SoC specific
  drivers, for Qualcomm, Samsung, NXP i.MX, AT91, Tegra, Keystone,
  Renesas, ZynqMP

  Noteworthy new features are:

   - The op-tee firmware driver gains support for asynchronous
     notifications from secure-world firmware.

   - Qualcomm platforms gain support for new SoC types in various
     drivers: power domain, cache controller, RPM sleep, soc-info

   - Samsung SoC drivers gain support for new SoCs in ChipID and PMU, as
     well as a new USIv2 driver that handles various types of serial
     communiction (uart, i2c, spi)

   - Renesas adds support for R-Car S4-8 (R8A779F0) in multiple drivers,
     as well as memory controller support for RZ/G2L (R9A07G044).

   - Apple M1 gains support for the PMGR power management driver"

* tag 'drivers-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (94 commits)
  soc: qcom: rpmh-rsc: Fix typo in a comment
  soc: qcom: socinfo: Add SM6350 and SM7225
  dt-bindings: arm: msm: Don't mark LLCC interrupt as required
  dt-bindings: firmware: scm: Add SM6350 compatible
  dt-bindings: arm: msm: Add LLCC for SM6350
  soc: qcom: rpmhpd: Sort power-domain definitions and lists
  soc: qcom: rpmhpd: Remove mx/cx relationship on sc7280
  soc: qcom: rpmhpd: Rename rpmhpd struct names
  soc: qcom: rpmhpd: sm8450: Add the missing .peer for sm8450_cx_ao
  soc: qcom: socinfo: add SM8450 ID
  soc: qcom: rpmhpd: Add SM8450 power domains
  dt-bindings: power: rpmpd: Add SM8450 to rpmpd binding
  soc: qcom: smem: Update max processor count
  dt-bindings: arm: qcom: Document SM8450 SoC and boards
  dt-bindings: firmware: scm: Add SM8450 compatible
  dt-bindings: arm: cpus: Add kryo780 compatible
  soc: qcom: rpmpd: Add support for sm6125
  dt-bindings: qcom-rpmpd: Add sm6125 power domains
  soc: qcom: aoss: constify static struct thermal_cooling_device_ops
  PM: AVS: qcom-cpr: Use div64_ul instead of do_div
  ...
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Pull ARM SoC driver updates from Arnd Bergmann:
 "There are cleanups and minor bugfixes across several SoC specific
  drivers, for Qualcomm, Samsung, NXP i.MX, AT91, Tegra, Keystone,
  Renesas, ZynqMP

  Noteworthy new features are:

   - The op-tee firmware driver gains support for asynchronous
     notifications from secure-world firmware.

   - Qualcomm platforms gain support for new SoC types in various
     drivers: power domain, cache controller, RPM sleep, soc-info

   - Samsung SoC drivers gain support for new SoCs in ChipID and PMU, as
     well as a new USIv2 driver that handles various types of serial
     communiction (uart, i2c, spi)

   - Renesas adds support for R-Car S4-8 (R8A779F0) in multiple drivers,
     as well as memory controller support for RZ/G2L (R9A07G044).

   - Apple M1 gains support for the PMGR power management driver"

* tag 'drivers-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (94 commits)
  soc: qcom: rpmh-rsc: Fix typo in a comment
  soc: qcom: socinfo: Add SM6350 and SM7225
  dt-bindings: arm: msm: Don't mark LLCC interrupt as required
  dt-bindings: firmware: scm: Add SM6350 compatible
  dt-bindings: arm: msm: Add LLCC for SM6350
  soc: qcom: rpmhpd: Sort power-domain definitions and lists
  soc: qcom: rpmhpd: Remove mx/cx relationship on sc7280
  soc: qcom: rpmhpd: Rename rpmhpd struct names
  soc: qcom: rpmhpd: sm8450: Add the missing .peer for sm8450_cx_ao
  soc: qcom: socinfo: add SM8450 ID
  soc: qcom: rpmhpd: Add SM8450 power domains
  dt-bindings: power: rpmpd: Add SM8450 to rpmpd binding
  soc: qcom: smem: Update max processor count
  dt-bindings: arm: qcom: Document SM8450 SoC and boards
  dt-bindings: firmware: scm: Add SM8450 compatible
  dt-bindings: arm: cpus: Add kryo780 compatible
  soc: qcom: rpmpd: Add support for sm6125
  dt-bindings: qcom-rpmpd: Add sm6125 power domains
  soc: qcom: aoss: constify static struct thermal_cooling_device_ops
  PM: AVS: qcom-cpr: Use div64_ul instead of do_div
  ...
</pre>
</div>
</content>
</entry>
<entry>
<title>memory: omap-gpmc: Use a compatible match table when checking for NAND controller</title>
<updated>2021-12-22T15:51:14+00:00</updated>
<author>
<name>Roger Quadros</name>
<email>rogerq@kernel.org</email>
</author>
<published>2021-12-21T13:17:56+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=f2f8115fe8b390af27d013411045bd712a812103'/>
<id>f2f8115fe8b390af27d013411045bd712a812103</id>
<content type='text'>
As more compatibles can be added to the GPMC NAND controller driver
use a compatible match table.

Signed-off-by: Roger Quadros &lt;rogerq@kernel.org&gt;
Acked-by: Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;
Link: https://lore.kernel.org/r/20211221131757.2030-4-rogerq@kernel.org
[krzysztof: remove "is_nand" variable]
Signed-off-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
As more compatibles can be added to the GPMC NAND controller driver
use a compatible match table.

Signed-off-by: Roger Quadros &lt;rogerq@kernel.org&gt;
Acked-by: Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;
Link: https://lore.kernel.org/r/20211221131757.2030-4-rogerq@kernel.org
[krzysztof: remove "is_nand" variable]
Signed-off-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>memory: omap-gpmc: Add support for GPMC on AM64 SoC</title>
<updated>2021-12-22T11:52:38+00:00</updated>
<author>
<name>Roger Quadros</name>
<email>rogerq@kernel.org</email>
</author>
<published>2021-12-21T13:17:55+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=7e58accf4547b75070e5cc1e04f97e890d7f719a'/>
<id>7e58accf4547b75070e5cc1e04f97e890d7f719a</id>
<content type='text'>
The TI's AM64 SoC has the GPMC module. Add compatible for it.

Traditionally GPMC external addresses have always been mapped to first
1GB physical address. However newer platforms, can have it mapped
at different locations. Support this address provision via device tree.

Signed-off-by: Roger Quadros &lt;rogerq@kernel.org&gt;
Link: https://lore.kernel.org/r/20211221131757.2030-3-rogerq@kernel.org
Signed-off-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The TI's AM64 SoC has the GPMC module. Add compatible for it.

Traditionally GPMC external addresses have always been mapped to first
1GB physical address. However newer platforms, can have it mapped
at different locations. Support this address provision via device tree.

Signed-off-by: Roger Quadros &lt;rogerq@kernel.org&gt;
Link: https://lore.kernel.org/r/20211221131757.2030-3-rogerq@kernel.org
Signed-off-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>memory: omap-gpmc: Use platform_get_irq() to get the interrupt</title>
<updated>2021-12-22T11:52:24+00:00</updated>
<author>
<name>Lad Prabhakar</name>
<email>prabhakar.mahadev-lad.rj@bp.renesas.com</email>
</author>
<published>2021-12-21T20:39:15+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=19d398dca521167420fb8458842c7fe4b002a0f5'/>
<id>19d398dca521167420fb8458842c7fe4b002a0f5</id>
<content type='text'>
platform_get_resource(pdev, IORESOURCE_IRQ, ..) relies on static
allocation of IRQ resources in DT core code, this causes an issue
when using hierarchical interrupt domains using "interrupts" property
in the node as this bypasses the hierarchical setup and messes up the
irq chaining.

In preparation for removal of static setup of IRQ resource from DT core
code use platform_get_irq().

Signed-off-by: Lad Prabhakar &lt;prabhakar.mahadev-lad.rj@bp.renesas.com&gt;
Acked-by: Roger Quadros &lt;rogerq@ti.com&gt;
Link: https://lore.kernel.org/r/20211221203916.18588-2-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
platform_get_resource(pdev, IORESOURCE_IRQ, ..) relies on static
allocation of IRQ resources in DT core code, this causes an issue
when using hierarchical interrupt domains using "interrupts" property
in the node as this bypasses the hierarchical setup and messes up the
irq chaining.

In preparation for removal of static setup of IRQ resource from DT core
code use platform_get_irq().

Signed-off-by: Lad Prabhakar &lt;prabhakar.mahadev-lad.rj@bp.renesas.com&gt;
Acked-by: Roger Quadros &lt;rogerq@ti.com&gt;
Link: https://lore.kernel.org/r/20211221203916.18588-2-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>memory: mtk-smi: Fix a null dereference for the ostd</title>
<updated>2021-11-25T13:46:00+00:00</updated>
<author>
<name>Yong Wu</name>
<email>yong.wu@mediatek.com</email>
</author>
<published>2021-11-24T08:50:42+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=383a44aec91c327ef4a9d03cfa65d1eaf3746c06'/>
<id>383a44aec91c327ef4a9d03cfa65d1eaf3746c06</id>
<content type='text'>
We add the ostd setting for mt8195. It introduces a KE for the
previous SoC which doesn't have ostd setting. This is the log:

Unable to handle kernel NULL pointer dereference at virtual address
0000000000000080
...
pc : mtk_smi_larb_config_port_gen2_general+0x64/0x130
lr : mtk_smi_larb_resume+0x54/0x98
...
Call trace:
 mtk_smi_larb_config_port_gen2_general+0x64/0x130
 pm_generic_runtime_resume+0x2c/0x48
 __genpd_runtime_resume+0x30/0xa8
 genpd_runtime_resume+0x94/0x2c8
 __rpm_callback+0x44/0x150
 rpm_callback+0x6c/0x78
 rpm_resume+0x310/0x558
 __pm_runtime_resume+0x3c/0x88

In the code: larbostd = larb-&gt;larb_gen-&gt;ostd[larb-&gt;larbid],
if "larb-&gt;larb_gen-&gt;ostd" is null, the "larbostd" is the offset(e.g.
0x80 above), it's also a valid value, then accessing "larbostd[i]" in the
"for" loop will cause the KE above. To avoid this issue, initialize
"larbostd" to NULL when the SoC doesn't have ostd setting.

Fixes: fe6dd2a4017d ("memory: mtk-smi: mt8195: Add initial setting for smi-larb")
Signed-off-by: Yong Wu &lt;yong.wu@mediatek.com&gt;
Signed-off-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;
Link: https://lore.kernel.org/r/20211108082429.15080-1-yong.wu@mediatek.com
Link: https://lore.kernel.org/r/20211124085042.9649-3-krzysztof.kozlowski@canonical.com'
Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
We add the ostd setting for mt8195. It introduces a KE for the
previous SoC which doesn't have ostd setting. This is the log:

Unable to handle kernel NULL pointer dereference at virtual address
0000000000000080
...
pc : mtk_smi_larb_config_port_gen2_general+0x64/0x130
lr : mtk_smi_larb_resume+0x54/0x98
...
Call trace:
 mtk_smi_larb_config_port_gen2_general+0x64/0x130
 pm_generic_runtime_resume+0x2c/0x48
 __genpd_runtime_resume+0x30/0xa8
 genpd_runtime_resume+0x94/0x2c8
 __rpm_callback+0x44/0x150
 rpm_callback+0x6c/0x78
 rpm_resume+0x310/0x558
 __pm_runtime_resume+0x3c/0x88

In the code: larbostd = larb-&gt;larb_gen-&gt;ostd[larb-&gt;larbid],
if "larb-&gt;larb_gen-&gt;ostd" is null, the "larbostd" is the offset(e.g.
0x80 above), it's also a valid value, then accessing "larbostd[i]" in the
"for" loop will cause the KE above. To avoid this issue, initialize
"larbostd" to NULL when the SoC doesn't have ostd setting.

Fixes: fe6dd2a4017d ("memory: mtk-smi: mt8195: Add initial setting for smi-larb")
Signed-off-by: Yong Wu &lt;yong.wu@mediatek.com&gt;
Signed-off-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;
Link: https://lore.kernel.org/r/20211108082429.15080-1-yong.wu@mediatek.com
Link: https://lore.kernel.org/r/20211124085042.9649-3-krzysztof.kozlowski@canonical.com'
Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>memory: renesas-rpc-if: refactor MOIIO and IOFV macros</title>
<updated>2021-11-22T09:53:26+00:00</updated>
<author>
<name>Wolfram Sang</name>
<email>wsa+renesas@sang-engineering.com</email>
</author>
<published>2021-11-19T11:04:42+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=3542de6a5b159fac0e7ca84d77a57ea99125d6b1'/>
<id>3542de6a5b159fac0e7ca84d77a57ea99125d6b1</id>
<content type='text'>
Don't use _HIZ macros but also provide a val. This is more consistent
with the other macros and, thus, easier to read. Also shorter.

Signed-off-by: Wolfram Sang &lt;wsa+renesas@sang-engineering.com&gt;
Link: https://lore.kernel.org/r/20211119110442.4946-1-wsa+renesas@sang-engineering.com
Signed-off-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Don't use _HIZ macros but also provide a val. This is more consistent
with the other macros and, thus, easier to read. Also shorter.

Signed-off-by: Wolfram Sang &lt;wsa+renesas@sang-engineering.com&gt;
Link: https://lore.kernel.org/r/20211119110442.4946-1-wsa+renesas@sang-engineering.com
Signed-off-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>memory: renesas-rpc-if: avoid use of undocumented bits</title>
<updated>2021-11-22T09:53:01+00:00</updated>
<author>
<name>Wolfram Sang</name>
<email>wsa+renesas@sang-engineering.com</email>
</author>
<published>2021-11-17T09:37:10+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=57ea9daad51f7707f61a602a743decf10cf9fea9'/>
<id>57ea9daad51f7707f61a602a743decf10cf9fea9</id>
<content type='text'>
Instead of writing fixed values with undocumented bits which happen to
be set on some SoCs, better switch to read-modify-write operations
changing only bits which are documented. This is way more future-proof
as we don't know yet how these bits may be on upcoming SoCs.

Signed-off-by: Wolfram Sang &lt;wsa+renesas@sang-engineering.com&gt;
Tested-by: Lad Prabhakar &lt;prabhakar.mahadev-lad.rj@bp.renesas.com&gt;
Reviewed-by: Lad Prabhakar &lt;prabhakar.mahadev-lad.rj@bp.renesas.com&gt;
Link: https://lore.kernel.org/r/20211117093710.14430-1-wsa+renesas@sang-engineering.com
Signed-off-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Instead of writing fixed values with undocumented bits which happen to
be set on some SoCs, better switch to read-modify-write operations
changing only bits which are documented. This is way more future-proof
as we don't know yet how these bits may be on upcoming SoCs.

Signed-off-by: Wolfram Sang &lt;wsa+renesas@sang-engineering.com&gt;
Tested-by: Lad Prabhakar &lt;prabhakar.mahadev-lad.rj@bp.renesas.com&gt;
Reviewed-by: Lad Prabhakar &lt;prabhakar.mahadev-lad.rj@bp.renesas.com&gt;
Link: https://lore.kernel.org/r/20211117093710.14430-1-wsa+renesas@sang-engineering.com
Signed-off-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>memory: renesas-rpc-if: simplify register update</title>
<updated>2021-11-22T09:52:34+00:00</updated>
<author>
<name>Wolfram Sang</name>
<email>wsa+renesas@sang-engineering.com</email>
</author>
<published>2021-11-17T10:29:02+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=2db468d6fda4c33d26ba9dde7c72e081b2b86ad1'/>
<id>2db468d6fda4c33d26ba9dde7c72e081b2b86ad1</id>
<content type='text'>
No need to open code regmap_update_bits().

Signed-off-by: Wolfram Sang &lt;wsa+renesas@sang-engineering.com&gt;
Tested-by: Lad Prabhakar &lt;prabhakar.mahadev-lad.rj@bp.renesas.com&gt;
Link: https://lore.kernel.org/r/20211117102902.20062-1-wsa+renesas@sang-engineering.com
Signed-off-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
No need to open code regmap_update_bits().

Signed-off-by: Wolfram Sang &lt;wsa+renesas@sang-engineering.com&gt;
Tested-by: Lad Prabhakar &lt;prabhakar.mahadev-lad.rj@bp.renesas.com&gt;
Link: https://lore.kernel.org/r/20211117102902.20062-1-wsa+renesas@sang-engineering.com
Signed-off-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>memory: renesas-rpc-if: Silence clang warning</title>
<updated>2021-11-22T09:51:44+00:00</updated>
<author>
<name>Lad Prabhakar</name>
<email>prabhakar.mahadev-lad.rj@bp.renesas.com</email>
</author>
<published>2021-11-21T18:01:55+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=2602dc10f9d930bcc537467d13de4cfbfaa2126d'/>
<id>2602dc10f9d930bcc537467d13de4cfbfaa2126d</id>
<content type='text'>
This patch silences the following clang warning:

| drivers/memory/renesas-rpc-if.c:253:14: warning: cast to smaller integer
| type 'enum rpcif_type' from 'const void *' [-Wvoid-pointer-to-enum-cast]
|           rpc-&gt;type = (enum rpcif_type)of_device_get_match_data(dev);
|                       ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

Fixes: b04cc0d912eb8 ("memory: renesas-rpc-if: Add support for RZ/G2L")
Reported-by: kernel test robot &lt;lkp@intel.com&gt;
Signed-off-by: Lad Prabhakar &lt;prabhakar.mahadev-lad.rj@bp.renesas.com&gt;
Reviewed-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
Link: https://lore.kernel.org/r/20211121180155.9062-1-prabhakar.mahadev-lad.rj@bp.renesas.com
[krzysztof: drop enum rpcif_type cast]
Signed-off-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This patch silences the following clang warning:

| drivers/memory/renesas-rpc-if.c:253:14: warning: cast to smaller integer
| type 'enum rpcif_type' from 'const void *' [-Wvoid-pointer-to-enum-cast]
|           rpc-&gt;type = (enum rpcif_type)of_device_get_match_data(dev);
|                       ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

Fixes: b04cc0d912eb8 ("memory: renesas-rpc-if: Add support for RZ/G2L")
Reported-by: kernel test robot &lt;lkp@intel.com&gt;
Signed-off-by: Lad Prabhakar &lt;prabhakar.mahadev-lad.rj@bp.renesas.com&gt;
Reviewed-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
Link: https://lore.kernel.org/r/20211121180155.9062-1-prabhakar.mahadev-lad.rj@bp.renesas.com
[krzysztof: drop enum rpcif_type cast]
Signed-off-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;
</pre>
</div>
</content>
</entry>
</feed>
