linux-toradex.git/drivers/mfd/lpc_ich.c, branch v6.11 Linux kernel for Apalis and Colibri modules mfd: lpc_ich: Use ALIGN_DOWN() to obtain the start of the SPI base range 2024-02-23T14:58:00+00:00 Ilpo Järvinen ilpo.jarvinen@linux.intel.com 2023-12-29T14:50:59+00:00 fc99c0132210a0f8b6a601eda90cf4d5e25b041d Instead of open coding, use ALIGN_DOWN() for alignment. Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> Link: https://lore.kernel.org/r/20231229145059.6138-1-ilpo.jarvinen@linux.intel.com Signed-off-by: Lee Jones <lee@kernel.org> 
Instead of open coding, use ALIGN_DOWN() for alignment.

Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Link: https://lore.kernel.org/r/20231229145059.6138-1-ilpo.jarvinen@linux.intel.com
Signed-off-by: Lee Jones <lee@kernel.org>
mfd: lpc_ich: Mark *_gpio_offsets data with const 2023-11-01T10:02:18+00:00 Andy Shevchenko andriy.shevchenko@linux.intel.com 2023-10-24T16:06:50+00:00 2b481822446e30943fb7c02744a7b49ebec0e696 There is no reason why the GPIO resource offsets should not be const. Mark them accordingly and update a qualifier in struct lpc_ich_gpio_info definition. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20231024160650.3898959-1-andriy.shevchenko@linux.intel.com Signed-off-by: Lee Jones <lee@kernel.org> 
There is no reason why the GPIO resource offsets should not be const.
Mark them accordingly and update a qualifier in struct lpc_ich_gpio_info
definition.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20231024160650.3898959-1-andriy.shevchenko@linux.intel.com
Signed-off-by: Lee Jones <lee@kernel.org>
mfd: lpc_ich: Add a platform device for pinctrl Denverton 2023-11-01T10:02:13+00:00 Andy Shevchenko andriy.shevchenko@linux.intel.com 2023-09-26T19:08:34+00:00 b4e40505f90a9936e7dd2dd0b98a1af97d8941f0 This is to cater the need in non-ACPI system whereby a platform device has to be created in order to bind with the Denverton pinctrl driver. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20230926190834.932233-4-andriy.shevchenko@linux.intel.com Signed-off-by: Lee Jones <lee@kernel.org> 
This is to cater the need in non-ACPI system whereby a platform device
has to be created in order to bind with the Denverton pinctrl driver.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20230926190834.932233-4-andriy.shevchenko@linux.intel.com
Signed-off-by: Lee Jones <lee@kernel.org>
mfd: lpc_ich: Move APL GPIO resources to a custom structure 2023-11-01T10:02:13+00:00 Andy Shevchenko andriy.shevchenko@linux.intel.com 2023-09-26T19:08:33+00:00 1f84f88dc15036d63fa7c84833a440370f22a74b We are expecting more platforms that want to instantiate the GPIO device via P2SB. For them prepare the custom structure and move Apollo Lake data there. Refactor the code accordingly. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20230926190834.932233-3-andriy.shevchenko@linux.intel.com Signed-off-by: Lee Jones <lee@kernel.org> 
We are expecting more platforms that want to instantiate
the GPIO device via P2SB. For them prepare the custom structure
and move Apollo Lake data there. Refactor the code accordingly.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20230926190834.932233-3-andriy.shevchenko@linux.intel.com
Signed-off-by: Lee Jones <lee@kernel.org>
mfd: lpc_ich: Make struct lpc_ich_priv use enum for chipset member 2023-11-01T10:02:13+00:00 Andy Shevchenko andriy.shevchenko@linux.intel.com 2023-09-26T19:08:31+00:00 b0eb61880f004290a62b71b135825e9c5f5bde99 We have a specific enum for the supported chipsets. Make struct lpc_ich_priv use better type for the chipset member. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20230926190834.932233-1-andriy.shevchenko@linux.intel.com Signed-off-by: Lee Jones <lee@kernel.org> 
We have a specific enum for the supported chipsets.
Make struct lpc_ich_priv use better type for the chipset member.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20230926190834.932233-1-andriy.shevchenko@linux.intel.com
Signed-off-by: Lee Jones <lee@kernel.org>
mfd: Move from strlcpy with unused retval to strscpy 2022-09-28T15:17:39+00:00 Wolfram Sang wsa+renesas@sang-engineering.com 2022-08-18T21:00:29+00:00 6a32d3995f7bcf04598548778da54d2b6932b6a5 Follow the advice of the below link and prefer 'strscpy' in this subsystem. Conversion is 1:1 because the return value is not used. Generated by a coccinelle script. Link: https://lore.kernel.org/r/CAHk-=wgfRnXz0W3D37d01q3JFkr_i_uTL=V6A6G1oUZcprmknw@mail.gmail.com/ Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Lee Jones <lee@kernel.org> Link: https://lore.kernel.org/r/20220818210030.7012-1-wsa+renesas@sang-engineering.com 
Follow the advice of the below link and prefer 'strscpy' in this
subsystem. Conversion is 1:1 because the return value is not used.
Generated by a coccinelle script.

Link: https://lore.kernel.org/r/CAHk-=wgfRnXz0W3D37d01q3JFkr_i_uTL=V6A6G1oUZcprmknw@mail.gmail.com/
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Lee Jones <lee@kernel.org>
Link: https://lore.kernel.org/r/20220818210030.7012-1-wsa+renesas@sang-engineering.com
mfd: lpc_ich: Add support for pinctrl in non-ACPI system 2022-07-14T09:50:31+00:00 Tan Jui Nee jui.nee.tan@intel.com 2022-06-06T16:41:31+00:00 7064d7d88b83b6394ee833e805fd041c615acb13 Add support for non-ACPI systems, such as system that uses Advanced Boot Loader (ABL) whereby a platform device has to be created in order to bind with pin control and GPIO. At the moment, Intel Apollo Lake In-Vehicle Infotainment (IVI) system requires a driver to hide and unhide P2SB to lookup P2SB BAR and pass the PCI BAR address to GPIO. Signed-off-by: Tan Jui Nee <jui.nee.tan@intel.com> Co-developed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Tested-by: Henning Schild <henning.schild@siemens.com> Acked-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Lee Jones <lee@kernel.org> 
Add support for non-ACPI systems, such as system that uses
Advanced Boot Loader (ABL) whereby a platform device has to be created
in order to bind with pin control and GPIO.

At the moment, Intel Apollo Lake In-Vehicle Infotainment (IVI) system
requires a driver to hide and unhide P2SB to lookup P2SB BAR and pass
the PCI BAR address to GPIO.

Signed-off-by: Tan Jui Nee <jui.nee.tan@intel.com>
Co-developed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Tested-by: Henning Schild <henning.schild@siemens.com>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Lee Jones <lee@kernel.org>
mfd: lpc_ich: Switch to generic p2sb_bar() 2022-07-14T09:50:25+00:00 Andy Shevchenko andriy.shevchenko@linux.intel.com 2022-06-06T16:41:30+00:00 559793198f9280cdd56c438f5258e315ed8a6cbc Instead of open coding p2sb_bar() functionality we are going to use generic library. There is one more user en route. This is more than just a clean-up. It also fixes a potential issue seen when SPI BAR is 64-bit. The current code works if and only if the PCI BAR of the hidden device is inside 4G address space. In case when firmware decides to go above 4G, we will get a wrong address. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Tested-by: Henning Schild <henning.schild@siemens.com> Acked-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Lee Jones <lee@kernel.org> 
Instead of open coding p2sb_bar() functionality we are going to
use generic library. There is one more user en route.

This is more than just a clean-up. It also fixes a potential issue
seen when SPI BAR is 64-bit. The current code works if and only if
the PCI BAR of the hidden device is inside 4G address space. In case
when firmware decides to go above 4G, we will get a wrong address.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Tested-by: Henning Schild <henning.schild@siemens.com>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Lee Jones <lee@kernel.org>
mfd: lpc_ich: Factor out lpc_ich_enable_spi_write() 2022-07-14T09:50:14+00:00 Andy Shevchenko andriy.shevchenko@linux.intel.com 2022-06-06T16:41:29+00:00 6e3b29dbc119fa86bc25f822e8c6166552086531 Factor out duplicate code to lpc_ich_enable_spi_write() helper function. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Tested-by: Henning Schild <henning.schild@siemens.com> Acked-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Lee Jones <lee@kernel.org> 
Factor out duplicate code to lpc_ich_enable_spi_write() helper function.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Tested-by: Henning Schild <henning.schild@siemens.com>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Lee Jones <lee@kernel.org>
mtd: spi-nor: intel-spi: Disable write protection only if asked 2022-02-14T12:53:08+00:00 Mika Westerberg mika.westerberg@linux.intel.com 2022-02-09T12:27:04+00:00 cd149eff8d2201a63c074a6d9d03e52926aa535d Currently the driver tries to disable the BIOS write protection automatically even if this is not what the user wants. For this reason modify the driver so that by default it does not touch the write protection. Only if specifically asked by the user (setting writeable=1 command line parameter) the driver tries to disable the BIOS write protection. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Mauro Lima <mauro.lima@eclypsium.com> Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com> Acked-by: Lee Jones <lee.jones@linaro.org> Link: https://lore.kernel.org/r/20220209122706.42439-2-mika.westerberg@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org> 
Currently the driver tries to disable the BIOS write protection
automatically even if this is not what the user wants. For this reason
modify the driver so that by default it does not touch the write
protection. Only if specifically asked by the user (setting writeable=1
command line parameter) the driver tries to disable the BIOS write
protection.

Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Mauro Lima <mauro.lima@eclypsium.com>
Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Acked-by: Lee Jones <lee.jones@linaro.org>
Link: https://lore.kernel.org/r/20220209122706.42439-2-mika.westerberg@linux.intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>