linux-toradex.git/drivers/mfd/sec-core.c, branch v4.5

mfd: Use to_i2c_client() instead of open-coding it

2016-01-14T08:43:50+00:00

Signed-off-by: Geliang Tang 
Signed-off-by: Lee Jones

mfd: sec-core: Rename MFD and regulator names differently

2015-11-24T11:11:16+00:00

Currently S2MPSXX multifunction device is named as *-pmic,
and these MFDs also supports regulator as a one of its MFD cell which
has the same name, because current name is confusing and we want to
sort it out.

We did discussed different approaches about how the MFD and it
cells need to be named here [1].
Based in the discussion this patch rename MFD regulator name as
*-regulator instead of current *-pmic.

This patch also changes the corresponding entries in the regulator driver
to keep git-bisect happy.

[1]-> https://lkml.org/lkml/2015/10/28/417

Suggested-by: Lee Jones 
Signed-off-by: Alim Akhtar 
Reviewed-by: Krzysztof Kozlowski 
Acked-by: Mark Brown 
Signed-off-by: Lee Jones

mfd: sec: Add support for S2MPS15 PMIC

2015-11-23T10:33:16+00:00

Add support for S2MPS15 PMIC which is similar to S2MPS11 PMIC. The S2MPS15
PMIC supports 27 LDO regulators, 10 buck regulators, RTC, three 32.768KHz
clock outputs and battery charger. This patch adds initial support for
LDO and buck regulators of S2MPS15 device.

Signed-off-by: Thomas Abraham 
Signed-off-by: Alim Akhtar 
Reviewed-by: Krzysztof Kozlowski 
[Alim: Added s2mps15_devs like rtc and clk and related changes]
Signed-off-by: Lee Jones

mfd: sec-core: Remove unused s2mpu02-rtc and s2mpu02-clk children

2015-10-30T18:57:38+00:00

The commit 54e8827d5f0e ("mfd: sec-core: Add support for S2MPU02
device") added new MFD child devices for S2MPU02: RTC and clock
provider (the clock provider with new compatible). However support for
these devices was not added to existing drivers (rtc-s5m, clk-s2mps11).
New drivers were not submitted neither.

This means that the name of children devices is completely unused. The
"samsung,s2mpu02-clk" compatible remains undocumented so it is unclear
what is provided by that compatible.

Clean up this by removing unused child devices and undocumented
compatible.

Signed-off-by: Krzysztof Kozlowski 
Reviewed-by: Chanwoo Choi 
Signed-off-by: Lee Jones

mfd: sec-core: Disable buck voltage reset on watchdog falling edge

2015-10-30T17:20:37+00:00

The WRSTBI bit (disabled by default but enabled by bootloader), when
set, is responsible for resetting voltages to default values of
certain bucks on falling edge of Warm Reset Input pin from AP.

However on some boards (with S2MPS13) the pin is pulled down so any
suspend will effectively trigger the reset of bucks supplying the power
to the little and big cores. In the same time when resuming, these bucks
must provide voltage greater or equal to voltage before suspend to match
the frequency chosen by cpufreq. If voltage (default value of voltage
after reset) is lower than one set by cpufreq before suspend, then
system will hang during resuming.

Signed-off-by: Krzysztof Kozlowski 
Reported-by: Bartlomiej Zolnierkiewicz 
Tested-by: Bartlomiej Zolnierkiewicz 
Signed-off-by: Lee Jones

mfd: sec-core: Dump PMIC revision to find out the HW

2015-10-30T17:20:37+00:00

There are different revisions of the same chipset. For example S2MPS13 has
more than 2 revisions. They differ slightly in regulator constraints.
Print the revision number to easily find which PMIC is used on the board.

Signed-off-by: Krzysztof Kozlowski 
Signed-off-by: Lee Jones

mfd: s2mps11: Add manual shutdown method for Odroid XU3

2015-10-26T14:49:04+00:00

On Odroid XU3 board (with S2MPS11 PMIC) the PWRHOLD bit in CTRL1
register must be manually set to 0 before initiating power off sequence.

One of usual power down methods for Exynos based devices looks like:
1. PWRHOLD pin of PMIC is connected to PSHOLD of Exynos SoC.
2. Exynos holds up this pin during system operation.
3. ACOKB pin of PMIC is pulled up to VBATT and optionally to pin in
   other device.
4. When PWRHOLD/PSHOLD goes low, the PMIC will turn off the power if
   ACOKB goes high.

On Odroid XU3 family the difference is in (3) - the ACOKB is grounded.
This means that PMIC must manually set PWRHOLD field to low and then
wait for signal from Application Processor (the usual change in
PWRHOLD/PSHOLD pin will actually cut off the power).

The patch adds respective binding allowing Odroid XU3 device to be
powered off.

Signed-off-by: Krzysztof Kozlowski 
Reported-by: Anand Moon 
Tested-by: Anand Moon 
Reviewed-by: Javier Martinez Canillas 
Signed-off-by: Lee Jones

mfd: Drop owner assignment from i2c_drivers

2015-08-11T14:08:48+00:00

i2c_driver does not need to set an owner because i2c_register_driver()
will set it.

Signed-off-by: Krzysztof Kozlowski 
Signed-off-by: Lee Jones

mfd: sec-core: Enable RTC on S2MPS11 PMIC

2015-03-26T14:20:19+00:00

The S2MPS11 PMIC (present on Arndale Octa board) has the same RTC module
as S2MPS14 device. Add respective mfd cell to enable it.

Signed-off-by: Krzysztof Kozlowski 
Signed-off-by: Lee Jones

mfd: sec: Remove unnecessary out of memory message

2015-03-03T17:30:26+00:00

There is no need to print additional ENOMEM message for
sec_platform_data allocation failure.

Signed-off-by: Krzysztof Kozlowski 
Signed-off-by: Lee Jones