linux-toradex.git/drivers/misc/habanalabs/include/hw_ip, branch master

habanalabs: move driver to accel subsystem

2023-01-26T09:52:10+00:00

Now that we have a subsystem for compute accelerators, move the
habanalabs driver to it.

This patch only moves the files and fixes the Makefiles. Future
patches will change the existing code to register to the accel
subsystem and expose the accel device char files instead of the
habanalabs device char files.

Update the MAINTAINERS file to reflect this change.

Signed-off-by: Oded Gabbay

habanalabs/gaudi2: add PCI revision 2 support

2022-11-23T14:13:46+00:00

Add support for Gaudi2 Device with PCI revision 2.
Functionality is exactly the same as revision 1, the only difference
is device name exposed to user.

Signed-off-by: Ofir Bitton 
Reviewed-by: Oded Gabbay 
Signed-off-by: Oded Gabbay

habanalabs/gaudi2: add asic registers header files

2022-07-12T06:09:27+00:00

Add the relevant GAUDI2 ASIC registers header files. These files are
generated automatically from a tool maintained by the VLSI engineers.

There are more files which are not upstreamed because only very few
defines from those files are used in the driver. For those files, I
copied the relevant defines into gaudi2_regs.h and gaudi2_masks.h, to
reduce the size of this patch.

Signed-off-by: Oded Gabbay

habanalabs: convert all MMU masks/shifts to arrays

2022-05-22T18:57:34+00:00

There is no need to hold each MMU mask/shift as a denoted structure
member (e.g. hop0_mask).

Instead converting it to array will result in smaller and more readable
code.

Signed-off-by: Ohad Sharabi 
Reviewed-by: Oded Gabbay 
Signed-off-by: Oded Gabbay 
Signed-off-by: Greg Kroah-Hartman

habanalabs: clean MMU headers definitions

2021-12-26T06:59:09+00:00

During the MMU development the MMU header files were left with unclean
definitions:

- MMU "version specific" definitions that were left in the mmu_general
  file
- unused definitions

This patch attempts, where possible, to keep definitions that can serve
multiple MMU versions (but that are not tightly bound with specific MMU
arch) in the mmu_general header file (e.g. different definitions for
number of HOPs).

Otherwise, move MMU version specific definitions (e.g. HOPs masks and
shifts) to the specific MMU version file.

Signed-off-by: Ohad Sharabi 
Reviewed-by: Oded Gabbay 
Signed-off-by: Oded Gabbay

habanalabs: add num_hops to hl_mmu_properties

2020-09-22T15:49:53+00:00

This commit adds the number of HOPs supported by the device to the
device MMU properties.

Signed-off-by: Moti Haimovski 
Reviewed-by: Oded Gabbay 
Signed-off-by: Oded Gabbay

habanalabs: add gaudi asic registers header files

2020-05-19T11:48:41+00:00

Add the relevant GAUDI ASIC registers header files. These files are
generated automatically from a tool maintained by the VLSI engineers.

There are more files which are not upstreamed because only very few defines
from those files are used in the driver. For those files, we copied the
relevant defines into gaudi_regs.h and gaudi_masks.h, to reduce the size of
this patch.

Signed-off-by: Oded Gabbay

habanalabs: split MMU properties to PCI/DRAM

2019-11-21T09:35:46+00:00

Split the properties used for MMU mappings to DRAM and PCI (host) types.
This is a prerequisite for future ASICs support.
Note that in Goya ASIC, the PMMU and DMMU are the same (except of page
sizes) as only one MMU mechanism is used for both of the mapping types.
Hence this patch should not have any effect on current behavior.

Signed-off-by: Omer Shpigelman 
Reviewed-by: Oded Gabbay 
Signed-off-by: Oded Gabbay

habanalabs: re-factor MMU masks and documentation

2019-11-21T09:35:46+00:00

Some cosmetics around the MMU code to make it more self-explanatory.

Signed-off-by: Omer Shpigelman 
Reviewed-by: Oded Gabbay 
Signed-off-by: Oded Gabbay

habanalabs: add MMU shadow mapping

2019-02-24T07:17:55+00:00

This patch adds shadow mapping to the MMU module. The shadow mapping
allows traversing the page table in host memory rather reading each PTE
from the device memory.
It brings better performance and avoids reading from invalid device
address upon PCI errors.
Only at the end of map/unmap flow, writings to the device are performed in
order to sync the H/W page tables with the shadow ones.

Signed-off-by: Omer Shpigelman 
Signed-off-by: Oded Gabbay