Unsetting bus speed mode variable after reset to ensure that the uhs mode is set properly. Original-Change-Id: I098a0df1289acefe01c391da622132a3562382fe Reviewed-on: http://git-master/r/22423 Reviewed-by: Pavan Kunapuli <pkunapuli@nvidia.com> Tested-by: Pavan Kunapuli <pkunapuli@nvidia.com> Reviewed-by: Bitan Biswas <bbiswas@nvidia.com> Tested-by: Bitan Biswas <bbiswas@nvidia.com> Reviewed-by: Narendra Damahe <ndamahe@nvidia.com> Tested-by: Narendra Damahe <ndamahe@nvidia.com> Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com> Change-Id: I0ffd0ab93b7fb72e2a7ae8d060b264d4f735df03
Implemented the frequency tuning by configuring tap delays. This is required for SD 3.0 cards to work at 208 MHz on tegra. Bug 661035 Original-Change-Id: Ie86b084473da090b329a0220d58a6753d7fb335b Reviewed-on: http://git-master/r/20044 Tested-by: Pavan Kunapuli <pkunapuli@nvidia.com> Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com> Change-Id: Ifb812ee2d807f35bff78f440f6da7f7f5673c2ce
Doing voltage switching for SD3.0 cards to support the new data transfer modes. Added set_signalling_voltage function in ops to handle voltage switching on controllers that cannot switch the voltage directly. Added support for SD3.0 specification. Bug 661035 Original-Change-Id: I641b606fb6fadd65f0ff68c1a41c0aa25d2c9553 Reviewed-on: http://git-master/r/18701 Tested-by: Pavan Kunapuli <pkunapuli@nvidia.com> Reviewed-by: Venkata Nageswara Penumarty <vpenumarty@nvidia.com> Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com> Change-Id: I4c285d26da9354369354e53bf42db4c3f4883351
Adding support for sd3.0 cards. Added support for SDR50, SDR104 and DDR50 modes. Bug 661035 Original-Change-Id: Iecd6634b8e25d5fcbc05f79f34aea40a8460b527 Reviewed-on: http://git-master/r/15003 Tested-by: Pavan Kunapuli <pkunapuli@nvidia.com> Reviewed-by: Venkata Nageswara Penumarty <vpenumarty@nvidia.com> Reviewed-by: Scott Williams <scwilliams@nvidia.com> Change-Id: Ic2119387d55b2e4263f50a606e0f957ab518f0cb
Adding ddr mode support for eMMC v4.4 cards. If the card and host controller support ddr mode, configuring it. Setting clock divisor as 1 in case ddr mode is configured. Original-Change-Id: I94c7f2c4d23e856a67ccf312672e5f1eaee04a91 Reviewed-on: http://git-master/r/13798 Tested-by: Pavan Kunapuli <pkunapuli@nvidia.com> Reviewed-by: Scott Williams <scwilliams@nvidia.com> Change-Id: I79cd2f6a5ca1e8e00e4bceed5fdf61b4543aa1e4
Conflicts: arch/arm/mm/proc-v7.S drivers/video/tegra/dc/dc.c Change-Id: I40be0d615f14f1c01305388a706d257f624ba968
Needed for Sandisk workaround (manipulate EXT_CSD). Change-Id: I7bfe50a1503ac73ae072db718b60c27526521e41 Signed-off-by: Andrei Warkentin <andreiw@motorola.com>
The current mechanism is SDIO-only. This allows us to create function-specific quirks, without creating messy Kconfig dependencies, or polluting core/ with function-specific code. Change-Id: If31a151c20a8a1fddb0774674821e9fdc4aa61a0 Signed-off-by: Andrei Warkentin <andreiw@motorola.com>
Some cards have quirks valid for every platforms using current platform quirk hooks leads to a lot of code and debug duplication. So we inspire a bit from what exists in PCI subsystem and do our own per vendorid/deviceid quirk. We still drop the complexity of the pci quirk system (with special section tables, and so on). That can be added later if needed. Change-Id: Ib67a3e97486023267f5ea3e7c6ef8fc99b13a704 Signed-off-by: Pierre Tardy <pierre.tardy@intel.com> Acked-by: Linus Walleij <linus.walleij@stericsson.com> Acked-by: Ohad Ben-Cohen <ohad@wizery.com> Signed-off-by: Chris Ball <cjb@laptop.org>