linux-toradex.git/drivers/mtd/chips/cfi_cmdset_0020.c, branch tegra-9.12.13

[MTD] update internal API to support 64-bit device size

2008-12-10T13:37:21+00:00

MTD internal API presently uses 32-bit values to represent
device size.  This patch updates them to 64-bits but leaves
the external API unchanged.  Extending the external API
is a separate issue for several reasons.  First, no one
needs it at the moment.  Secondly, whether the implementation
is done with IOCTLs, sysfs or both is still debated.  Thirdly
external API changes require the internal API to be accepted
first.

Note that although the MTD API will be able to support 64-bit
device sizes, existing drivers do not and are not required
to do so, although NAND base has been updated.

In general, changing from 32-bit to 64-bit values cause little
or no changes to the majority of the code with the following
exceptions:
    	- printk message formats
    	- division and modulus of 64-bit values
    	- NAND base support
	- 32-bit local variables used by mtdpart and mtdconcat
	- naughtily assuming one structure maps to another
	in MEMERASE ioctl

Signed-off-by: Adrian Hunter 
Signed-off-by: Artem Bityutskiy 
Signed-off-by: David Woodhouse

MTD/JFFS2: remove CVS keywords

2008-06-04T16:50:17+00:00

Once upon a time, the MTD repository was using CVS.

This patch therefore removes all usages of the no longer updated CVS
keywords from the MTD code.

This also includes code that printed them to the user.

Signed-off-by: Adrian Bunk 
Signed-off-by: David Woodhouse

[MTD] [NOR] cfi_cmdset_0020.c: make a function static

2008-04-22T14:56:16+00:00

This patch makes the needlessly global cfi_staa_erase_varsize() static.

Signed-off-by: Adrian Bunk 
Signed-off-by: David Woodhouse

[MTD] replace remaining FUNCTION occurrences

2008-04-22T11:36:04+00:00

__FUNCTION__ is gcc-specific, use __func__

Signed-off-by: Harvey Harrison 
Signed-off-by: Andrew Morton 
Signed-off-by: David Woodhouse

mtd/chips: add missing set_current_state() to cfi_{amdstd,staa}_sync()

2008-04-09T01:25:53+00:00

cfi_amdstd_sync() and cfi_staa_sync() call schedule() without changing task's
state appropriately.

In case of e.g.  chip->state == FL_ERASING, cfi_*_sync() will be busy-looping
either redundantly for a fixed interval of time (for SCHED_NORMAL tasks) or
possibly endlessly (for RT tasks and UP).

Signed-off-by: Dmitry Adamushko 
Cc: David Woodhouse 
Signed-off-by: Andrew Morton 
Signed-off-by: Linus Torvalds

[MTD] [NOR] Fix oops in cfi_amdstd_sync

2007-03-08T09:22:38+00:00

The files cfi_cmdset_0002.c and cfi_cmdset_0020.c do not initialize their
wait queues like is done in cfi_cmdset_0001.c.  This causes an oops when
the wait queue is accessed.  I have copied the code from cfi_cmdset_0001.c
that is pertinent to initialization of the wait queue.

Signed-off-by: Vijay Sampath 
Acked-by: Joern Engel 
Acked-by: Josh Boyer 
Signed-off-by: Andrew Morton 
Signed-off-by: David Woodhouse

[MTD] [NOR] STAA: use writesize instead off eccsize to represent ECC block

2007-02-09T15:26:10+00:00

The cfi_staa_write_buffers() uses mtd->eccsize but means mtd->writesize.
BTW, mtd-eccsize is broken and is not initialized, which means the code
fixed by this patch is broken/unused anyway.

Signed-off-by: Artem Bityutskiy 
Signed-off-by: David Woodhouse

[MTD] replace kmalloc+memset with kzalloc

2006-11-28T23:47:21+00:00

Signed-off-by: Yan Burman 
Signed-off-by: David Woodhouse

[MTD] Introduce MTD_BIT_WRITEABLE

2006-05-22T21:18:29+00:00

o Add a flag MTD_BIT_WRITEABLE for devices that allow single bits to be
  cleared.
o Replace MTD_PROGRAM_REGIONS with a cleared MTD_BIT_WRITEABLE flag for
  STMicro and Intel Sibley flashes with internal ECC.  Those flashes
  disallow clearing of single bits, unlike regular NOR flashes, so the
  new flag models their behaviour better.
o Remove MTD_ECC.  After the STMicro/Sibley merge, this flag is only set
  and never checked.

Signed-off-by: Joern Engel

[MTD] Merge STMicro NOR_ECC code with Intel Sibley code

2006-05-22T21:18:12+00:00

In 2002, STMicro started producing NOR flashes with internal ECC protection
for small blocks (8 or 16 bytes).  Support for those flashes was added by me.
In 2005, Intel Sibley flashes copied this strategy and Nico added support for
those.  Merge the code for both.

Signed-off-by: Joern Engel