Some old SST chips use 0x50 as sector erase command, instead
of 0x30. Make this value variable to handle such chips.

Signed-off-by: Guillaume LECERF <glecerf@gmail.com>
Acked-by: Wolfram Sang <w.sang@pengutronix.de>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>

Signed-off-by: Guillaume LECERF <glecerf@gmail.com>
Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@nokia.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>

SST 39VF160x and 39VF320x chips use vendorname id 0x0701 and alternative
unlock addresses. Add support for them in cfi_probe.c.

Signed-off-by: Guillaume LECERF <glecerf@gmail.com>
Reviewed-by: Wolfram Sang <w.sang@pengutronix.de>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>

Make the addresses used to enter Auto Select Mode variable to leave place
for handling chips using non-standard addresses.

Signed-off-by: Guillaume LECERF <glecerf@gmail.com>
Reviewed-by: Wolfram Sang <w.sang@pengutronix.de>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>

Move the code to enter Auto Select Mode down to be able to use cfi->cfiq
members to add support for chips using alternative sequence / unlock
addresses.

Signed-off-by: Guillaume LECERF <glecerf@gmail.com>
Reviewed-by: Wolfram Sang <w.sang@pengutronix.de>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>

They need to be exported, so let's give them less generic-sounding names
while we're at it.

Original export patch, along with the suggestion about the nomenclature,
from Stephen Rothwell.

Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>

There are some CFI chips which require non standard procedures to get 
into QRY mode. The possible way to support them would be trying 
different modes till QRY will be read. This patch introduce two new 
functions qry_mode_on qry_mode_off. qry_mode_on tries different commands 
in order switch chip into QRY mode.

So if we have one more "odd" chip - we just could add several lines to 
qry_mode_on. Also using these functions remove unnecessary code 
duplicaton in porbe procedure.

Currently there are two "odd" cases
1. Some old intel chips which require 0xFF before 0x98
2. ST M29DW chip which requires 0x98 to be sent at 0x555 (according to
CFI should be 0x55)

This patch is partialy based on the patch from Uwe
(see "[PATCH 2/4] [RFC][MTD] cfi_probe: remove Intel chip workaround"
thread )

Signed-off-by: Alexey Korolev <akorolev@infradead.org>
Signed-off-by: Alexander Belyakov <abelyako@gmail.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>

Once upon a time, the MTD repository was using CVS.

This patch therefore removes all usages of the no longer updated CVS
keywords from the MTD code.

This also includes code that printed them to the user.

Signed-off-by: Adrian Bunk <bunk@kernel.org>
Signed-off-by: David Woodhouse <dwmw2@infradead.org>

AMD/Spansion use a device id of 0x7e to indicate an extended device is
present at offset 0xe and 0xf in the query data.

I've verified with Spansion that all their chips (mfr == 0x01) with an id
of 0x7e use it to indicate an extended id is present.  What's more, there
are no chips with a NON-extended id that is the same as a different chip's
extended id.  In other words, when the extended ID is present, one can
replace the normal id with the extended id without losing any information.
Which is what I've done.

Signed-off-by: Trent Piepho <tpiepho@freescale.com>
Signed-off-by: David Woodhouse <dwmw2@infradead.org>

Untested, but shouldn't break anything... Makes MTD_XIP arch
independent. I guess this is why xip_iprefetch() was made for.

Signed-off-by: Paulius Zaleckas <paulius.zaleckas@teltonika.lt>
Acked-by: Nicolas Pitre <nico@cam.org>
Signed-off-by: David Woodhouse <dwmw2@infradead.org>